KVM: PPC: Book3S HV: Handle new LPCR bits on POWER8
POWER8 has a bit in the LPCR to enable or disable the PURR and SPURR registers to count when in the guest. Set this bit. POWER8 has a field in the LPCR called AIL (Alternate Interrupt Location) which is used to enable relocation-on interrupts. Allow userspace to set this field. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -305,8 +305,10 @@
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#define LPCR_RMLS 0x1C000000 /* impl dependent rmo limit sel */
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#define LPCR_RMLS_SH (63-37)
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#define LPCR_ILE 0x02000000 /* !HV irqs set MSR:LE */
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#define LPCR_AIL 0x01800000 /* Alternate interrupt location */
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#define LPCR_AIL_0 0x00000000 /* MMU off exception offset 0x0 */
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#define LPCR_AIL_3 0x01800000 /* MMU on exception offset 0xc00...4xxx */
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#define LPCR_ONL 0x00040000 /* online - PURR/SPURR count */
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#define LPCR_PECE 0x0001f000 /* powersave exit cause enable */
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#define LPCR_PECEDP 0x00010000 /* directed priv dbells cause exit */
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#define LPCR_PECEDH 0x00008000 /* directed hyp dbells cause exit */
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@ -789,8 +789,11 @@ static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr)
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/*
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* Userspace can only modify DPFD (default prefetch depth),
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* ILE (interrupt little-endian) and TC (translation control).
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* On POWER8 userspace can also modify AIL (alt. interrupt loc.)
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*/
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mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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mask |= LPCR_AIL;
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vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
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spin_unlock(&vc->lock);
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}
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@ -2166,6 +2169,9 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
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LPCR_VPM0 | LPCR_VPM1;
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kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
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(VRMA_VSID << SLB_VSID_SHIFT_1T);
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/* On POWER8 turn on online bit to enable PURR/SPURR */
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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lpcr |= LPCR_ONL;
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}
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kvm->arch.lpcr = lpcr;
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