gpio/crystalcove: Add additional GPIO for Panel control
Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed by display driver to enable the DSI panel on BYT platform where the Panel EN/Disable control is routed thorugh CRC PMIC CC: Samuel Ortiz <sameo@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -24,7 +24,7 @@
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#include <linux/mfd/intel_soc_pmic.h>
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#define CRYSTALCOVE_GPIO_NUM 16
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#define CRYSTALCOVE_VGPIO_NUM 94
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#define CRYSTALCOVE_VGPIO_NUM 95
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#define UPDATE_IRQ_TYPE BIT(0)
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#define UPDATE_IRQ_MASK BIT(1)
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@ -39,6 +39,7 @@
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#define GPIO0P0CTLI 0x33
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#define GPIO1P0CTLO 0x3b
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#define GPIO1P0CTLI 0x43
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#define GPIOPANELCTL 0x52
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#define CTLI_INTCNT_DIS (0)
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#define CTLI_INTCNT_NE (1 << 1)
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@ -93,6 +94,10 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type)
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{
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int reg;
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if (gpio == 94) {
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return GPIOPANELCTL;
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}
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if (reg_type == CTRL_IN) {
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if (gpio < 8)
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reg = GPIO0P0CTLI;
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