mmc: sunxi: add support for A64 mmc controller
A64 SoC features a MMC controller which need only the mod clock, and can calibrate delay by itself. This patch adds support for the new MMC controller IP core. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -72,6 +72,13 @@
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#define SDXC_REG_CHDA (0x90)
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#define SDXC_REG_CBDA (0x94)
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/* New registers introduced in A64 */
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#define SDXC_REG_A12A 0x058 /* SMC Auto Command 12 Register */
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#define SDXC_REG_SD_NTSR 0x05C /* SMC New Timing Set Register */
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#define SDXC_REG_DRV_DL 0x140 /* Drive Delay Control Register */
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#define SDXC_REG_SAMP_DL_REG 0x144 /* SMC sample delay control */
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#define SDXC_REG_DS_DL_REG 0x148 /* SMC data strobe delay control */
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#define mmc_readl(host, reg) \
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readl((host)->reg_base + SDXC_##reg)
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#define mmc_writel(host, reg, value) \
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@ -217,6 +224,17 @@
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#define SDXC_CLK_50M_DDR 3
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#define SDXC_CLK_50M_DDR_8BIT 4
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#define SDXC_2X_TIMING_MODE BIT(31)
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#define SDXC_CAL_START BIT(15)
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#define SDXC_CAL_DONE BIT(14)
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#define SDXC_CAL_DL_SHIFT 8
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#define SDXC_CAL_DL_SW_EN BIT(7)
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#define SDXC_CAL_DL_SW_SHIFT 0
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#define SDXC_CAL_DL_MASK 0x3f
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#define SDXC_CAL_TIMEOUT 3 /* in seconds, 3s is enough*/
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struct sunxi_mmc_clk_delay {
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u32 output;
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u32 sample;
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@ -232,6 +250,9 @@ struct sunxi_idma_des {
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struct sunxi_mmc_cfg {
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u32 idma_des_size_bits;
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const struct sunxi_mmc_clk_delay *clk_delays;
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/* does the IP block support autocalibration? */
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bool can_calibrate;
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};
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struct sunxi_mmc_host {
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@ -660,6 +681,47 @@ static int sunxi_mmc_oclk_onoff(struct sunxi_mmc_host *host, u32 oclk_en)
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return 0;
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}
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static int sunxi_mmc_calibrate(struct sunxi_mmc_host *host, int reg_off)
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{
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u32 reg = readl(host->reg_base + reg_off);
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u32 delay;
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unsigned long timeout;
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if (!host->cfg->can_calibrate)
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return 0;
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reg &= ~(SDXC_CAL_DL_MASK << SDXC_CAL_DL_SW_SHIFT);
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reg &= ~SDXC_CAL_DL_SW_EN;
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writel(reg | SDXC_CAL_START, host->reg_base + reg_off);
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dev_dbg(mmc_dev(host->mmc), "calibration started\n");
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timeout = jiffies + HZ * SDXC_CAL_TIMEOUT;
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while (!((reg = readl(host->reg_base + reg_off)) & SDXC_CAL_DONE)) {
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if (time_before(jiffies, timeout))
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cpu_relax();
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else {
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reg &= ~SDXC_CAL_START;
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writel(reg, host->reg_base + reg_off);
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return -ETIMEDOUT;
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}
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}
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delay = (reg >> SDXC_CAL_DL_SHIFT) & SDXC_CAL_DL_MASK;
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reg &= ~SDXC_CAL_START;
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reg |= (delay << SDXC_CAL_DL_SW_SHIFT) | SDXC_CAL_DL_SW_EN;
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writel(reg, host->reg_base + reg_off);
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dev_dbg(mmc_dev(host->mmc), "calibration ended, reg is 0x%x\n", reg);
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return 0;
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}
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static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
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struct mmc_ios *ios, u32 rate)
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{
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@ -740,6 +802,12 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
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if (ret)
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return ret;
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ret = sunxi_mmc_calibrate(host, SDXC_REG_SAMP_DL_REG);
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if (ret)
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return ret;
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/* TODO: enable calibrate on sdc2 SDXC_REG_DS_DL_REG of A64 */
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return sunxi_mmc_oclk_onoff(host, 1);
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}
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@ -991,21 +1059,31 @@ static const struct sunxi_mmc_clk_delay sun9i_mmc_clk_delays[] = {
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static const struct sunxi_mmc_cfg sun4i_a10_cfg = {
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.idma_des_size_bits = 13,
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.clk_delays = NULL,
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.can_calibrate = false,
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};
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static const struct sunxi_mmc_cfg sun5i_a13_cfg = {
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.idma_des_size_bits = 16,
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.clk_delays = NULL,
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.can_calibrate = false,
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};
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static const struct sunxi_mmc_cfg sun7i_a20_cfg = {
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.idma_des_size_bits = 16,
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.clk_delays = sunxi_mmc_clk_delays,
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.can_calibrate = false,
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};
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static const struct sunxi_mmc_cfg sun9i_a80_cfg = {
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.idma_des_size_bits = 16,
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.clk_delays = sun9i_mmc_clk_delays,
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.can_calibrate = false,
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};
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static const struct sunxi_mmc_cfg sun50i_a64_cfg = {
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.idma_des_size_bits = 16,
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.clk_delays = NULL,
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.can_calibrate = true,
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};
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static const struct of_device_id sunxi_mmc_of_match[] = {
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@ -1013,6 +1091,7 @@ static const struct of_device_id sunxi_mmc_of_match[] = {
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{ .compatible = "allwinner,sun5i-a13-mmc", .data = &sun5i_a13_cfg },
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{ .compatible = "allwinner,sun7i-a20-mmc", .data = &sun7i_a20_cfg },
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{ .compatible = "allwinner,sun9i-a80-mmc", .data = &sun9i_a80_cfg },
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{ .compatible = "allwinner,sun50i-a64-mmc", .data = &sun50i_a64_cfg },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sunxi_mmc_of_match);
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