powerpc/powernv: Load correct TOC pointer while waking up from winkle.
The function pnv_restore_hyp_resource() loads the TOC into r2 from
the invalid PACA pointer before fixing r13 value. This do not affect
POWER ISA 3.0 but it does have an impact on POWER ISA 2.07 or less
leading CPU to get stuck forever.
login: [ 471.830433] Processor 120 is stuck.
This can be easily reproducible using following steps:
- Turn off SMT
$ ppc64_cpu --smt=off
- offline/online any online cpu (Thread 0 of any core which is online)
$ echo 0 > /sys/devices/system/cpu/cpu<num>/online
$ echo 1 > /sys/devices/system/cpu/cpu<num>/online
For POWER ISA 2.07 or less, the last bit of HSPRG0 is set indicating
that thread is waking up from winkle. Hence, the last bit of HSPRG0(r13)
needs to be clear before accessing it as PACA to avoid loading invalid
values from invalid PACA pointer.
Fix this by loading TOC after r13 register is corrected.
Fixes: bcef83a00d
("powerpc/powernv: Add platform support for stop instruction")
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Acked-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
parent
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@ -363,8 +363,8 @@ _GLOBAL(power9_idle_stop)
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* cr3 - set to gt if waking up with partial/complete hypervisor state loss
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*/
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_GLOBAL(pnv_restore_hyp_resource)
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ld r2,PACATOC(r13);
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BEGIN_FTR_SECTION
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ld r2,PACATOC(r13);
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/*
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* POWER ISA 3. Use PSSCR to determine if we
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* are waking up from deep idle state
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@ -395,6 +395,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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*/
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clrldi r5,r13,63
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clrrdi r13,r13,1
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/* Now that we are sure r13 is corrected, load TOC */
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ld r2,PACATOC(r13);
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cmpwi cr4,r5,1
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mtspr SPRN_HSPRG0,r13
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