ASoC: Further optimise WM8400 bias configuration sequence
The active discharge does not bring sufficient benefit to justify the lengthy times involved so don't do that. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -1096,45 +1096,22 @@ static int wm8400_set_bias_level(struct snd_soc_codec *codec,
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wm8400_write(codec, WM8400_POWER_MANAGEMENT_1,
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WM8400_CODEC_ENA | WM8400_SYSCLK_ENA);
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/* Enable all output discharge bits */
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wm8400_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE |
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WM8400_DIS_RLINE | WM8400_DIS_OUT3 |
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WM8400_DIS_OUT4 | WM8400_DIS_LOUT |
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WM8400_DIS_ROUT);
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/* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
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wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
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WM8400_BUFDCOPEN | WM8400_POBCTRL);
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msleep(500);
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/* Enable outputs */
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val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);
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val |= WM8400_SPK_ENA | WM8400_OUT3_ENA |
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WM8400_OUT4_ENA | WM8400_LOUT_ENA |
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WM8400_ROUT_ENA;
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wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
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/* disable all output discharge bits */
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wm8400_write(codec, WM8400_ANTIPOP1, 0);
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msleep(50);
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/* Enable VREF & VMID at 2x50k */
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val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);
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val |= 0x2 | WM8400_VREF_ENA;
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wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
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msleep(600);
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/* Enable BUFIOEN */
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wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
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WM8400_BUFDCOPEN | WM8400_POBCTRL |
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WM8400_BUFIOEN);
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/* Disable outputs */
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val &= ~(WM8400_SPK_ENA | WM8400_OUT3_ENA |
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WM8400_OUT4_ENA | WM8400_LOUT_ENA |
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WM8400_ROUT_ENA);
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wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
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/* disable POBCTRL, SOFT_ST and BUFDCOPEN */
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wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN);
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}
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