[PATCH] bcm43xx: sync interference mitigation code to the specs.
This also includes a rewritten valuesave-stack. Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Michael Buesch
John W. Linville
parent
6ecb26904c
commit
e382c234cb
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@ -526,8 +526,16 @@ struct bcm43xx_radioinfo {
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/* Current Interference Mitigation mode */
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int interfmode;
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/* Stack of saved values from the Interference Mitigation code */
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u16 interfstack[20];
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/* Stack of saved values from the Interference Mitigation code.
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* Each value in the stack is layed out as follows:
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* bit 0-11: offset
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* bit 12-15: register ID
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* bit 16-32: value
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* register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
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*/
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#define BCM43xx_INTERFSTACK_SIZE 26
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u32 interfstack[BCM43xx_INTERFSTACK_SIZE];
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/* Saved values from the NRSSI Slope calculation */
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s16 nrssi[2];
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s32 nrssislope;
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@ -879,24 +879,76 @@ void bcm43xx_calc_nrssi_threshold(struct bcm43xx_private *bcm)
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}
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}
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/* Helper macros to save on and restore values from the radio->interfstack */
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#ifdef stack_save
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# undef stack_save
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#endif
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#ifdef stack_restore
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# undef stack_restore
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#endif
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#define stack_save(value) \
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do { \
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assert(i < ARRAY_SIZE(radio->interfstack)); \
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stack[i++] = (value); \
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} while (0)
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/* Stack implementation to save/restore values from the
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* interference mitigation code.
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* It is save to restore values in random order.
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*/
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static void _stack_save(u32 *_stackptr, size_t *stackidx,
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u8 id, u16 offset, u16 value)
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{
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u32 *stackptr = &(_stackptr[*stackidx]);
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#define stack_restore() \
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({ \
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assert(i < ARRAY_SIZE(radio->interfstack)); \
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stack[i++]; \
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})
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assert((offset & 0xF000) == 0x0000);
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assert((id & 0xF0) == 0x00);
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*stackptr = offset;
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*stackptr |= ((u32)id) << 12;
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*stackptr |= ((u32)value) << 16;
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(*stackidx)++;
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assert(*stackidx < BCM43xx_INTERFSTACK_SIZE);
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}
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static u16 _stack_restore(u32 *stackptr,
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u8 id, u16 offset)
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{
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size_t i;
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assert((offset & 0xF000) == 0x0000);
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assert((id & 0xF0) == 0x00);
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for (i = 0; i < BCM43xx_INTERFSTACK_SIZE; i++, stackptr++) {
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if ((*stackptr & 0x00000FFF) != offset)
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continue;
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if (((*stackptr & 0x0000F000) >> 12) != id)
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continue;
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return ((*stackptr & 0xFFFF0000) >> 16);
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}
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assert(0);
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return 0;
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}
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#define phy_stacksave(offset) \
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do { \
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_stack_save(stack, &stackidx, 0x1, (offset), \
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bcm43xx_phy_read(bcm, (offset))); \
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} while (0)
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#define phy_stackrestore(offset) \
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do { \
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bcm43xx_phy_write(bcm, (offset), \
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_stack_restore(stack, 0x1, \
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(offset))); \
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} while (0)
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#define radio_stacksave(offset) \
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do { \
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_stack_save(stack, &stackidx, 0x2, (offset), \
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bcm43xx_radio_read16(bcm, (offset))); \
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} while (0)
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#define radio_stackrestore(offset) \
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do { \
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bcm43xx_radio_write16(bcm, (offset), \
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_stack_restore(stack, 0x2, \
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(offset))); \
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} while (0)
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#define ilt_stacksave(offset) \
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do { \
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_stack_save(stack, &stackidx, 0x3, (offset), \
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bcm43xx_ilt_read(bcm, (offset))); \
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} while (0)
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#define ilt_stackrestore(offset) \
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do { \
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bcm43xx_ilt_write(bcm, (offset), \
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_stack_restore(stack, 0x3, \
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(offset))); \
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} while (0)
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static void
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bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
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@ -904,144 +956,231 @@ bcm43xx_radio_interference_mitigation_enable(struct bcm43xx_private *bcm,
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{
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struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
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struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
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int i = 0;
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u16 *stack = radio->interfstack;
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u16 tmp, flipped;
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u32 tmp32;
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size_t stackidx = 0;
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u32 *stack = radio->interfstack;
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switch (mode) {
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case BCM43xx_RADIO_INTERFMODE_NONWLAN:
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if (phy->rev != 1) {
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bcm43xx_phy_write(bcm, 0x042B,
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bcm43xx_phy_read(bcm, 0x042B) & 0x0800);
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bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
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bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
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bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & ~0x4000);
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break;
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}
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radio_stacksave(0x0078);
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tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
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flipped = flip_4bit(tmp);
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if ((flipped >> 1) >= 4)
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tmp = flipped - 3;
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tmp = flip_4bit(tmp);
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bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
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if (flipped < 10 && flipped >= 8)
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flipped = 7;
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else if (flipped >= 10)
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flipped -= 3;
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flipped = flip_4bit(flipped);
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flipped = (flipped << 1) | 0x0020;
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bcm43xx_radio_write16(bcm, 0x0078, flipped);
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bcm43xx_calc_nrssi_threshold(bcm);
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if (bcm->current_core->rev < 5) {
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stack_save(bcm43xx_phy_read(bcm, 0x0406));
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bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
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} else {
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stack_save(bcm43xx_phy_read(bcm, 0x04C0));
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stack_save(bcm43xx_phy_read(bcm, 0x04C1));
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bcm43xx_phy_write(bcm, 0x04C0, 0x3E04);
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bcm43xx_phy_write(bcm, 0x04C1, 0x0640);
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}
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phy_stacksave(0x0406);
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bcm43xx_phy_write(bcm, 0x0406, 0x7E28);
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bcm43xx_phy_write(bcm, 0x042B,
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bcm43xx_phy_read(bcm, 0x042B) | 0x0800);
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bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
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bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | 0x1000);
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stack_save(bcm43xx_phy_read(bcm, 0x04A0));
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phy_stacksave(0x04A0);
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bcm43xx_phy_write(bcm, 0x04A0,
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(bcm43xx_phy_read(bcm, 0x04A0) & 0xC0C0) | 0x0008);
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stack_save(bcm43xx_phy_read(bcm, 0x04A1));
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phy_stacksave(0x04A1);
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bcm43xx_phy_write(bcm, 0x04A1,
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(bcm43xx_phy_read(bcm, 0x04A1) & 0xC0C0) | 0x0605);
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stack_save(bcm43xx_phy_read(bcm, 0x04A2));
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phy_stacksave(0x04A2);
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bcm43xx_phy_write(bcm, 0x04A2,
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(bcm43xx_phy_read(bcm, 0x04A2) & 0xC0C0) | 0x0204);
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stack_save(bcm43xx_phy_read(bcm, 0x04A8));
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phy_stacksave(0x04A8);
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bcm43xx_phy_write(bcm, 0x04A8,
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(bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0403);
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stack_save(bcm43xx_phy_read(bcm, 0x04AB));
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(bcm43xx_phy_read(bcm, 0x04A8) & 0xC0C0) | 0x0803);
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phy_stacksave(0x04AB);
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bcm43xx_phy_write(bcm, 0x04AB,
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(bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0504);
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(bcm43xx_phy_read(bcm, 0x04AB) & 0xC0C0) | 0x0605);
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stack_save(bcm43xx_phy_read(bcm, 0x04A7));
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phy_stacksave(0x04A7);
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bcm43xx_phy_write(bcm, 0x04A7, 0x0002);
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stack_save(bcm43xx_phy_read(bcm, 0x04A3));
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phy_stacksave(0x04A3);
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bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
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stack_save(bcm43xx_phy_read(bcm, 0x04A9));
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phy_stacksave(0x04A9);
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bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
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stack_save(bcm43xx_phy_read(bcm, 0x0493));
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phy_stacksave(0x0493);
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bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
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stack_save(bcm43xx_phy_read(bcm, 0x04AA));
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phy_stacksave(0x04AA);
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bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
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stack_save(bcm43xx_phy_read(bcm, 0x04AC));
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phy_stacksave(0x04AC);
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bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
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break;
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case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
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if (bcm43xx_phy_read(bcm, 0x0033) == 0x0800)
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if (bcm43xx_phy_read(bcm, 0x0033) & 0x0800)
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break;
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radio->aci_enable = 1;
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stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD));
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stack_save(bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS));
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if (bcm->current_core->rev < 5) {
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stack_save(bcm43xx_phy_read(bcm, 0x0406));
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phy_stacksave(BCM43xx_PHY_RADIO_BITFIELD);
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phy_stacksave(BCM43xx_PHY_G_CRS);
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if (phy->rev < 2) {
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phy_stacksave(0x0406);
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} else {
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stack_save(bcm43xx_phy_read(bcm, 0x04C0));
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stack_save(bcm43xx_phy_read(bcm, 0x04C1));
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phy_stacksave(0x04C0);
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phy_stacksave(0x04C1);
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}
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stack_save(bcm43xx_phy_read(bcm, 0x0033));
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stack_save(bcm43xx_phy_read(bcm, 0x04A7));
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stack_save(bcm43xx_phy_read(bcm, 0x04A3));
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stack_save(bcm43xx_phy_read(bcm, 0x04A9));
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stack_save(bcm43xx_phy_read(bcm, 0x04AA));
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stack_save(bcm43xx_phy_read(bcm, 0x04AC));
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stack_save(bcm43xx_phy_read(bcm, 0x0493));
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stack_save(bcm43xx_phy_read(bcm, 0x04A1));
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stack_save(bcm43xx_phy_read(bcm, 0x04A0));
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stack_save(bcm43xx_phy_read(bcm, 0x04A2));
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stack_save(bcm43xx_phy_read(bcm, 0x048A));
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stack_save(bcm43xx_phy_read(bcm, 0x04A8));
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stack_save(bcm43xx_phy_read(bcm, 0x04AB));
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phy_stacksave(0x0033);
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phy_stacksave(0x04A7);
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phy_stacksave(0x04A3);
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phy_stacksave(0x04A9);
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phy_stacksave(0x04AA);
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phy_stacksave(0x04AC);
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phy_stacksave(0x0493);
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phy_stacksave(0x04A1);
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phy_stacksave(0x04A0);
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phy_stacksave(0x04A2);
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phy_stacksave(0x048A);
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phy_stacksave(0x04A8);
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phy_stacksave(0x04AB);
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if (phy->rev == 2) {
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phy_stacksave(0x04AD);
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phy_stacksave(0x04AE);
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} else if (phy->rev >= 3) {
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phy_stacksave(0x04AD);
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phy_stacksave(0x0415);
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phy_stacksave(0x0416);
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phy_stacksave(0x0417);
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ilt_stacksave(0x1A00 + 0x2);
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ilt_stacksave(0x1A00 + 0x3);
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}
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phy_stacksave(0x042B);
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phy_stacksave(0x048C);
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bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
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bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & 0xEFFF);
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bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
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& ~0x1000);
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bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
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(bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xEFFF) | 0x0002);
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(bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS)
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& 0xFFFC) | 0x0002);
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bcm43xx_phy_write(bcm, 0x04A7, 0x0800);
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bcm43xx_phy_write(bcm, 0x04A3, 0x287A);
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bcm43xx_phy_write(bcm, 0x04A9, 0x2027);
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bcm43xx_phy_write(bcm, 0x0493, 0x32F5);
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bcm43xx_phy_write(bcm, 0x04AA, 0x2027);
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bcm43xx_phy_write(bcm, 0x04AC, 0x32F5);
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bcm43xx_phy_write(bcm, 0x0033, 0x0800);
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bcm43xx_phy_write(bcm, 0x04A3, 0x2027);
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bcm43xx_phy_write(bcm, 0x04A9, 0x1CA8);
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bcm43xx_phy_write(bcm, 0x0493, 0x287A);
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bcm43xx_phy_write(bcm, 0x04AA, 0x1CA8);
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bcm43xx_phy_write(bcm, 0x04AC, 0x287A);
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bcm43xx_phy_write(bcm, 0x04A0,
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(bcm43xx_phy_read(bcm, 0x04A0) & 0xFFC0) | 0x001A);
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if (bcm->current_core->rev < 5) {
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bcm43xx_phy_write(bcm, 0x0406, 0x280D);
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} else {
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bcm43xx_phy_write(bcm, 0x04C0, 0x0640);
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(bcm43xx_phy_read(bcm, 0x04A0)
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& 0xFFC0) | 0x001A);
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bcm43xx_phy_write(bcm, 0x04A7, 0x000D);
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if (phy->rev < 2) {
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bcm43xx_phy_write(bcm, 0x0406, 0xFF0D);
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} else if (phy->rev == 2) {
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bcm43xx_phy_write(bcm, 0x04C0, 0xFFFF);
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bcm43xx_phy_write(bcm, 0x04C1, 0x00A9);
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} else {
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bcm43xx_phy_write(bcm, 0x04C0, 0x00C1);
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bcm43xx_phy_write(bcm, 0x04C1, 0x0059);
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}
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bcm43xx_phy_write(bcm, 0x04A1,
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(bcm43xx_phy_read(bcm, 0x04A1) & 0xC0FF) | 0x1800);
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(bcm43xx_phy_read(bcm, 0x04A1)
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& 0xC0FF) | 0x1800);
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bcm43xx_phy_write(bcm, 0x04A1,
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(bcm43xx_phy_read(bcm, 0x04A1) & 0xFFC0) | 0x0016);
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(bcm43xx_phy_read(bcm, 0x04A1)
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& 0xFFC0) | 0x0015);
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bcm43xx_phy_write(bcm, 0x04A8,
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(bcm43xx_phy_read(bcm, 0x04A8)
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& 0xCFFF) | 0x1000);
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bcm43xx_phy_write(bcm, 0x04A8,
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(bcm43xx_phy_read(bcm, 0x04A8)
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& 0xF0FF) | 0x0A00);
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bcm43xx_phy_write(bcm, 0x04AB,
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(bcm43xx_phy_read(bcm, 0x04AB)
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& 0xCFFF) | 0x1000);
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bcm43xx_phy_write(bcm, 0x04AB,
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(bcm43xx_phy_read(bcm, 0x04AB)
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& 0xF0FF) | 0x0800);
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bcm43xx_phy_write(bcm, 0x04AB,
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(bcm43xx_phy_read(bcm, 0x04AB)
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& 0xFFCF) | 0x0010);
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bcm43xx_phy_write(bcm, 0x04AB,
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(bcm43xx_phy_read(bcm, 0x04AB)
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& 0xFFF0) | 0x0005);
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bcm43xx_phy_write(bcm, 0x04A8,
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(bcm43xx_phy_read(bcm, 0x04A8)
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& 0xFFCF) | 0x0010);
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bcm43xx_phy_write(bcm, 0x04A8,
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(bcm43xx_phy_read(bcm, 0x04A8)
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& 0xFFF0) | 0x0006);
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bcm43xx_phy_write(bcm, 0x04A2,
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(bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0900);
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(bcm43xx_phy_read(bcm, 0x04A2)
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& 0xF0FF) | 0x0800);
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bcm43xx_phy_write(bcm, 0x04A0,
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(bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0700);
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(bcm43xx_phy_read(bcm, 0x04A0)
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& 0xF0FF) | 0x0500);
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bcm43xx_phy_write(bcm, 0x04A2,
|
||||
(bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x000D);
|
||||
bcm43xx_phy_write(bcm, 0x04A8,
|
||||
(bcm43xx_phy_read(bcm, 0x04A8) & 0xCFFF) | 0x1000);
|
||||
bcm43xx_phy_write(bcm, 0x04A8,
|
||||
(bcm43xx_phy_read(bcm, 0x04A8) & 0xF0FF) | 0x0A00);
|
||||
bcm43xx_phy_write(bcm, 0x04AB,
|
||||
(bcm43xx_phy_read(bcm, 0x04AB) & 0xCFFF) | 0x1000);
|
||||
bcm43xx_phy_write(bcm, 0x04AB,
|
||||
(bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0800);
|
||||
bcm43xx_phy_write(bcm, 0x04AB,
|
||||
(bcm43xx_phy_read(bcm, 0x04AB) & 0xFFCF) | 0x0010);
|
||||
bcm43xx_phy_write(bcm, 0x04AB,
|
||||
(bcm43xx_phy_read(bcm, 0x04AB) & 0xFFF0) | 0x0006);
|
||||
(bcm43xx_phy_read(bcm, 0x04A2)
|
||||
& 0xFFF0) | 0x000B);
|
||||
|
||||
if (phy->rev >= 3) {
|
||||
bcm43xx_phy_write(bcm, 0x048A,
|
||||
bcm43xx_phy_read(bcm, 0x048A)
|
||||
& ~0x8000);
|
||||
bcm43xx_phy_write(bcm, 0x0415,
|
||||
(bcm43xx_phy_read(bcm, 0x0415)
|
||||
& 0x8000) | 0x36D8);
|
||||
bcm43xx_phy_write(bcm, 0x0416,
|
||||
(bcm43xx_phy_read(bcm, 0x0416)
|
||||
& 0x8000) | 0x36D8);
|
||||
bcm43xx_phy_write(bcm, 0x0417,
|
||||
(bcm43xx_phy_read(bcm, 0x0417)
|
||||
& 0xFE00) | 0x016D);
|
||||
} else {
|
||||
bcm43xx_phy_write(bcm, 0x048A,
|
||||
bcm43xx_phy_read(bcm, 0x048A)
|
||||
| 0x1000);
|
||||
bcm43xx_phy_write(bcm, 0x048A,
|
||||
(bcm43xx_phy_read(bcm, 0x048A)
|
||||
& 0x9FFF) | 0x2000);
|
||||
tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
|
||||
BCM43xx_UCODEFLAGS_OFFSET);
|
||||
if (!(tmp32 & 0x800)) {
|
||||
tmp32 |= 0x800;
|
||||
bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
|
||||
BCM43xx_UCODEFLAGS_OFFSET,
|
||||
tmp32);
|
||||
}
|
||||
}
|
||||
if (phy->rev >= 2) {
|
||||
bcm43xx_phy_write(bcm, 0x042B,
|
||||
bcm43xx_phy_read(bcm, 0x042B)
|
||||
| 0x0800);
|
||||
}
|
||||
bcm43xx_phy_write(bcm, 0x048C,
|
||||
(bcm43xx_phy_read(bcm, 0x048C)
|
||||
& 0xF0FF) | 0x0200);
|
||||
if (phy->rev == 2) {
|
||||
bcm43xx_phy_write(bcm, 0x04AE,
|
||||
(bcm43xx_phy_read(bcm, 0x04AE)
|
||||
& 0xFF00) | 0x007F);
|
||||
bcm43xx_phy_write(bcm, 0x04AD,
|
||||
(bcm43xx_phy_read(bcm, 0x04AD)
|
||||
& 0x00FF) | 0x1300);
|
||||
} else if (phy->rev >= 6) {
|
||||
bcm43xx_ilt_write(bcm, 0x1A00 + 0x3, 0x007F);
|
||||
bcm43xx_ilt_write(bcm, 0x1A00 + 0x2, 0x007F);
|
||||
bcm43xx_phy_write(bcm, 0x04AD,
|
||||
bcm43xx_phy_read(bcm, 0x04AD)
|
||||
& 0x00FF);
|
||||
}
|
||||
bcm43xx_calc_nrssi_slope(bcm);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -1055,9 +1194,8 @@ bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
|
|||
{
|
||||
struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
|
||||
struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
|
||||
int i = 0;
|
||||
u16 *stack = radio->interfstack;
|
||||
u16 tmp, flipped;
|
||||
u32 tmp32;
|
||||
u32 *stack = radio->interfstack;
|
||||
|
||||
switch (mode) {
|
||||
case BCM43xx_RADIO_INTERFMODE_NONWLAN:
|
||||
|
|
@ -1065,71 +1203,80 @@ bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
|
|||
bcm43xx_phy_write(bcm, 0x042B,
|
||||
bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
|
||||
bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
|
||||
break;
|
||||
}
|
||||
tmp = (bcm43xx_radio_read16(bcm, 0x0078) & 0x001E);
|
||||
flipped = flip_4bit(tmp);
|
||||
if ((flipped >> 1) >= 0x000C)
|
||||
tmp = flipped + 3;
|
||||
tmp = flip_4bit(tmp);
|
||||
bcm43xx_radio_write16(bcm, 0x0078, tmp << 1);
|
||||
|
||||
phy_stackrestore(0x0078);
|
||||
bcm43xx_calc_nrssi_threshold(bcm);
|
||||
|
||||
if (bcm->current_core->rev < 5) {
|
||||
bcm43xx_phy_write(bcm, 0x0406, stack_restore());
|
||||
} else {
|
||||
bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
|
||||
}
|
||||
phy_stackrestore(0x0406);
|
||||
bcm43xx_phy_write(bcm, 0x042B,
|
||||
bcm43xx_phy_read(bcm, 0x042B) & ~0x0800);
|
||||
|
||||
if (!bcm->bad_frames_preempt)
|
||||
if (!bcm->bad_frames_preempt) {
|
||||
bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) & ~(1 << 11));
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD)
|
||||
& ~(1 << 11));
|
||||
}
|
||||
bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0x4000);
|
||||
bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x0493, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
|
||||
bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) | 0x4000);
|
||||
phy_stackrestore(0x04A0);
|
||||
phy_stackrestore(0x04A1);
|
||||
phy_stackrestore(0x04A2);
|
||||
phy_stackrestore(0x04A8);
|
||||
phy_stackrestore(0x04AB);
|
||||
phy_stackrestore(0x04A7);
|
||||
phy_stackrestore(0x04A3);
|
||||
phy_stackrestore(0x04A9);
|
||||
phy_stackrestore(0x0493);
|
||||
phy_stackrestore(0x04AA);
|
||||
phy_stackrestore(0x04AC);
|
||||
break;
|
||||
case BCM43xx_RADIO_INTERFMODE_MANUALWLAN:
|
||||
if (bcm43xx_phy_read(bcm, 0x0033) != 0x0800)
|
||||
if (!(bcm43xx_phy_read(bcm, 0x0033) & 0x0800))
|
||||
break;
|
||||
|
||||
radio->aci_enable = 0;
|
||||
|
||||
bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD, stack_restore());
|
||||
bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, stack_restore());
|
||||
if (bcm->current_core->rev < 5) {
|
||||
bcm43xx_phy_write(bcm, 0x0406, stack_restore());
|
||||
} else {
|
||||
bcm43xx_phy_write(bcm, 0x04C0, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04C1, stack_restore());
|
||||
phy_stackrestore(BCM43xx_PHY_RADIO_BITFIELD);
|
||||
phy_stackrestore(BCM43xx_PHY_G_CRS);
|
||||
phy_stackrestore(0x0033);
|
||||
phy_stackrestore(0x04A3);
|
||||
phy_stackrestore(0x04A9);
|
||||
phy_stackrestore(0x0493);
|
||||
phy_stackrestore(0x04AA);
|
||||
phy_stackrestore(0x04AC);
|
||||
phy_stackrestore(0x04A0);
|
||||
phy_stackrestore(0x04A7);
|
||||
if (phy->rev >= 2) {
|
||||
phy_stackrestore(0x04C0);
|
||||
phy_stackrestore(0x04C1);
|
||||
} else
|
||||
phy_stackrestore(0x0406);
|
||||
phy_stackrestore(0x04A1);
|
||||
phy_stackrestore(0x04AB);
|
||||
phy_stackrestore(0x04A8);
|
||||
if (phy->rev == 2) {
|
||||
phy_stackrestore(0x04AD);
|
||||
phy_stackrestore(0x04AE);
|
||||
} else if (phy->rev >= 3) {
|
||||
phy_stackrestore(0x04AD);
|
||||
phy_stackrestore(0x0415);
|
||||
phy_stackrestore(0x0416);
|
||||
phy_stackrestore(0x0417);
|
||||
ilt_stackrestore(0x1A00 + 0x2);
|
||||
ilt_stackrestore(0x1A00 + 0x3);
|
||||
}
|
||||
phy_stackrestore(0x04A2);
|
||||
phy_stackrestore(0x04A8);
|
||||
phy_stackrestore(0x042B);
|
||||
phy_stackrestore(0x048C);
|
||||
tmp32 = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
|
||||
BCM43xx_UCODEFLAGS_OFFSET);
|
||||
if (tmp32 & 0x800) {
|
||||
tmp32 &= ~0x800;
|
||||
bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
|
||||
BCM43xx_UCODEFLAGS_OFFSET,
|
||||
tmp32);
|
||||
}
|
||||
bcm43xx_phy_write(bcm, 0x0033, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A7, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A3, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A9, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AA, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AC, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x0493, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A1, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A0, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A2, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04A8, stack_restore());
|
||||
bcm43xx_phy_write(bcm, 0x04AB, stack_restore());
|
||||
|
||||
bcm43xx_calc_nrssi_slope(bcm);
|
||||
break;
|
||||
default:
|
||||
|
|
@ -1137,8 +1284,12 @@ bcm43xx_radio_interference_mitigation_disable(struct bcm43xx_private *bcm,
|
|||
}
|
||||
}
|
||||
|
||||
#undef stack_save
|
||||
#undef stack_restore
|
||||
#undef phy_stacksave
|
||||
#undef phy_stackrestore
|
||||
#undef radio_stacksave
|
||||
#undef radio_stackrestore
|
||||
#undef ilt_stacksave
|
||||
#undef ilt_stackrestore
|
||||
|
||||
int bcm43xx_radio_set_interference_mitigation(struct bcm43xx_private *bcm,
|
||||
int mode)
|
||||
|
|
|
|||
Loading…
Reference in a new issue