Merge branch 'linus' into core/rcu, to fix up a semantic conflict
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
e4340bbb07
1
.mailmap
1
.mailmap
|
@ -59,6 +59,7 @@ James Bottomley <jejb@mulgrave.(none)>
|
|||
James Bottomley <jejb@titanic.il.steeleye.com>
|
||||
James E Wilson <wilson@specifix.com>
|
||||
James Ketrenos <jketreno@io.(none)>
|
||||
<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
Jeff Garzik <jgarzik@pretzel.yyz.us>
|
||||
Jens Axboe <axboe@suse.de>
|
||||
|
|
7
Documentation/arm/OMAP/README
Normal file
7
Documentation/arm/OMAP/README
Normal file
|
@ -0,0 +1,7 @@
|
|||
This file contains documentation for running mainline
|
||||
kernel on omaps.
|
||||
|
||||
KERNEL NEW DEPENDENCIES
|
||||
v4.3+ Update is needed for custom .config files to make sure
|
||||
CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work
|
||||
properly.
|
|
@ -894,11 +894,12 @@ M: Lennert Buytenhek <kernel@wantstofly.org>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
ARM/Allwinner A1X SoC support
|
||||
ARM/Allwinner sunXi SoC support
|
||||
M: Maxime Ripard <maxime.ripard@free-electrons.com>
|
||||
M: Chen-Yu Tsai <wens@csie.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
N: sun[x4567]i
|
||||
N: sun[x456789]i
|
||||
|
||||
ARM/Allwinner SoC Clock Support
|
||||
M: Emilio López <emilio@elopez.com.ar>
|
||||
|
@ -6793,7 +6794,6 @@ F: drivers/scsi/megaraid/
|
|||
|
||||
MELLANOX ETHERNET DRIVER (mlx4_en)
|
||||
M: Amir Vadai <amirv@mellanox.com>
|
||||
M: Ido Shamay <idos@mellanox.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.mellanox.com
|
||||
|
@ -11675,6 +11675,7 @@ F: drivers/tty/serial/zs.*
|
|||
ZSMALLOC COMPRESSED SLAB MEMORY ALLOCATOR
|
||||
M: Minchan Kim <minchan@kernel.org>
|
||||
M: Nitin Gupta <ngupta@vflare.org>
|
||||
R: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zsmalloc.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -645,6 +645,7 @@ config ARCH_SHMOBILE_LEGACY
|
|||
|
||||
config ARCH_RPC
|
||||
bool "RiscPC"
|
||||
depends on MMU
|
||||
select ARCH_ACORN
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
|
|
|
@ -402,11 +402,12 @@
|
|||
/* SMPS9 unused */
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
/* VDD_SD */
|
||||
/* VDD_SD / VDDSHV8 */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: ldo2 {
|
||||
|
|
|
@ -46,7 +46,7 @@
|
|||
|
||||
/ {
|
||||
model = "Marvell Armada 385 Access Point Development Board";
|
||||
compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x";
|
||||
compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial1:115200n8";
|
||||
|
|
|
@ -152,7 +152,7 @@
|
|||
};
|
||||
|
||||
usb_phy2: phy@a2f400 {
|
||||
compatible = "marvell,berlin2-usb-phy";
|
||||
compatible = "marvell,berlin2cd-usb-phy";
|
||||
reg = <0xa2f400 0x128>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&chip_rst 0x104 14>;
|
||||
|
@ -170,7 +170,7 @@
|
|||
};
|
||||
|
||||
usb_phy0: phy@b74000 {
|
||||
compatible = "marvell,berlin2-usb-phy";
|
||||
compatible = "marvell,berlin2cd-usb-phy";
|
||||
reg = <0xb74000 0x128>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&chip_rst 0x104 12>;
|
||||
|
@ -178,7 +178,7 @@
|
|||
};
|
||||
|
||||
usb_phy1: phy@b78000 {
|
||||
compatible = "marvell,berlin2-usb-phy";
|
||||
compatible = "marvell,berlin2cd-usb-phy";
|
||||
reg = <0xb78000 0x128>;
|
||||
#phy-cells = <0>;
|
||||
resets = <&chip_rst 0x104 13>;
|
||||
|
|
|
@ -915,6 +915,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pmu_system_controller {
|
||||
assigned-clocks = <&pmu_system_controller 0>;
|
||||
assigned-clock-parents = <&clock CLK_FIN_PLL>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>;
|
||||
|
|
|
@ -878,6 +878,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pmu_system_controller {
|
||||
assigned-clocks = <&pmu_system_controller 0>;
|
||||
assigned-clock-parents = <&clock CLK_FIN_PLL>;
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>;
|
||||
|
|
|
@ -588,10 +588,10 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@30870000 {
|
||||
uart2: serial@30890000 {
|
||||
compatible = "fsl,imx7d-uart",
|
||||
"fsl,imx6q-uart";
|
||||
reg = <0x30870000 0x10000>;
|
||||
reg = <0x30890000 0x10000>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX7D_UART2_ROOT_CLK>,
|
||||
<&clks IMX7D_UART2_ROOT_CLK>;
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
|
||||
/ {
|
||||
model = "LogicPD Zoom DM3730 Torpedo Development Kit";
|
||||
compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap36xx";
|
||||
compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
|
|
@ -67,7 +67,7 @@
|
|||
|
||||
timer@c1109940 {
|
||||
compatible = "amlogic,meson6-timer";
|
||||
reg = <0xc1109940 0x14>;
|
||||
reg = <0xc1109940 0x18>;
|
||||
interrupts = <0 10 1>;
|
||||
};
|
||||
|
||||
|
@ -80,36 +80,37 @@
|
|||
wdt: watchdog@c1109900 {
|
||||
compatible = "amlogic,meson6-wdt";
|
||||
reg = <0xc1109900 0x8>;
|
||||
interrupts = <0 0 1>;
|
||||
};
|
||||
|
||||
uart_AO: serial@c81004c0 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc81004c0 0x14>;
|
||||
reg = <0xc81004c0 0x18>;
|
||||
interrupts = <0 90 1>;
|
||||
clocks = <&clk81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_A: serial@c81084c0 {
|
||||
uart_A: serial@c11084c0 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc81084c0 0x14>;
|
||||
interrupts = <0 90 1>;
|
||||
reg = <0xc11084c0 0x18>;
|
||||
interrupts = <0 26 1>;
|
||||
clocks = <&clk81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_B: serial@c81084dc {
|
||||
uart_B: serial@c11084dc {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc81084dc 0x14>;
|
||||
interrupts = <0 90 1>;
|
||||
reg = <0xc11084dc 0x18>;
|
||||
interrupts = <0 75 1>;
|
||||
clocks = <&clk81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart_C: serial@c8108700 {
|
||||
uart_C: serial@c1108700 {
|
||||
compatible = "amlogic,meson-uart";
|
||||
reg = <0xc8108700 0x14>;
|
||||
interrupts = <0 90 1>;
|
||||
reg = <0xc1108700 0x18>;
|
||||
interrupts = <0 93 1>;
|
||||
clocks = <&clk81>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
/ {
|
||||
model = "TI OMAP37XX EVM (TMDSEVM3730)";
|
||||
compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
|
||||
compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
|
|
|
@ -56,7 +56,7 @@
|
|||
/* VMMCI level-shifter enable */
|
||||
default_hrefv60_cfg2 {
|
||||
pins = "GPIO169_D22";
|
||||
ste,config = <&gpio_out_lo>;
|
||||
ste,config = <&gpio_out_hi>;
|
||||
};
|
||||
/* VMMCI level-shifter voltage select */
|
||||
default_hrefv60_cfg3 {
|
||||
|
|
|
@ -234,7 +234,9 @@
|
|||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
/*
|
||||
gpio-ranges = <&pinmux 0 0 246>;
|
||||
*/
|
||||
};
|
||||
|
||||
apbmisc@70000800 {
|
||||
|
|
|
@ -258,7 +258,9 @@
|
|||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
/*
|
||||
gpio-ranges = <&pinmux 0 0 251>;
|
||||
*/
|
||||
};
|
||||
|
||||
apbdma: dma@0,60020000 {
|
||||
|
|
|
@ -244,7 +244,9 @@
|
|||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
/*
|
||||
gpio-ranges = <&pinmux 0 0 224>;
|
||||
*/
|
||||
};
|
||||
|
||||
apbmisc@70000800 {
|
||||
|
|
|
@ -349,7 +349,9 @@
|
|||
gpio-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
/*
|
||||
gpio-ranges = <&pinmux 0 0 248>;
|
||||
*/
|
||||
};
|
||||
|
||||
apbmisc@70000800 {
|
||||
|
|
|
@ -85,7 +85,7 @@
|
|||
};
|
||||
|
||||
ðsc {
|
||||
interrupts = <0 50 4>;
|
||||
interrupts = <0 52 4>;
|
||||
};
|
||||
|
||||
&serial0 {
|
||||
|
|
|
@ -21,6 +21,7 @@ config KVM
|
|||
depends on MMU && OF
|
||||
select PREEMPT_NOTIFIERS
|
||||
select ANON_INODES
|
||||
select ARM_GIC
|
||||
select HAVE_KVM_CPU_RELAX_INTERCEPT
|
||||
select HAVE_KVM_ARCH_TLB_FLUSH_ALL
|
||||
select KVM_MMIO
|
||||
|
|
|
@ -1080,7 +1080,7 @@ static int init_hyp_mode(void)
|
|||
*/
|
||||
err = kvm_timer_hyp_init();
|
||||
if (err)
|
||||
goto out_free_mappings;
|
||||
goto out_free_context;
|
||||
|
||||
#ifndef CONFIG_HOTPLUG_CPU
|
||||
free_boot_hyp_pgd();
|
||||
|
|
|
@ -200,15 +200,15 @@ no_clk:
|
|||
args.args_count = 0;
|
||||
child_domain = of_genpd_get_from_provider(&args);
|
||||
if (IS_ERR(child_domain))
|
||||
goto next_pd;
|
||||
continue;
|
||||
|
||||
if (of_parse_phandle_with_args(np, "power-domains",
|
||||
"#power-domain-cells", 0, &args) != 0)
|
||||
goto next_pd;
|
||||
continue;
|
||||
|
||||
parent_domain = of_genpd_get_from_provider(&args);
|
||||
if (IS_ERR(parent_domain))
|
||||
goto next_pd;
|
||||
continue;
|
||||
|
||||
if (pm_genpd_add_subdomain(parent_domain, child_domain))
|
||||
pr_warn("%s failed to add subdomain: %s\n",
|
||||
|
@ -216,8 +216,6 @@ no_clk:
|
|||
else
|
||||
pr_info("%s has as child subdomain: %s.\n",
|
||||
parent_domain->name, child_domain->name);
|
||||
next_pd:
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -49,6 +49,7 @@ config SOC_OMAP5
|
|||
select OMAP_INTERCONNECT
|
||||
select OMAP_INTERCONNECT_BARRIER
|
||||
select PM_OPP if PM
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
|
||||
config SOC_AM33XX
|
||||
bool "TI AM33XX"
|
||||
|
@ -78,6 +79,7 @@ config SOC_DRA7XX
|
|||
select OMAP_INTERCONNECT
|
||||
select OMAP_INTERCONNECT_BARRIER
|
||||
select PM_OPP if PM
|
||||
select ZONE_DMA if ARM_LPAE
|
||||
|
||||
config ARCH_OMAP2PLUS
|
||||
bool
|
||||
|
|
|
@ -106,6 +106,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
|
|||
MACHINE_END
|
||||
|
||||
static const char *const omap36xx_boards_compat[] __initconst = {
|
||||
"ti,omap3630",
|
||||
"ti,omap36xx",
|
||||
NULL,
|
||||
};
|
||||
|
@ -243,6 +244,9 @@ static const char *const omap5_boards_compat[] __initconst = {
|
|||
};
|
||||
|
||||
DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
|
||||
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
|
||||
.dma_zone_size = SZ_2G,
|
||||
#endif
|
||||
.reserve = omap_reserve,
|
||||
.smp = smp_ops(omap4_smp_ops),
|
||||
.map_io = omap5_map_io,
|
||||
|
@ -288,6 +292,9 @@ static const char *const dra74x_boards_compat[] __initconst = {
|
|||
};
|
||||
|
||||
DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
|
||||
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
|
||||
.dma_zone_size = SZ_2G,
|
||||
#endif
|
||||
.reserve = omap_reserve,
|
||||
.smp = smp_ops(omap4_smp_ops),
|
||||
.map_io = dra7xx_map_io,
|
||||
|
@ -308,6 +315,9 @@ static const char *const dra72x_boards_compat[] __initconst = {
|
|||
};
|
||||
|
||||
DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
|
||||
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
|
||||
.dma_zone_size = SZ_2G,
|
||||
#endif
|
||||
.reserve = omap_reserve,
|
||||
.map_io = dra7xx_map_io,
|
||||
.init_early = dra7xx_init_early,
|
||||
|
|
|
@ -559,7 +559,14 @@ static void pdata_quirks_check(struct pdata_init *quirks)
|
|||
|
||||
void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
|
||||
{
|
||||
/*
|
||||
* We still need this for omap2420 and omap3 PM to work, others are
|
||||
* using drivers/misc/sram.c already.
|
||||
*/
|
||||
if (of_machine_is_compatible("ti,omap2420") ||
|
||||
of_machine_is_compatible("ti,omap3"))
|
||||
omap_sdrc_init(NULL, NULL);
|
||||
|
||||
pdata_quirks_check(auxdata_quirks);
|
||||
of_platform_populate(NULL, omap_dt_match_table,
|
||||
omap_auxdata_lookup, NULL);
|
||||
|
|
|
@ -42,10 +42,6 @@
|
|||
#define PECR_IS(n) ((1 << ((n) * 2)) << 29)
|
||||
|
||||
extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
#define ISRAM_START 0x5c000000
|
||||
#define ISRAM_SIZE SZ_256K
|
||||
|
||||
/*
|
||||
* NAND NFC: DFI bus arbitration subset
|
||||
|
@ -54,6 +50,11 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));
|
|||
#define NDCR_ND_ARB_EN (1 << 12)
|
||||
#define NDCR_ND_ARB_CNTL (1 << 19)
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
#define ISRAM_START 0x5c000000
|
||||
#define ISRAM_SIZE SZ_256K
|
||||
|
||||
static void __iomem *sram;
|
||||
static unsigned long wakeup_src;
|
||||
|
||||
|
|
|
@ -614,6 +614,7 @@ load_common:
|
|||
case BPF_LD | BPF_B | BPF_IND:
|
||||
load_order = 0;
|
||||
load_ind:
|
||||
update_on_xread(ctx);
|
||||
OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
|
||||
goto load_common;
|
||||
case BPF_LDX | BPF_IMM:
|
||||
|
|
|
@ -495,7 +495,7 @@ void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq)
|
|||
|
||||
d->netdev = &orion_ge00.dev;
|
||||
for (i = 0; i < d->nr_chips; i++)
|
||||
d->chip[i].host_dev = &orion_ge00_shared.dev;
|
||||
d->chip[i].host_dev = &orion_ge_mvmdio.dev;
|
||||
orion_switch_device.dev.platform_data = d;
|
||||
|
||||
platform_device_register(&orion_switch_device);
|
||||
|
|
|
@ -45,7 +45,6 @@
|
|||
* it does.
|
||||
*/
|
||||
|
||||
#include <byteswap.h>
|
||||
#include <elf.h>
|
||||
#include <errno.h>
|
||||
#include <fcntl.h>
|
||||
|
@ -59,6 +58,16 @@
|
|||
#include <sys/types.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#define swab16(x) \
|
||||
((((x) & 0x00ff) << 8) | \
|
||||
(((x) & 0xff00) >> 8))
|
||||
|
||||
#define swab32(x) \
|
||||
((((x) & 0x000000ff) << 24) | \
|
||||
(((x) & 0x0000ff00) << 8) | \
|
||||
(((x) & 0x00ff0000) >> 8) | \
|
||||
(((x) & 0xff000000) << 24))
|
||||
|
||||
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
|
||||
#define HOST_ORDER ELFDATA2LSB
|
||||
#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
|
||||
|
@ -104,17 +113,17 @@ static void cleanup(void)
|
|||
|
||||
static Elf32_Word read_elf_word(Elf32_Word word, bool swap)
|
||||
{
|
||||
return swap ? bswap_32(word) : word;
|
||||
return swap ? swab32(word) : word;
|
||||
}
|
||||
|
||||
static Elf32_Half read_elf_half(Elf32_Half half, bool swap)
|
||||
{
|
||||
return swap ? bswap_16(half) : half;
|
||||
return swap ? swab16(half) : half;
|
||||
}
|
||||
|
||||
static void write_elf_word(Elf32_Word val, Elf32_Word *dst, bool swap)
|
||||
{
|
||||
*dst = swap ? bswap_32(val) : val;
|
||||
*dst = swap ? swab32(val) : val;
|
||||
}
|
||||
|
||||
int main(int argc, char **argv)
|
||||
|
|
|
@ -3,7 +3,6 @@
|
|||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/reg.h>
|
||||
|
||||
/* bytes per L1 cache line */
|
||||
#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
|
||||
|
@ -40,12 +39,6 @@ struct ppc64_caches {
|
|||
};
|
||||
|
||||
extern struct ppc64_caches ppc64_caches;
|
||||
|
||||
static inline void logmpp(u64 x)
|
||||
{
|
||||
asm volatile(PPC_LOGMPP(R1) : : "r" (x));
|
||||
}
|
||||
|
||||
#endif /* __powerpc64__ && ! __ASSEMBLY__ */
|
||||
|
||||
#if defined(__ASSEMBLY__)
|
||||
|
|
|
@ -297,8 +297,6 @@ struct kvmppc_vcore {
|
|||
u32 arch_compat;
|
||||
ulong pcr;
|
||||
ulong dpdes; /* doorbell state (POWER8) */
|
||||
void *mpp_buffer; /* Micro Partition Prefetch buffer */
|
||||
bool mpp_buffer_is_valid;
|
||||
ulong conferring_threads;
|
||||
};
|
||||
|
||||
|
|
|
@ -141,7 +141,6 @@
|
|||
#define PPC_INST_ISEL 0x7c00001e
|
||||
#define PPC_INST_ISEL_MASK 0xfc00003e
|
||||
#define PPC_INST_LDARX 0x7c0000a8
|
||||
#define PPC_INST_LOGMPP 0x7c0007e4
|
||||
#define PPC_INST_LSWI 0x7c0004aa
|
||||
#define PPC_INST_LSWX 0x7c00042a
|
||||
#define PPC_INST_LWARX 0x7c000028
|
||||
|
@ -285,20 +284,6 @@
|
|||
#define __PPC_EH(eh) 0
|
||||
#endif
|
||||
|
||||
/* POWER8 Micro Partition Prefetch (MPP) parameters */
|
||||
/* Address mask is common for LOGMPP instruction and MPPR SPR */
|
||||
#define PPC_MPPE_ADDRESS_MASK 0xffffffffc000ULL
|
||||
|
||||
/* Bits 60 and 61 of MPP SPR should be set to one of the following */
|
||||
/* Aborting the fetch is indeed setting 00 in the table size bits */
|
||||
#define PPC_MPPR_FETCH_ABORT (0x0ULL << 60)
|
||||
#define PPC_MPPR_FETCH_WHOLE_TABLE (0x2ULL << 60)
|
||||
|
||||
/* Bits 54 and 55 of register for LOGMPP instruction should be set to: */
|
||||
#define PPC_LOGMPP_LOG_L2 (0x02ULL << 54)
|
||||
#define PPC_LOGMPP_LOG_L2L3 (0x01ULL << 54)
|
||||
#define PPC_LOGMPP_LOG_ABORT (0x03ULL << 54)
|
||||
|
||||
/* Deal with instructions that older assemblers aren't aware of */
|
||||
#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
|
||||
__PPC_RA(a) | __PPC_RB(b))
|
||||
|
@ -307,8 +292,6 @@
|
|||
#define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \
|
||||
___PPC_RT(t) | ___PPC_RA(a) | \
|
||||
___PPC_RB(b) | __PPC_EH(eh))
|
||||
#define PPC_LOGMPP(b) stringify_in_c(.long PPC_INST_LOGMPP | \
|
||||
__PPC_RB(b))
|
||||
#define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \
|
||||
___PPC_RT(t) | ___PPC_RA(a) | \
|
||||
___PPC_RB(b) | __PPC_EH(eh))
|
||||
|
|
|
@ -226,7 +226,6 @@
|
|||
#define CTRL_TE 0x00c00000 /* thread enable */
|
||||
#define CTRL_RUNLATCH 0x1
|
||||
#define SPRN_DAWR 0xB4
|
||||
#define SPRN_MPPR 0xB8 /* Micro Partition Prefetch Register */
|
||||
#define SPRN_RPR 0xBA /* Relative Priority Register */
|
||||
#define SPRN_CIABR 0xBB
|
||||
#define CIABR_PRIV 0x3
|
||||
|
|
|
@ -1043,6 +1043,9 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
|
|||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
if (!rtas.entry)
|
||||
return -EINVAL;
|
||||
|
||||
if (copy_from_user(&args, uargs, 3 * sizeof(u32)) != 0)
|
||||
return -EFAULT;
|
||||
|
||||
|
|
|
@ -36,7 +36,6 @@
|
|||
|
||||
#include <asm/reg.h>
|
||||
#include <asm/cputable.h>
|
||||
#include <asm/cache.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
@ -75,12 +74,6 @@
|
|||
|
||||
static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
|
||||
|
||||
#if defined(CONFIG_PPC_64K_PAGES)
|
||||
#define MPP_BUFFER_ORDER 0
|
||||
#elif defined(CONFIG_PPC_4K_PAGES)
|
||||
#define MPP_BUFFER_ORDER 3
|
||||
#endif
|
||||
|
||||
static int dynamic_mt_modes = 6;
|
||||
module_param(dynamic_mt_modes, int, S_IRUGO | S_IWUSR);
|
||||
MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
|
||||
|
@ -1455,13 +1448,6 @@ static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core)
|
|||
vcore->kvm = kvm;
|
||||
INIT_LIST_HEAD(&vcore->preempt_list);
|
||||
|
||||
vcore->mpp_buffer_is_valid = false;
|
||||
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_207S))
|
||||
vcore->mpp_buffer = (void *)__get_free_pages(
|
||||
GFP_KERNEL|__GFP_ZERO,
|
||||
MPP_BUFFER_ORDER);
|
||||
|
||||
return vcore;
|
||||
}
|
||||
|
||||
|
@ -1894,33 +1880,6 @@ static int on_primary_thread(void)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static void kvmppc_start_saving_l2_cache(struct kvmppc_vcore *vc)
|
||||
{
|
||||
phys_addr_t phy_addr, mpp_addr;
|
||||
|
||||
phy_addr = (phys_addr_t)virt_to_phys(vc->mpp_buffer);
|
||||
mpp_addr = phy_addr & PPC_MPPE_ADDRESS_MASK;
|
||||
|
||||
mtspr(SPRN_MPPR, mpp_addr | PPC_MPPR_FETCH_ABORT);
|
||||
logmpp(mpp_addr | PPC_LOGMPP_LOG_L2);
|
||||
|
||||
vc->mpp_buffer_is_valid = true;
|
||||
}
|
||||
|
||||
static void kvmppc_start_restoring_l2_cache(const struct kvmppc_vcore *vc)
|
||||
{
|
||||
phys_addr_t phy_addr, mpp_addr;
|
||||
|
||||
phy_addr = virt_to_phys(vc->mpp_buffer);
|
||||
mpp_addr = phy_addr & PPC_MPPE_ADDRESS_MASK;
|
||||
|
||||
/* We must abort any in-progress save operations to ensure
|
||||
* the table is valid so that prefetch engine knows when to
|
||||
* stop prefetching. */
|
||||
logmpp(mpp_addr | PPC_LOGMPP_LOG_ABORT);
|
||||
mtspr(SPRN_MPPR, mpp_addr | PPC_MPPR_FETCH_WHOLE_TABLE);
|
||||
}
|
||||
|
||||
/*
|
||||
* A list of virtual cores for each physical CPU.
|
||||
* These are vcores that could run but their runner VCPU tasks are
|
||||
|
@ -2471,14 +2430,8 @@ static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
|
|||
|
||||
srcu_idx = srcu_read_lock(&vc->kvm->srcu);
|
||||
|
||||
if (vc->mpp_buffer_is_valid)
|
||||
kvmppc_start_restoring_l2_cache(vc);
|
||||
|
||||
__kvmppc_vcore_entry();
|
||||
|
||||
if (vc->mpp_buffer)
|
||||
kvmppc_start_saving_l2_cache(vc);
|
||||
|
||||
srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
|
||||
|
||||
spin_lock(&vc->lock);
|
||||
|
@ -3073,14 +3026,8 @@ static void kvmppc_free_vcores(struct kvm *kvm)
|
|||
{
|
||||
long int i;
|
||||
|
||||
for (i = 0; i < KVM_MAX_VCORES; ++i) {
|
||||
if (kvm->arch.vcores[i] && kvm->arch.vcores[i]->mpp_buffer) {
|
||||
struct kvmppc_vcore *vc = kvm->arch.vcores[i];
|
||||
free_pages((unsigned long)vc->mpp_buffer,
|
||||
MPP_BUFFER_ORDER);
|
||||
}
|
||||
for (i = 0; i < KVM_MAX_VCORES; ++i)
|
||||
kfree(kvm->arch.vcores[i]);
|
||||
}
|
||||
kvm->arch.online_vcores = 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -171,7 +171,26 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
* so clear LPCR:PECE1. We keep PECE2 enabled.
|
||||
*/
|
||||
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
|
||||
|
||||
/*
|
||||
* Hard-disable interrupts, and then clear irq_happened flags
|
||||
* that we can safely ignore while off-line, since they
|
||||
* are for things for which we do no processing when off-line
|
||||
* (or in the case of HMI, all the processing we need to do
|
||||
* is done in lower-level real-mode code).
|
||||
*/
|
||||
hard_irq_disable();
|
||||
local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI);
|
||||
|
||||
while (!generic_check_cpu_restart(cpu)) {
|
||||
/*
|
||||
* Clear IPI flag, since we don't handle IPIs while
|
||||
* offline, except for those when changing micro-threading
|
||||
* mode, which are handled explicitly below, and those
|
||||
* for coming online, which are handled via
|
||||
* generic_check_cpu_restart() calls.
|
||||
*/
|
||||
kvmppc_set_host_ipi(cpu, 0);
|
||||
|
||||
ppc64_runlatch_off();
|
||||
|
||||
|
@ -196,20 +215,20 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
* having finished executing in a KVM guest, then srr1
|
||||
* contains 0.
|
||||
*/
|
||||
if ((srr1 & wmask) == SRR1_WAKEEE) {
|
||||
if (((srr1 & wmask) == SRR1_WAKEEE) ||
|
||||
(local_paca->irq_happened & PACA_IRQ_EE)) {
|
||||
icp_native_flush_interrupt();
|
||||
local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
|
||||
smp_mb();
|
||||
} else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
|
||||
unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
|
||||
asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
|
||||
kvmppc_set_host_ipi(cpu, 0);
|
||||
}
|
||||
local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL);
|
||||
smp_mb();
|
||||
|
||||
if (cpu_core_split_required())
|
||||
continue;
|
||||
|
||||
if (!generic_check_cpu_restart(cpu))
|
||||
if (srr1 && !generic_check_cpu_restart(cpu))
|
||||
DBG("CPU%d Unexpected exit while offline !\n", cpu);
|
||||
}
|
||||
mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
|
||||
|
|
|
@ -70,8 +70,8 @@ KBUILD_AFLAGS += $(ARCH_INCLUDE)
|
|||
|
||||
USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \
|
||||
$(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \
|
||||
-D_FILE_OFFSET_BITS=64 -idirafter include \
|
||||
-D__KERNEL__ -D__UM_HOST__
|
||||
-D_FILE_OFFSET_BITS=64 -idirafter $(srctree)/include \
|
||||
-idirafter $(obj)/include -D__KERNEL__ -D__UM_HOST__
|
||||
|
||||
#This will adjust *FLAGS accordingly to the platform.
|
||||
include $(ARCH_DIR)/Makefile-os-$(OS)
|
||||
|
|
|
@ -220,7 +220,7 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,
|
|||
show_regs(container_of(regs, struct pt_regs, regs));
|
||||
panic("Segfault with no mm");
|
||||
}
|
||||
else if (!is_user && address < TASK_SIZE) {
|
||||
else if (!is_user && address > PAGE_SIZE && address < TASK_SIZE) {
|
||||
show_regs(container_of(regs, struct pt_regs, regs));
|
||||
panic("Kernel tried to access user memory at addr 0x%lx, ip 0x%lx",
|
||||
address, ip);
|
||||
|
|
|
@ -96,7 +96,7 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv)
|
|||
"ret = %d\n", -n);
|
||||
ret = n;
|
||||
}
|
||||
CATCH_EINTR(waitpid(pid, NULL, __WCLONE));
|
||||
CATCH_EINTR(waitpid(pid, NULL, __WALL));
|
||||
}
|
||||
|
||||
out_free2:
|
||||
|
@ -129,7 +129,7 @@ int run_helper_thread(int (*proc)(void *), void *arg, unsigned int flags,
|
|||
return err;
|
||||
}
|
||||
if (stack_out == NULL) {
|
||||
CATCH_EINTR(pid = waitpid(pid, &status, __WCLONE));
|
||||
CATCH_EINTR(pid = waitpid(pid, &status, __WALL));
|
||||
if (pid < 0) {
|
||||
err = -errno;
|
||||
printk(UM_KERN_ERR "run_helper_thread - wait failed, "
|
||||
|
@ -148,7 +148,7 @@ int run_helper_thread(int (*proc)(void *), void *arg, unsigned int flags,
|
|||
int helper_wait(int pid)
|
||||
{
|
||||
int ret, status;
|
||||
int wflags = __WCLONE;
|
||||
int wflags = __WALL;
|
||||
|
||||
CATCH_EINTR(ret = waitpid(pid, &status, wflags));
|
||||
if (ret < 0) {
|
||||
|
|
|
@ -667,6 +667,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto,
|
|||
bool conout_found = false;
|
||||
void *dummy = NULL;
|
||||
u32 h = handles[i];
|
||||
u32 current_fb_base;
|
||||
|
||||
status = efi_call_early(handle_protocol, h,
|
||||
proto, (void **)&gop32);
|
||||
|
@ -678,7 +679,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto,
|
|||
if (status == EFI_SUCCESS)
|
||||
conout_found = true;
|
||||
|
||||
status = __gop_query32(gop32, &info, &size, &fb_base);
|
||||
status = __gop_query32(gop32, &info, &size, ¤t_fb_base);
|
||||
if (status == EFI_SUCCESS && (!first_gop || conout_found)) {
|
||||
/*
|
||||
* Systems that use the UEFI Console Splitter may
|
||||
|
@ -692,6 +693,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto,
|
|||
pixel_format = info->pixel_format;
|
||||
pixel_info = info->pixel_information;
|
||||
pixels_per_scan_line = info->pixels_per_scan_line;
|
||||
fb_base = current_fb_base;
|
||||
|
||||
/*
|
||||
* Once we've found a GOP supporting ConOut,
|
||||
|
@ -770,6 +772,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto,
|
|||
bool conout_found = false;
|
||||
void *dummy = NULL;
|
||||
u64 h = handles[i];
|
||||
u32 current_fb_base;
|
||||
|
||||
status = efi_call_early(handle_protocol, h,
|
||||
proto, (void **)&gop64);
|
||||
|
@ -781,7 +784,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto,
|
|||
if (status == EFI_SUCCESS)
|
||||
conout_found = true;
|
||||
|
||||
status = __gop_query64(gop64, &info, &size, &fb_base);
|
||||
status = __gop_query64(gop64, &info, &size, ¤t_fb_base);
|
||||
if (status == EFI_SUCCESS && (!first_gop || conout_found)) {
|
||||
/*
|
||||
* Systems that use the UEFI Console Splitter may
|
||||
|
@ -795,6 +798,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto,
|
|||
pixel_format = info->pixel_format;
|
||||
pixel_info = info->pixel_information;
|
||||
pixels_per_scan_line = info->pixels_per_scan_line;
|
||||
fb_base = current_fb_base;
|
||||
|
||||
/*
|
||||
* Once we've found a GOP supporting ConOut,
|
||||
|
|
|
@ -27,12 +27,11 @@ static __always_inline void *__inline_memcpy(void *to, const void *from, size_t
|
|||
function. */
|
||||
|
||||
#define __HAVE_ARCH_MEMCPY 1
|
||||
extern void *memcpy(void *to, const void *from, size_t len);
|
||||
extern void *__memcpy(void *to, const void *from, size_t len);
|
||||
|
||||
#ifndef CONFIG_KMEMCHECK
|
||||
#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) || __GNUC__ > 4
|
||||
extern void *memcpy(void *to, const void *from, size_t len);
|
||||
#else
|
||||
#if (__GNUC__ == 4 && __GNUC_MINOR__ < 3) || __GNUC__ < 4
|
||||
#define memcpy(dst, src, len) \
|
||||
({ \
|
||||
size_t __len = (len); \
|
||||
|
|
|
@ -2907,6 +2907,7 @@ int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
|
|||
struct irq_data *irq_data;
|
||||
struct mp_chip_data *data;
|
||||
struct irq_alloc_info *info = arg;
|
||||
unsigned long flags;
|
||||
|
||||
if (!info || nr_irqs > 1)
|
||||
return -EINVAL;
|
||||
|
@ -2939,11 +2940,14 @@ int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
|
|||
|
||||
cfg = irqd_cfg(irq_data);
|
||||
add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin);
|
||||
|
||||
local_irq_save(flags);
|
||||
if (info->ioapic_entry)
|
||||
mp_setup_entry(cfg, data, info->ioapic_entry);
|
||||
mp_register_handler(virq, data->trigger);
|
||||
if (virq < nr_legacy_irqs())
|
||||
legacy_pic->mask(virq);
|
||||
local_irq_restore(flags);
|
||||
|
||||
apic_printk(APIC_VERBOSE, KERN_DEBUG
|
||||
"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> IRQ %d Mode:%i Active:%i Dest:%d)\n",
|
||||
|
|
|
@ -550,14 +550,14 @@ unsigned long get_wchan(struct task_struct *p)
|
|||
if (sp < bottom || sp > top)
|
||||
return 0;
|
||||
|
||||
fp = READ_ONCE(*(unsigned long *)sp);
|
||||
fp = READ_ONCE_NOCHECK(*(unsigned long *)sp);
|
||||
do {
|
||||
if (fp < bottom || fp > top)
|
||||
return 0;
|
||||
ip = READ_ONCE(*(unsigned long *)(fp + sizeof(unsigned long)));
|
||||
ip = READ_ONCE_NOCHECK(*(unsigned long *)(fp + sizeof(unsigned long)));
|
||||
if (!in_sched_functions(ip))
|
||||
return ip;
|
||||
fp = READ_ONCE(*(unsigned long *)fp);
|
||||
fp = READ_ONCE_NOCHECK(*(unsigned long *)fp);
|
||||
} while (count++ < 16 && p->state != TASK_RUNNING);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1173,6 +1173,14 @@ void __init setup_arch(char **cmdline_p)
|
|||
clone_pgd_range(initial_page_table + KERNEL_PGD_BOUNDARY,
|
||||
swapper_pg_dir + KERNEL_PGD_BOUNDARY,
|
||||
KERNEL_PGD_PTRS);
|
||||
|
||||
/*
|
||||
* sync back low identity map too. It is used for example
|
||||
* in the 32-bit EFI stub.
|
||||
*/
|
||||
clone_pgd_range(initial_page_table,
|
||||
swapper_pg_dir + KERNEL_PGD_BOUNDARY,
|
||||
KERNEL_PGD_PTRS);
|
||||
#endif
|
||||
|
||||
tboot_probe();
|
||||
|
|
|
@ -509,7 +509,7 @@ void __inquire_remote_apic(int apicid)
|
|||
*/
|
||||
#define UDELAY_10MS_DEFAULT 10000
|
||||
|
||||
static unsigned int init_udelay = UDELAY_10MS_DEFAULT;
|
||||
static unsigned int init_udelay = INT_MAX;
|
||||
|
||||
static int __init cpu_init_udelay(char *str)
|
||||
{
|
||||
|
@ -522,13 +522,16 @@ early_param("cpu_init_udelay", cpu_init_udelay);
|
|||
static void __init smp_quirk_init_udelay(void)
|
||||
{
|
||||
/* if cmdline changed it from default, leave it alone */
|
||||
if (init_udelay != UDELAY_10MS_DEFAULT)
|
||||
if (init_udelay != INT_MAX)
|
||||
return;
|
||||
|
||||
/* if modern processor, use no delay */
|
||||
if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) ||
|
||||
((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF)))
|
||||
init_udelay = 0;
|
||||
|
||||
/* else, use legacy delay */
|
||||
init_udelay = UDELAY_10MS_DEFAULT;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -657,7 +660,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
|
|||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
if (init_udelay)
|
||||
if (init_udelay == 0)
|
||||
udelay(10);
|
||||
else
|
||||
udelay(300);
|
||||
|
||||
pr_debug("Startup point 1\n");
|
||||
|
@ -668,7 +673,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
|
|||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
if (init_udelay)
|
||||
if (init_udelay == 0)
|
||||
udelay(10);
|
||||
else
|
||||
udelay(200);
|
||||
|
||||
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
|
||||
|
|
|
@ -12,7 +12,10 @@
|
|||
#include <skas.h>
|
||||
#include <sysdep/tls.h>
|
||||
|
||||
extern int modify_ldt(int func, void *ptr, unsigned long bytecount);
|
||||
static inline int modify_ldt (int func, void *ptr, unsigned long bytecount)
|
||||
{
|
||||
return syscall(__NR_modify_ldt, func, ptr, bytecount);
|
||||
}
|
||||
|
||||
static long write_ldt_entry(struct mm_id *mm_idp, int func,
|
||||
struct user_desc *desc, void **addr, int done)
|
||||
|
|
|
@ -576,7 +576,7 @@ void blk_cleanup_queue(struct request_queue *q)
|
|||
q->queue_lock = &q->__queue_lock;
|
||||
spin_unlock_irq(lock);
|
||||
|
||||
bdi_destroy(&q->backing_dev_info);
|
||||
bdi_unregister(&q->backing_dev_info);
|
||||
|
||||
/* @q is and will stay empty, shutdown and put */
|
||||
blk_put_queue(q);
|
||||
|
|
|
@ -26,13 +26,6 @@ static void bio_batch_end_io(struct bio *bio)
|
|||
bio_put(bio);
|
||||
}
|
||||
|
||||
/*
|
||||
* Ensure that max discard sectors doesn't overflow bi_size and hopefully
|
||||
* it is of the proper granularity as long as the granularity is a power
|
||||
* of two.
|
||||
*/
|
||||
#define MAX_BIO_SECTORS ((1U << 31) >> 9)
|
||||
|
||||
/**
|
||||
* blkdev_issue_discard - queue a discard
|
||||
* @bdev: blockdev to issue discard for
|
||||
|
@ -50,6 +43,8 @@ int blkdev_issue_discard(struct block_device *bdev, sector_t sector,
|
|||
DECLARE_COMPLETION_ONSTACK(wait);
|
||||
struct request_queue *q = bdev_get_queue(bdev);
|
||||
int type = REQ_WRITE | REQ_DISCARD;
|
||||
unsigned int granularity;
|
||||
int alignment;
|
||||
struct bio_batch bb;
|
||||
struct bio *bio;
|
||||
int ret = 0;
|
||||
|
@ -61,6 +56,10 @@ int blkdev_issue_discard(struct block_device *bdev, sector_t sector,
|
|||
if (!blk_queue_discard(q))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
/* Zero-sector (unknown) and one-sector granularities are the same. */
|
||||
granularity = max(q->limits.discard_granularity >> 9, 1U);
|
||||
alignment = (bdev_discard_alignment(bdev) >> 9) % granularity;
|
||||
|
||||
if (flags & BLKDEV_DISCARD_SECURE) {
|
||||
if (!blk_queue_secdiscard(q))
|
||||
return -EOPNOTSUPP;
|
||||
|
@ -74,7 +73,7 @@ int blkdev_issue_discard(struct block_device *bdev, sector_t sector,
|
|||
blk_start_plug(&plug);
|
||||
while (nr_sects) {
|
||||
unsigned int req_sects;
|
||||
sector_t end_sect;
|
||||
sector_t end_sect, tmp;
|
||||
|
||||
bio = bio_alloc(gfp_mask, 1);
|
||||
if (!bio) {
|
||||
|
@ -82,8 +81,22 @@ int blkdev_issue_discard(struct block_device *bdev, sector_t sector,
|
|||
break;
|
||||
}
|
||||
|
||||
req_sects = min_t(sector_t, nr_sects, MAX_BIO_SECTORS);
|
||||
/* Make sure bi_size doesn't overflow */
|
||||
req_sects = min_t(sector_t, nr_sects, UINT_MAX >> 9);
|
||||
|
||||
/*
|
||||
* If splitting a request, and the next starting sector would be
|
||||
* misaligned, stop the discard at the previous aligned sector.
|
||||
*/
|
||||
end_sect = sector + req_sects;
|
||||
tmp = end_sect;
|
||||
if (req_sects < nr_sects &&
|
||||
sector_div(tmp, granularity) != alignment) {
|
||||
end_sect = end_sect - alignment;
|
||||
sector_div(end_sect, granularity);
|
||||
end_sect = end_sect * granularity + alignment;
|
||||
req_sects = end_sect - sector;
|
||||
}
|
||||
|
||||
bio->bi_iter.bi_sector = sector;
|
||||
bio->bi_end_io = bio_batch_end_io;
|
||||
|
|
|
@ -641,6 +641,7 @@ void blk_mq_free_tags(struct blk_mq_tags *tags)
|
|||
{
|
||||
bt_free(&tags->bitmap_tags);
|
||||
bt_free(&tags->breserved_tags);
|
||||
free_cpumask_var(tags->cpumask);
|
||||
kfree(tags);
|
||||
}
|
||||
|
||||
|
|
|
@ -2296,10 +2296,8 @@ void blk_mq_free_tag_set(struct blk_mq_tag_set *set)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < set->nr_hw_queues; i++) {
|
||||
if (set->tags[i]) {
|
||||
if (set->tags[i])
|
||||
blk_mq_free_rq_map(set, set->tags[i], i);
|
||||
free_cpumask_var(set->tags[i]->cpumask);
|
||||
}
|
||||
}
|
||||
|
||||
kfree(set->tags);
|
||||
|
|
|
@ -540,6 +540,7 @@ static void blk_release_queue(struct kobject *kobj)
|
|||
struct request_queue *q =
|
||||
container_of(kobj, struct request_queue, kobj);
|
||||
|
||||
bdi_exit(&q->backing_dev_info);
|
||||
blkcg_exit_queue(q);
|
||||
|
||||
if (q->elevator) {
|
||||
|
|
|
@ -706,7 +706,7 @@ struct crypto_ablkcipher *crypto_alloc_ablkcipher(const char *alg_name,
|
|||
err:
|
||||
if (err != -EAGAIN)
|
||||
break;
|
||||
if (signal_pending(current)) {
|
||||
if (fatal_signal_pending(current)) {
|
||||
err = -EINTR;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -345,7 +345,7 @@ static void crypto_wait_for_test(struct crypto_larval *larval)
|
|||
crypto_alg_tested(larval->alg.cra_driver_name, 0);
|
||||
}
|
||||
|
||||
err = wait_for_completion_interruptible(&larval->completion);
|
||||
err = wait_for_completion_killable(&larval->completion);
|
||||
WARN_ON(err);
|
||||
|
||||
out:
|
||||
|
|
|
@ -172,7 +172,7 @@ static struct crypto_alg *crypto_larval_wait(struct crypto_alg *alg)
|
|||
struct crypto_larval *larval = (void *)alg;
|
||||
long timeout;
|
||||
|
||||
timeout = wait_for_completion_interruptible_timeout(
|
||||
timeout = wait_for_completion_killable_timeout(
|
||||
&larval->completion, 60 * HZ);
|
||||
|
||||
alg = larval->adult;
|
||||
|
@ -445,7 +445,7 @@ struct crypto_tfm *crypto_alloc_base(const char *alg_name, u32 type, u32 mask)
|
|||
err:
|
||||
if (err != -EAGAIN)
|
||||
break;
|
||||
if (signal_pending(current)) {
|
||||
if (fatal_signal_pending(current)) {
|
||||
err = -EINTR;
|
||||
break;
|
||||
}
|
||||
|
@ -562,7 +562,7 @@ void *crypto_alloc_tfm(const char *alg_name,
|
|||
err:
|
||||
if (err != -EAGAIN)
|
||||
break;
|
||||
if (signal_pending(current)) {
|
||||
if (fatal_signal_pending(current)) {
|
||||
err = -EINTR;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -375,7 +375,7 @@ static struct crypto_alg *crypto_user_skcipher_alg(const char *name, u32 type,
|
|||
err = PTR_ERR(alg);
|
||||
if (err != -EAGAIN)
|
||||
break;
|
||||
if (signal_pending(current)) {
|
||||
if (fatal_signal_pending(current)) {
|
||||
err = -EINTR;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -187,7 +187,7 @@ int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
|
|||
* global one. Requires architecture specific dev_get_cma_area() helper
|
||||
* function.
|
||||
*/
|
||||
struct page *dma_alloc_from_contiguous(struct device *dev, int count,
|
||||
struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
|
||||
unsigned int align)
|
||||
{
|
||||
if (align > CONFIG_CMA_ALIGNMENT)
|
||||
|
|
|
@ -60,6 +60,7 @@ struct nbd_device {
|
|||
bool disconnect; /* a disconnect has been requested by user */
|
||||
|
||||
struct timer_list timeout_timer;
|
||||
spinlock_t tasks_lock;
|
||||
struct task_struct *task_recv;
|
||||
struct task_struct *task_send;
|
||||
|
||||
|
@ -140,21 +141,23 @@ static void sock_shutdown(struct nbd_device *nbd)
|
|||
static void nbd_xmit_timeout(unsigned long arg)
|
||||
{
|
||||
struct nbd_device *nbd = (struct nbd_device *)arg;
|
||||
struct task_struct *task;
|
||||
unsigned long flags;
|
||||
|
||||
if (list_empty(&nbd->queue_head))
|
||||
return;
|
||||
|
||||
nbd->disconnect = true;
|
||||
|
||||
task = READ_ONCE(nbd->task_recv);
|
||||
if (task)
|
||||
force_sig(SIGKILL, task);
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
|
||||
task = READ_ONCE(nbd->task_send);
|
||||
if (task)
|
||||
if (nbd->task_recv)
|
||||
force_sig(SIGKILL, nbd->task_recv);
|
||||
|
||||
if (nbd->task_send)
|
||||
force_sig(SIGKILL, nbd->task_send);
|
||||
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
dev_err(nbd_to_dev(nbd), "Connection timed out, killed receiver and sender, shutting down connection\n");
|
||||
}
|
||||
|
||||
|
@ -403,17 +406,24 @@ static int nbd_thread_recv(struct nbd_device *nbd)
|
|||
{
|
||||
struct request *req;
|
||||
int ret;
|
||||
unsigned long flags;
|
||||
|
||||
BUG_ON(nbd->magic != NBD_MAGIC);
|
||||
|
||||
sk_set_memalloc(nbd->sock->sk);
|
||||
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
nbd->task_recv = current;
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
ret = device_create_file(disk_to_dev(nbd->disk), &pid_attr);
|
||||
if (ret) {
|
||||
dev_err(disk_to_dev(nbd->disk), "device_create_file failed!\n");
|
||||
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
nbd->task_recv = NULL;
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -429,7 +439,9 @@ static int nbd_thread_recv(struct nbd_device *nbd)
|
|||
|
||||
device_remove_file(disk_to_dev(nbd->disk), &pid_attr);
|
||||
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
nbd->task_recv = NULL;
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
if (signal_pending(current)) {
|
||||
siginfo_t info;
|
||||
|
@ -534,8 +546,11 @@ static int nbd_thread_send(void *data)
|
|||
{
|
||||
struct nbd_device *nbd = data;
|
||||
struct request *req;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
nbd->task_send = current;
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
set_user_nice(current, MIN_NICE);
|
||||
while (!kthread_should_stop() || !list_empty(&nbd->waiting_queue)) {
|
||||
|
@ -572,7 +587,15 @@ static int nbd_thread_send(void *data)
|
|||
nbd_handle_req(nbd, req);
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&nbd->tasks_lock, flags);
|
||||
nbd->task_send = NULL;
|
||||
spin_unlock_irqrestore(&nbd->tasks_lock, flags);
|
||||
|
||||
/* Clear maybe pending signals */
|
||||
if (signal_pending(current)) {
|
||||
siginfo_t info;
|
||||
dequeue_signal_lock(current, ¤t->blocked, &info);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1052,6 +1075,7 @@ static int __init nbd_init(void)
|
|||
nbd_dev[i].magic = NBD_MAGIC;
|
||||
INIT_LIST_HEAD(&nbd_dev[i].waiting_queue);
|
||||
spin_lock_init(&nbd_dev[i].queue_lock);
|
||||
spin_lock_init(&nbd_dev[i].tasks_lock);
|
||||
INIT_LIST_HEAD(&nbd_dev[i].queue_head);
|
||||
mutex_init(&nbd_dev[i].tx_lock);
|
||||
init_timer(&nbd_dev[i].timeout_timer);
|
||||
|
|
|
@ -603,27 +603,31 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
|
|||
struct nvme_iod *iod = ctx;
|
||||
struct request *req = iod_get_private(iod);
|
||||
struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
|
||||
|
||||
u16 status = le16_to_cpup(&cqe->status) >> 1;
|
||||
bool requeue = false;
|
||||
int error = 0;
|
||||
|
||||
if (unlikely(status)) {
|
||||
if (!(status & NVME_SC_DNR || blk_noretry_request(req))
|
||||
&& (jiffies - req->start_time) < req->timeout) {
|
||||
unsigned long flags;
|
||||
|
||||
requeue = true;
|
||||
blk_mq_requeue_request(req);
|
||||
spin_lock_irqsave(req->q->queue_lock, flags);
|
||||
if (!blk_queue_stopped(req->q))
|
||||
blk_mq_kick_requeue_list(req->q);
|
||||
spin_unlock_irqrestore(req->q->queue_lock, flags);
|
||||
return;
|
||||
goto release_iod;
|
||||
}
|
||||
|
||||
if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
|
||||
if (cmd_rq->ctx == CMD_CTX_CANCELLED)
|
||||
status = -EINTR;
|
||||
error = -EINTR;
|
||||
else
|
||||
error = status;
|
||||
} else {
|
||||
status = nvme_error_status(status);
|
||||
error = nvme_error_status(status);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -635,8 +639,9 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
|
|||
if (cmd_rq->aborted)
|
||||
dev_warn(nvmeq->dev->dev,
|
||||
"completing aborted command with status:%04x\n",
|
||||
status);
|
||||
error);
|
||||
|
||||
release_iod:
|
||||
if (iod->nents) {
|
||||
dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
|
||||
rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
|
||||
|
@ -649,7 +654,8 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
|
|||
}
|
||||
nvme_free_iod(nvmeq->dev, iod);
|
||||
|
||||
blk_mq_complete_request(req, status);
|
||||
if (likely(!requeue))
|
||||
blk_mq_complete_request(req, error);
|
||||
}
|
||||
|
||||
/* length is in bytes. gfp flags indicates whether we may sleep. */
|
||||
|
@ -1804,7 +1810,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
|||
|
||||
length = (io.nblocks + 1) << ns->lba_shift;
|
||||
meta_len = (io.nblocks + 1) * ns->ms;
|
||||
metadata = (void __user *)(unsigned long)io.metadata;
|
||||
metadata = (void __user *)(uintptr_t)io.metadata;
|
||||
write = io.opcode & 1;
|
||||
|
||||
if (ns->ext) {
|
||||
|
@ -1844,7 +1850,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
|
|||
c.rw.metadata = cpu_to_le64(meta_dma);
|
||||
|
||||
status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
|
||||
(void __user *)io.addr, length, NULL, 0);
|
||||
(void __user *)(uintptr_t)io.addr, length, NULL, 0);
|
||||
unmap:
|
||||
if (meta) {
|
||||
if (status == NVME_SC_SUCCESS && !write) {
|
||||
|
@ -1886,7 +1892,7 @@ static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
|
|||
timeout = msecs_to_jiffies(cmd.timeout_ms);
|
||||
|
||||
status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
|
||||
NULL, (void __user *)cmd.addr, cmd.data_len,
|
||||
NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
|
||||
&cmd.result, timeout);
|
||||
if (status >= 0) {
|
||||
if (put_user(cmd.result, &ucmd->result))
|
||||
|
|
|
@ -96,6 +96,8 @@ static int atomic_dec_return_safe(atomic_t *v)
|
|||
#define RBD_MINORS_PER_MAJOR 256
|
||||
#define RBD_SINGLE_MAJOR_PART_SHIFT 4
|
||||
|
||||
#define RBD_MAX_PARENT_CHAIN_LEN 16
|
||||
|
||||
#define RBD_SNAP_DEV_NAME_PREFIX "snap_"
|
||||
#define RBD_MAX_SNAP_NAME_LEN \
|
||||
(NAME_MAX - (sizeof (RBD_SNAP_DEV_NAME_PREFIX) - 1))
|
||||
|
@ -426,7 +428,7 @@ static ssize_t rbd_add_single_major(struct bus_type *bus, const char *buf,
|
|||
size_t count);
|
||||
static ssize_t rbd_remove_single_major(struct bus_type *bus, const char *buf,
|
||||
size_t count);
|
||||
static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping);
|
||||
static int rbd_dev_image_probe(struct rbd_device *rbd_dev, int depth);
|
||||
static void rbd_spec_put(struct rbd_spec *spec);
|
||||
|
||||
static int rbd_dev_id_to_minor(int dev_id)
|
||||
|
@ -5131,44 +5133,51 @@ out_err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int rbd_dev_probe_parent(struct rbd_device *rbd_dev)
|
||||
/*
|
||||
* @depth is rbd_dev_image_probe() -> rbd_dev_probe_parent() ->
|
||||
* rbd_dev_image_probe() recursion depth, which means it's also the
|
||||
* length of the already discovered part of the parent chain.
|
||||
*/
|
||||
static int rbd_dev_probe_parent(struct rbd_device *rbd_dev, int depth)
|
||||
{
|
||||
struct rbd_device *parent = NULL;
|
||||
struct rbd_spec *parent_spec;
|
||||
struct rbd_client *rbdc;
|
||||
int ret;
|
||||
|
||||
if (!rbd_dev->parent_spec)
|
||||
return 0;
|
||||
/*
|
||||
* We need to pass a reference to the client and the parent
|
||||
* spec when creating the parent rbd_dev. Images related by
|
||||
* parent/child relationships always share both.
|
||||
*/
|
||||
parent_spec = rbd_spec_get(rbd_dev->parent_spec);
|
||||
rbdc = __rbd_get_client(rbd_dev->rbd_client);
|
||||
|
||||
ret = -ENOMEM;
|
||||
parent = rbd_dev_create(rbdc, parent_spec, NULL);
|
||||
if (!parent)
|
||||
if (++depth > RBD_MAX_PARENT_CHAIN_LEN) {
|
||||
pr_info("parent chain is too long (%d)\n", depth);
|
||||
ret = -EINVAL;
|
||||
goto out_err;
|
||||
|
||||
ret = rbd_dev_image_probe(parent, false);
|
||||
if (ret < 0)
|
||||
goto out_err;
|
||||
rbd_dev->parent = parent;
|
||||
atomic_set(&rbd_dev->parent_ref, 1);
|
||||
|
||||
return 0;
|
||||
out_err:
|
||||
if (parent) {
|
||||
rbd_dev_unparent(rbd_dev);
|
||||
rbd_dev_destroy(parent);
|
||||
} else {
|
||||
rbd_put_client(rbdc);
|
||||
rbd_spec_put(parent_spec);
|
||||
}
|
||||
|
||||
parent = rbd_dev_create(rbd_dev->rbd_client, rbd_dev->parent_spec,
|
||||
NULL);
|
||||
if (!parent) {
|
||||
ret = -ENOMEM;
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Images related by parent/child relationships always share
|
||||
* rbd_client and spec/parent_spec, so bump their refcounts.
|
||||
*/
|
||||
__rbd_get_client(rbd_dev->rbd_client);
|
||||
rbd_spec_get(rbd_dev->parent_spec);
|
||||
|
||||
ret = rbd_dev_image_probe(parent, depth);
|
||||
if (ret < 0)
|
||||
goto out_err;
|
||||
|
||||
rbd_dev->parent = parent;
|
||||
atomic_set(&rbd_dev->parent_ref, 1);
|
||||
return 0;
|
||||
|
||||
out_err:
|
||||
rbd_dev_unparent(rbd_dev);
|
||||
if (parent)
|
||||
rbd_dev_destroy(parent);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -5286,7 +5295,7 @@ static void rbd_dev_image_release(struct rbd_device *rbd_dev)
|
|||
* parent), initiate a watch on its header object before using that
|
||||
* object to get detailed information about the rbd image.
|
||||
*/
|
||||
static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping)
|
||||
static int rbd_dev_image_probe(struct rbd_device *rbd_dev, int depth)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
@ -5304,7 +5313,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping)
|
|||
if (ret)
|
||||
goto err_out_format;
|
||||
|
||||
if (mapping) {
|
||||
if (!depth) {
|
||||
ret = rbd_dev_header_watch_sync(rbd_dev);
|
||||
if (ret) {
|
||||
if (ret == -ENOENT)
|
||||
|
@ -5325,7 +5334,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping)
|
|||
* Otherwise this is a parent image, identified by pool, image
|
||||
* and snap ids - need to fill in names for those ids.
|
||||
*/
|
||||
if (mapping)
|
||||
if (!depth)
|
||||
ret = rbd_spec_fill_snap_id(rbd_dev);
|
||||
else
|
||||
ret = rbd_spec_fill_names(rbd_dev);
|
||||
|
@ -5347,12 +5356,12 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping)
|
|||
* Need to warn users if this image is the one being
|
||||
* mapped and has a parent.
|
||||
*/
|
||||
if (mapping && rbd_dev->parent_spec)
|
||||
if (!depth && rbd_dev->parent_spec)
|
||||
rbd_warn(rbd_dev,
|
||||
"WARNING: kernel layering is EXPERIMENTAL!");
|
||||
}
|
||||
|
||||
ret = rbd_dev_probe_parent(rbd_dev);
|
||||
ret = rbd_dev_probe_parent(rbd_dev, depth);
|
||||
if (ret)
|
||||
goto err_out_probe;
|
||||
|
||||
|
@ -5363,7 +5372,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping)
|
|||
err_out_probe:
|
||||
rbd_dev_unprobe(rbd_dev);
|
||||
err_out_watch:
|
||||
if (mapping)
|
||||
if (!depth)
|
||||
rbd_dev_header_unwatch_sync(rbd_dev);
|
||||
out_header_name:
|
||||
kfree(rbd_dev->header_name);
|
||||
|
@ -5426,7 +5435,7 @@ static ssize_t do_rbd_add(struct bus_type *bus,
|
|||
spec = NULL; /* rbd_dev now owns this */
|
||||
rbd_opts = NULL; /* rbd_dev now owns this */
|
||||
|
||||
rc = rbd_dev_image_probe(rbd_dev, true);
|
||||
rc = rbd_dev_image_probe(rbd_dev, 0);
|
||||
if (rc < 0)
|
||||
goto err_out_rbd_dev;
|
||||
|
||||
|
|
|
@ -1956,6 +1956,7 @@ static void blkback_changed(struct xenbus_device *dev,
|
|||
break;
|
||||
/* Missed the backend's Closing state -- fallthrough */
|
||||
case XenbusStateClosing:
|
||||
if (info)
|
||||
blkfront_closing(info);
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -1184,10 +1184,11 @@ static int arm_ccn_pmu_cpu_notifier(struct notifier_block *nb,
|
|||
if (!cpumask_test_and_clear_cpu(cpu, &dt->cpu))
|
||||
break;
|
||||
target = cpumask_any_but(cpu_online_mask, cpu);
|
||||
if (target < 0)
|
||||
if (target >= nr_cpu_ids)
|
||||
break;
|
||||
perf_pmu_migrate_context(&dt->pmu, cpu, target);
|
||||
cpumask_set_cpu(target, &dt->cpu);
|
||||
if (ccn->irq)
|
||||
WARN_ON(irq_set_affinity(ccn->irq, &dt->cpu) != 0);
|
||||
default:
|
||||
break;
|
||||
|
|
|
@ -333,7 +333,8 @@ int clk_add_alias(const char *alias, const char *alias_dev_name,
|
|||
if (IS_ERR(r))
|
||||
return PTR_ERR(r);
|
||||
|
||||
l = clkdev_create(r, alias, "%s", alias_dev_name);
|
||||
l = clkdev_create(r, alias, alias_dev_name ? "%s" : NULL,
|
||||
alias_dev_name);
|
||||
clk_put(r);
|
||||
|
||||
return l ? 0 : -ENODEV;
|
||||
|
|
|
@ -1654,6 +1654,7 @@ struct amdgpu_pm {
|
|||
u8 fan_max_rpm;
|
||||
/* dpm */
|
||||
bool dpm_enabled;
|
||||
bool sysfs_initialized;
|
||||
struct amdgpu_dpm dpm;
|
||||
const struct firmware *fw; /* SMC firmware */
|
||||
uint32_t fw_version;
|
||||
|
|
|
@ -184,10 +184,6 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
|
|||
goto cleanup;
|
||||
}
|
||||
|
||||
fence_get(work->excl);
|
||||
for (i = 0; i < work->shared_count; ++i)
|
||||
fence_get(work->shared[i]);
|
||||
|
||||
amdgpu_bo_get_tiling_flags(new_rbo, &tiling_flags);
|
||||
amdgpu_bo_unreserve(new_rbo);
|
||||
|
||||
|
|
|
@ -294,10 +294,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
|
|||
struct amdgpu_device *adev = dev_get_drvdata(dev);
|
||||
umode_t effective_mode = attr->mode;
|
||||
|
||||
/* Skip limit attributes if DPM is not enabled */
|
||||
/* Skip attributes if DPM is not enabled */
|
||||
if (!adev->pm.dpm_enabled &&
|
||||
(attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr))
|
||||
attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
||||
return 0;
|
||||
|
||||
/* Skip fan attributes if fan is not present */
|
||||
|
@ -691,6 +695,9 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
|
|||
{
|
||||
int ret;
|
||||
|
||||
if (adev->pm.sysfs_initialized)
|
||||
return 0;
|
||||
|
||||
if (adev->pm.funcs->get_temperature == NULL)
|
||||
return 0;
|
||||
adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev,
|
||||
|
@ -719,6 +726,8 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
adev->pm.sysfs_initialized = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -2997,6 +2997,9 @@ static int kv_dpm_late_init(void *handle)
|
|||
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
|
||||
int ret;
|
||||
|
||||
if (!amdgpu_dpm)
|
||||
return 0;
|
||||
|
||||
/* init the sysfs and debugfs files late */
|
||||
ret = amdgpu_pm_sysfs_init(adev);
|
||||
if (ret)
|
||||
|
|
|
@ -1194,17 +1194,18 @@ static struct drm_dp_mst_branch *drm_dp_get_mst_branch_device(struct drm_dp_mst_
|
|||
|
||||
list_for_each_entry(port, &mstb->ports, next) {
|
||||
if (port->port_num == port_num) {
|
||||
if (!port->mstb) {
|
||||
mstb = port->mstb;
|
||||
if (!mstb) {
|
||||
DRM_ERROR("failed to lookup MSTB with lct %d, rad %02x\n", lct, rad[0]);
|
||||
return NULL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
mstb = port->mstb;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
kref_get(&mstb->kref);
|
||||
out:
|
||||
mutex_unlock(&mgr->lock);
|
||||
return mstb;
|
||||
}
|
||||
|
|
|
@ -143,7 +143,7 @@ i915_gem_shrink(struct drm_i915_private *dev_priv,
|
|||
}
|
||||
|
||||
/**
|
||||
* i915_gem_shrink - Shrink buffer object caches completely
|
||||
* i915_gem_shrink_all - Shrink buffer object caches completely
|
||||
* @dev_priv: i915 device
|
||||
*
|
||||
* This is a simple wraper around i915_gem_shrink() to aggressively shrink all
|
||||
|
|
|
@ -804,7 +804,10 @@ static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {
|
|||
* Also note, that the object created here is not currently a "first class"
|
||||
* object, in that several ioctls are banned. These are the CPU access
|
||||
* ioctls: mmap(), pwrite and pread. In practice, you are expected to use
|
||||
* direct access via your pointer rather than use those ioctls.
|
||||
* direct access via your pointer rather than use those ioctls. Another
|
||||
* restriction is that we do not allow userptr surfaces to be pinned to the
|
||||
* hardware and so we reject any attempt to create a framebuffer out of a
|
||||
* userptr.
|
||||
*
|
||||
* If you think this is a good interface to use to pass GPU memory between
|
||||
* drivers, please use dma-buf instead. In fact, wherever possible use
|
||||
|
|
|
@ -1724,6 +1724,15 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
|
|||
I915_READ(DPLL(!crtc->pipe)) | DPLL_DVO_2X_MODE);
|
||||
}
|
||||
|
||||
/*
|
||||
* Apparently we need to have VGA mode enabled prior to changing
|
||||
* the P1/P2 dividers. Otherwise the DPLL will keep using the old
|
||||
* dividers, even though the register value does change.
|
||||
*/
|
||||
I915_WRITE(reg, 0);
|
||||
|
||||
I915_WRITE(reg, dpll);
|
||||
|
||||
/* Wait for the clocks to stabilize. */
|
||||
POSTING_READ(reg);
|
||||
udelay(150);
|
||||
|
@ -14107,6 +14116,11 @@ static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb,
|
|||
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
|
||||
struct drm_i915_gem_object *obj = intel_fb->obj;
|
||||
|
||||
if (obj->userptr.mm) {
|
||||
DRM_DEBUG("attempting to use a userptr for a framebuffer, denied\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return drm_gem_handle_create(file, &obj->base, handle);
|
||||
}
|
||||
|
||||
|
@ -14897,9 +14911,19 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
|
|||
/* restore vblank interrupts to correct state */
|
||||
drm_crtc_vblank_reset(&crtc->base);
|
||||
if (crtc->active) {
|
||||
struct intel_plane *plane;
|
||||
|
||||
drm_calc_timestamping_constants(&crtc->base, &crtc->base.hwmode);
|
||||
update_scanline_offset(crtc);
|
||||
drm_crtc_vblank_on(&crtc->base);
|
||||
|
||||
/* Disable everything but the primary plane */
|
||||
for_each_intel_plane_on_crtc(dev, crtc, plane) {
|
||||
if (plane->base.type == DRM_PLANE_TYPE_PRIMARY)
|
||||
continue;
|
||||
|
||||
plane->disable_plane(&plane->base, &crtc->base);
|
||||
}
|
||||
}
|
||||
|
||||
/* We need to sanitize the plane -> pipe mapping first because this will
|
||||
|
@ -15067,38 +15091,25 @@ void i915_redisable_vga(struct drm_device *dev)
|
|||
i915_redisable_vga_power_on(dev);
|
||||
}
|
||||
|
||||
static bool primary_get_hw_state(struct intel_crtc *crtc)
|
||||
static bool primary_get_hw_state(struct intel_plane *plane)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
|
||||
return !!(I915_READ(DSPCNTR(crtc->plane)) & DISPLAY_PLANE_ENABLE);
|
||||
return I915_READ(DSPCNTR(plane->plane)) & DISPLAY_PLANE_ENABLE;
|
||||
}
|
||||
|
||||
static void readout_plane_state(struct intel_crtc *crtc,
|
||||
struct intel_crtc_state *crtc_state)
|
||||
/* FIXME read out full plane state for all planes */
|
||||
static void readout_plane_state(struct intel_crtc *crtc)
|
||||
{
|
||||
struct intel_plane *p;
|
||||
struct intel_plane_state *plane_state;
|
||||
bool active = crtc_state->base.active;
|
||||
struct drm_plane *primary = crtc->base.primary;
|
||||
struct intel_plane_state *plane_state =
|
||||
to_intel_plane_state(primary->state);
|
||||
|
||||
for_each_intel_plane(crtc->base.dev, p) {
|
||||
if (crtc->pipe != p->pipe)
|
||||
continue;
|
||||
plane_state->visible =
|
||||
primary_get_hw_state(to_intel_plane(primary));
|
||||
|
||||
plane_state = to_intel_plane_state(p->base.state);
|
||||
|
||||
if (p->base.type == DRM_PLANE_TYPE_PRIMARY) {
|
||||
plane_state->visible = primary_get_hw_state(crtc);
|
||||
if (plane_state->visible)
|
||||
crtc->base.state->plane_mask |=
|
||||
1 << drm_plane_index(&p->base);
|
||||
} else {
|
||||
if (active)
|
||||
p->disable_plane(&p->base, &crtc->base);
|
||||
|
||||
plane_state->visible = false;
|
||||
}
|
||||
}
|
||||
crtc->base.state->plane_mask |= 1 << drm_plane_index(primary);
|
||||
}
|
||||
|
||||
static void intel_modeset_readout_hw_state(struct drm_device *dev)
|
||||
|
@ -15121,34 +15132,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
|
|||
crtc->base.state->active = crtc->active;
|
||||
crtc->base.enabled = crtc->active;
|
||||
|
||||
memset(&crtc->base.mode, 0, sizeof(crtc->base.mode));
|
||||
if (crtc->base.state->active) {
|
||||
intel_mode_from_pipe_config(&crtc->base.mode, crtc->config);
|
||||
intel_mode_from_pipe_config(&crtc->base.state->adjusted_mode, crtc->config);
|
||||
WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode));
|
||||
|
||||
/*
|
||||
* The initial mode needs to be set in order to keep
|
||||
* the atomic core happy. It wants a valid mode if the
|
||||
* crtc's enabled, so we do the above call.
|
||||
*
|
||||
* At this point some state updated by the connectors
|
||||
* in their ->detect() callback has not run yet, so
|
||||
* no recalculation can be done yet.
|
||||
*
|
||||
* Even if we could do a recalculation and modeset
|
||||
* right now it would cause a double modeset if
|
||||
* fbdev or userspace chooses a different initial mode.
|
||||
*
|
||||
* If that happens, someone indicated they wanted a
|
||||
* mode change, which means it's safe to do a full
|
||||
* recalculation.
|
||||
*/
|
||||
crtc->base.state->mode.private_flags = I915_MODE_FLAG_INHERITED;
|
||||
}
|
||||
|
||||
crtc->base.hwmode = crtc->config->base.adjusted_mode;
|
||||
readout_plane_state(crtc, to_intel_crtc_state(crtc->base.state));
|
||||
readout_plane_state(crtc);
|
||||
|
||||
DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",
|
||||
crtc->base.base.id,
|
||||
|
@ -15207,6 +15191,36 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
|
|||
connector->base.name,
|
||||
connector->base.encoder ? "enabled" : "disabled");
|
||||
}
|
||||
|
||||
for_each_intel_crtc(dev, crtc) {
|
||||
crtc->base.hwmode = crtc->config->base.adjusted_mode;
|
||||
|
||||
memset(&crtc->base.mode, 0, sizeof(crtc->base.mode));
|
||||
if (crtc->base.state->active) {
|
||||
intel_mode_from_pipe_config(&crtc->base.mode, crtc->config);
|
||||
intel_mode_from_pipe_config(&crtc->base.state->adjusted_mode, crtc->config);
|
||||
WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode));
|
||||
|
||||
/*
|
||||
* The initial mode needs to be set in order to keep
|
||||
* the atomic core happy. It wants a valid mode if the
|
||||
* crtc's enabled, so we do the above call.
|
||||
*
|
||||
* At this point some state updated by the connectors
|
||||
* in their ->detect() callback has not run yet, so
|
||||
* no recalculation can be done yet.
|
||||
*
|
||||
* Even if we could do a recalculation and modeset
|
||||
* right now it would cause a double modeset if
|
||||
* fbdev or userspace chooses a different initial mode.
|
||||
*
|
||||
* If that happens, someone indicated they wanted a
|
||||
* mode change, which means it's safe to do a full
|
||||
* recalculation.
|
||||
*/
|
||||
crtc->base.state->mode.private_flags = I915_MODE_FLAG_INHERITED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Scan out the current hw modeset state,
|
||||
|
|
|
@ -1659,6 +1659,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request,
|
|||
if (flush_domains) {
|
||||
flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_FLUSH_ENABLE;
|
||||
}
|
||||
|
||||
if (invalidate_domains) {
|
||||
|
|
|
@ -347,6 +347,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req,
|
|||
if (flush_domains) {
|
||||
flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_FLUSH_ENABLE;
|
||||
}
|
||||
if (invalidate_domains) {
|
||||
flags |= PIPE_CONTROL_TLB_INVALIDATE;
|
||||
|
@ -418,6 +419,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req,
|
|||
if (flush_domains) {
|
||||
flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
|
||||
flags |= PIPE_CONTROL_FLUSH_ENABLE;
|
||||
}
|
||||
if (invalidate_domains) {
|
||||
flags |= PIPE_CONTROL_TLB_INVALIDATE;
|
||||
|
|
|
@ -227,11 +227,12 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem,
|
|||
struct nouveau_bo *nvbo = nouveau_gem_object(gem);
|
||||
struct nvkm_vma *vma;
|
||||
|
||||
if (nvbo->bo.mem.mem_type == TTM_PL_TT)
|
||||
if (is_power_of_2(nvbo->valid_domains))
|
||||
rep->domain = nvbo->valid_domains;
|
||||
else if (nvbo->bo.mem.mem_type == TTM_PL_TT)
|
||||
rep->domain = NOUVEAU_GEM_DOMAIN_GART;
|
||||
else
|
||||
rep->domain = NOUVEAU_GEM_DOMAIN_VRAM;
|
||||
|
||||
rep->offset = nvbo->bo.offset;
|
||||
if (cli->vm) {
|
||||
vma = nouveau_bo_vma_find(nvbo, cli->vm);
|
||||
|
|
|
@ -1658,6 +1658,7 @@ struct radeon_pm {
|
|||
u8 fan_max_rpm;
|
||||
/* dpm */
|
||||
bool dpm_enabled;
|
||||
bool sysfs_initialized;
|
||||
struct radeon_dpm dpm;
|
||||
};
|
||||
|
||||
|
|
|
@ -717,10 +717,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
|
|||
struct radeon_device *rdev = dev_get_drvdata(dev);
|
||||
umode_t effective_mode = attr->mode;
|
||||
|
||||
/* Skip limit attributes if DPM is not enabled */
|
||||
/* Skip attributes if DPM is not enabled */
|
||||
if (rdev->pm.pm_method != PM_METHOD_DPM &&
|
||||
(attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr))
|
||||
attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
||||
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
||||
return 0;
|
||||
|
||||
/* Skip fan attributes if fan is not present */
|
||||
|
@ -1524,6 +1528,7 @@ int radeon_pm_late_init(struct radeon_device *rdev)
|
|||
|
||||
if (rdev->pm.pm_method == PM_METHOD_DPM) {
|
||||
if (rdev->pm.dpm_enabled) {
|
||||
if (!rdev->pm.sysfs_initialized) {
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for dpm state\n");
|
||||
|
@ -1537,6 +1542,9 @@ int radeon_pm_late_init(struct radeon_device *rdev)
|
|||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
if (!ret)
|
||||
rdev->pm.sysfs_initialized = true;
|
||||
}
|
||||
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
ret = radeon_dpm_late_enable(rdev);
|
||||
|
@ -1552,7 +1560,8 @@ int radeon_pm_late_init(struct radeon_device *rdev)
|
|||
}
|
||||
}
|
||||
} else {
|
||||
if (rdev->pm.num_power_states > 1) {
|
||||
if ((rdev->pm.num_power_states > 1) &&
|
||||
(!rdev->pm.sysfs_initialized)) {
|
||||
/* where's the best place to put these? */
|
||||
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
||||
if (ret)
|
||||
|
@ -1560,6 +1569,8 @@ int radeon_pm_late_init(struct radeon_device *rdev)
|
|||
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
||||
if (ret)
|
||||
DRM_ERROR("failed to create device file for power method\n");
|
||||
if (!ret)
|
||||
rdev->pm.sysfs_initialized = true;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
|
|
@ -415,16 +415,16 @@ static void vmw_cmdbuf_ctx_process(struct vmw_cmdbuf_man *man,
|
|||
*
|
||||
* Calls vmw_cmdbuf_ctx_process() on all contexts. If any context has
|
||||
* command buffers left that are not submitted to hardware, Make sure
|
||||
* IRQ handling is turned on. Otherwise, make sure it's turned off. This
|
||||
* function may return -EAGAIN to indicate it should be rerun due to
|
||||
* possibly missed IRQs if IRQs has just been turned on.
|
||||
* IRQ handling is turned on. Otherwise, make sure it's turned off.
|
||||
*/
|
||||
static int vmw_cmdbuf_man_process(struct vmw_cmdbuf_man *man)
|
||||
static void vmw_cmdbuf_man_process(struct vmw_cmdbuf_man *man)
|
||||
{
|
||||
int notempty = 0;
|
||||
int notempty;
|
||||
struct vmw_cmdbuf_context *ctx;
|
||||
int i;
|
||||
|
||||
retry:
|
||||
notempty = 0;
|
||||
for_each_cmdbuf_ctx(man, i, ctx)
|
||||
vmw_cmdbuf_ctx_process(man, ctx, ¬empty);
|
||||
|
||||
|
@ -440,10 +440,8 @@ static int vmw_cmdbuf_man_process(struct vmw_cmdbuf_man *man)
|
|||
man->irq_on = true;
|
||||
|
||||
/* Rerun in case we just missed an irq. */
|
||||
return -EAGAIN;
|
||||
goto retry;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -468,7 +466,6 @@ static void vmw_cmdbuf_ctx_add(struct vmw_cmdbuf_man *man,
|
|||
header->cb_context = cb_context;
|
||||
list_add_tail(&header->list, &man->ctx[cb_context].submitted);
|
||||
|
||||
if (vmw_cmdbuf_man_process(man) == -EAGAIN)
|
||||
vmw_cmdbuf_man_process(man);
|
||||
}
|
||||
|
||||
|
@ -488,8 +485,7 @@ static void vmw_cmdbuf_man_tasklet(unsigned long data)
|
|||
struct vmw_cmdbuf_man *man = (struct vmw_cmdbuf_man *) data;
|
||||
|
||||
spin_lock(&man->lock);
|
||||
if (vmw_cmdbuf_man_process(man) == -EAGAIN)
|
||||
(void) vmw_cmdbuf_man_process(man);
|
||||
vmw_cmdbuf_man_process(man);
|
||||
spin_unlock(&man->lock);
|
||||
}
|
||||
|
||||
|
@ -507,6 +503,7 @@ static void vmw_cmdbuf_work_func(struct work_struct *work)
|
|||
struct vmw_cmdbuf_man *man =
|
||||
container_of(work, struct vmw_cmdbuf_man, work);
|
||||
struct vmw_cmdbuf_header *entry, *next;
|
||||
uint32_t dummy;
|
||||
bool restart = false;
|
||||
|
||||
spin_lock_bh(&man->lock);
|
||||
|
@ -523,6 +520,8 @@ static void vmw_cmdbuf_work_func(struct work_struct *work)
|
|||
if (restart && vmw_cmdbuf_startstop(man, true))
|
||||
DRM_ERROR("Failed restarting command buffer context 0.\n");
|
||||
|
||||
/* Send a new fence in case one was removed */
|
||||
vmw_fifo_send_fence(man->dev_priv, &dummy);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -682,7 +681,7 @@ static bool vmw_cmdbuf_try_alloc(struct vmw_cmdbuf_man *man,
|
|||
DRM_MM_SEARCH_DEFAULT,
|
||||
DRM_MM_CREATE_DEFAULT);
|
||||
if (ret) {
|
||||
(void) vmw_cmdbuf_man_process(man);
|
||||
vmw_cmdbuf_man_process(man);
|
||||
ret = drm_mm_insert_node_generic(&man->mm, info->node,
|
||||
info->page_size, 0, 0,
|
||||
DRM_MM_SEARCH_DEFAULT,
|
||||
|
@ -1168,7 +1167,14 @@ int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man,
|
|||
drm_mm_init(&man->mm, 0, size >> PAGE_SHIFT);
|
||||
|
||||
man->has_pool = true;
|
||||
man->default_size = default_size;
|
||||
|
||||
/*
|
||||
* For now, set the default size to VMW_CMDBUF_INLINE_SIZE to
|
||||
* prevent deadlocks from happening when vmw_cmdbuf_space_pool()
|
||||
* needs to wait for space and we block on further command
|
||||
* submissions to be able to free up space.
|
||||
*/
|
||||
man->default_size = VMW_CMDBUF_INLINE_SIZE;
|
||||
DRM_INFO("Using command buffers with %s pool.\n",
|
||||
(man->using_mob) ? "MOB" : "DMA");
|
||||
|
||||
|
|
|
@ -669,8 +669,6 @@ mv64xxx_i2c_can_offload(struct mv64xxx_i2c_data *drv_data)
|
|||
struct i2c_msg *msgs = drv_data->msgs;
|
||||
int num = drv_data->num_msgs;
|
||||
|
||||
return false;
|
||||
|
||||
if (!drv_data->offload_enabled)
|
||||
return false;
|
||||
|
||||
|
|
|
@ -600,7 +600,7 @@ static int i2c_pnx_controller_suspend(struct device *dev)
|
|||
{
|
||||
struct i2c_pnx_algo_data *alg_data = dev_get_drvdata(dev);
|
||||
|
||||
clk_disable(alg_data->clk);
|
||||
clk_disable_unprepare(alg_data->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -609,7 +609,7 @@ static int i2c_pnx_controller_resume(struct device *dev)
|
|||
{
|
||||
struct i2c_pnx_algo_data *alg_data = dev_get_drvdata(dev);
|
||||
|
||||
return clk_enable(alg_data->clk);
|
||||
return clk_prepare_enable(alg_data->clk);
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(i2c_pnx_pm,
|
||||
|
@ -672,7 +672,7 @@ static int i2c_pnx_probe(struct platform_device *pdev)
|
|||
if (IS_ERR(alg_data->ioaddr))
|
||||
return PTR_ERR(alg_data->ioaddr);
|
||||
|
||||
ret = clk_enable(alg_data->clk);
|
||||
ret = clk_prepare_enable(alg_data->clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
@ -726,7 +726,7 @@ static int i2c_pnx_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
|
||||
out_clock:
|
||||
clk_disable(alg_data->clk);
|
||||
clk_disable_unprepare(alg_data->clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -735,7 +735,7 @@ static int i2c_pnx_remove(struct platform_device *pdev)
|
|||
struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
|
||||
|
||||
i2c_del_adapter(&alg_data->adapter);
|
||||
clk_disable(alg_data->clk);
|
||||
clk_disable_unprepare(alg_data->clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -149,8 +149,6 @@
|
|||
#define ST_ACCEL_4_BDU_MASK 0x40
|
||||
#define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21
|
||||
#define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04
|
||||
#define ST_ACCEL_4_IG1_EN_ADDR 0x21
|
||||
#define ST_ACCEL_4_IG1_EN_MASK 0x08
|
||||
#define ST_ACCEL_4_MULTIREAD_BIT true
|
||||
|
||||
/* CUSTOM VALUES FOR SENSOR 5 */
|
||||
|
@ -489,10 +487,6 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
|
|||
.drdy_irq = {
|
||||
.addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
|
||||
.mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
|
||||
.ig1 = {
|
||||
.en_addr = ST_ACCEL_4_IG1_EN_ADDR,
|
||||
.en_mask = ST_ACCEL_4_IG1_EN_MASK,
|
||||
},
|
||||
},
|
||||
.multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
|
||||
.bootime = 2, /* guess */
|
||||
|
|
|
@ -45,13 +45,18 @@
|
|||
#include <linux/types.h>
|
||||
#include <linux/gfp.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
|
||||
#include <linux/iio/iio.h>
|
||||
|
||||
#define TWL4030_USB_SEL_MADC_MCPC (1<<3)
|
||||
#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
|
||||
|
||||
/**
|
||||
* struct twl4030_madc_data - a container for madc info
|
||||
* @dev: Pointer to device structure for madc
|
||||
* @lock: Mutex protecting this data structure
|
||||
* @regulator: Pointer to bias regulator for madc
|
||||
* @requests: Array of request struct corresponding to SW1, SW2 and RT
|
||||
* @use_second_irq: IRQ selection (main or co-processor)
|
||||
* @imr: Interrupt mask register of MADC
|
||||
|
@ -60,6 +65,7 @@
|
|||
struct twl4030_madc_data {
|
||||
struct device *dev;
|
||||
struct mutex lock; /* mutex protecting this data structure */
|
||||
struct regulator *usb3v1;
|
||||
struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
|
||||
bool use_second_irq;
|
||||
u8 imr;
|
||||
|
@ -841,6 +847,32 @@ static int twl4030_madc_probe(struct platform_device *pdev)
|
|||
}
|
||||
twl4030_madc = madc;
|
||||
|
||||
/* Configure MADC[3:6] */
|
||||
ret = twl_i2c_read_u8(TWL_MODULE_USB, ®val,
|
||||
TWL4030_USB_CARKIT_ANA_CTRL);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n",
|
||||
TWL4030_USB_CARKIT_ANA_CTRL);
|
||||
goto err_i2c;
|
||||
}
|
||||
regval |= TWL4030_USB_SEL_MADC_MCPC;
|
||||
ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
|
||||
TWL4030_USB_CARKIT_ANA_CTRL);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n",
|
||||
TWL4030_USB_CARKIT_ANA_CTRL);
|
||||
goto err_i2c;
|
||||
}
|
||||
|
||||
/* Enable 3v1 bias regulator for MADC[3:6] */
|
||||
madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
|
||||
if (IS_ERR(madc->usb3v1))
|
||||
return -ENODEV;
|
||||
|
||||
ret = regulator_enable(madc->usb3v1);
|
||||
if (ret)
|
||||
dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
|
||||
|
||||
ret = iio_device_register(iio_dev);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "could not register iio device\n");
|
||||
|
@ -866,6 +898,8 @@ static int twl4030_madc_remove(struct platform_device *pdev)
|
|||
twl4030_madc_set_current_generator(madc, 0, 0);
|
||||
twl4030_madc_set_power(madc, 0);
|
||||
|
||||
regulator_disable(madc->usb3v1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -508,12 +508,12 @@ void ib_cache_gid_set_default_gid(struct ib_device *ib_dev, u8 port,
|
|||
memset(&gid_attr, 0, sizeof(gid_attr));
|
||||
gid_attr.ndev = ndev;
|
||||
|
||||
mutex_lock(&table->lock);
|
||||
ix = find_gid(table, NULL, NULL, true, GID_ATTR_FIND_MASK_DEFAULT);
|
||||
|
||||
/* Coudn't find default GID location */
|
||||
WARN_ON(ix < 0);
|
||||
|
||||
mutex_lock(&table->lock);
|
||||
if (!__ib_cache_gid_get(ib_dev, port, ix,
|
||||
¤t_gid, ¤t_gid_attr) &&
|
||||
mode == IB_CACHE_GID_DEFAULT_MODE_SET &&
|
||||
|
|
|
@ -835,6 +835,11 @@ retest:
|
|||
case IB_CM_SIDR_REQ_RCVD:
|
||||
spin_unlock_irq(&cm_id_priv->lock);
|
||||
cm_reject_sidr_req(cm_id_priv, IB_SIDR_REJECT);
|
||||
spin_lock_irq(&cm.lock);
|
||||
if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node))
|
||||
rb_erase(&cm_id_priv->sidr_id_node,
|
||||
&cm.remote_sidr_table);
|
||||
spin_unlock_irq(&cm.lock);
|
||||
break;
|
||||
case IB_CM_REQ_SENT:
|
||||
case IB_CM_MRA_REQ_RCVD:
|
||||
|
@ -3172,7 +3177,10 @@ int ib_send_cm_sidr_rep(struct ib_cm_id *cm_id,
|
|||
spin_unlock_irqrestore(&cm_id_priv->lock, flags);
|
||||
|
||||
spin_lock_irqsave(&cm.lock, flags);
|
||||
if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) {
|
||||
rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table);
|
||||
RB_CLEAR_NODE(&cm_id_priv->sidr_id_node);
|
||||
}
|
||||
spin_unlock_irqrestore(&cm.lock, flags);
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -1067,14 +1067,14 @@ static int cma_save_req_info(const struct ib_cm_event *ib_event,
|
|||
sizeof(req->local_gid));
|
||||
req->has_gid = true;
|
||||
req->service_id = req_param->primary_path->service_id;
|
||||
req->pkey = req_param->bth_pkey;
|
||||
req->pkey = be16_to_cpu(req_param->primary_path->pkey);
|
||||
break;
|
||||
case IB_CM_SIDR_REQ_RECEIVED:
|
||||
req->device = sidr_param->listen_id->device;
|
||||
req->port = sidr_param->port;
|
||||
req->has_gid = false;
|
||||
req->service_id = sidr_param->service_id;
|
||||
req->pkey = sidr_param->bth_pkey;
|
||||
req->pkey = sidr_param->pkey;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
@ -1324,7 +1324,7 @@ static struct rdma_id_private *cma_id_from_event(struct ib_cm_id *cm_id,
|
|||
bind_list = cma_ps_find(rdma_ps_from_service_id(req.service_id),
|
||||
cma_port_from_service_id(req.service_id));
|
||||
id_priv = cma_find_listener(bind_list, cm_id, ib_event, &req, *net_dev);
|
||||
if (IS_ERR(id_priv)) {
|
||||
if (IS_ERR(id_priv) && *net_dev) {
|
||||
dev_put(*net_dev);
|
||||
*net_dev = NULL;
|
||||
}
|
||||
|
|
|
@ -250,25 +250,44 @@ static void enum_netdev_ipv4_ips(struct ib_device *ib_dev,
|
|||
u8 port, struct net_device *ndev)
|
||||
{
|
||||
struct in_device *in_dev;
|
||||
struct sin_list {
|
||||
struct list_head list;
|
||||
struct sockaddr_in ip;
|
||||
};
|
||||
struct sin_list *sin_iter;
|
||||
struct sin_list *sin_temp;
|
||||
|
||||
LIST_HEAD(sin_list);
|
||||
if (ndev->reg_state >= NETREG_UNREGISTERING)
|
||||
return;
|
||||
|
||||
in_dev = in_dev_get(ndev);
|
||||
if (!in_dev)
|
||||
rcu_read_lock();
|
||||
in_dev = __in_dev_get_rcu(ndev);
|
||||
if (!in_dev) {
|
||||
rcu_read_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
for_ifa(in_dev) {
|
||||
struct sockaddr_in ip;
|
||||
struct sin_list *entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
|
||||
|
||||
ip.sin_family = AF_INET;
|
||||
ip.sin_addr.s_addr = ifa->ifa_address;
|
||||
update_gid_ip(GID_ADD, ib_dev, port, ndev,
|
||||
(struct sockaddr *)&ip);
|
||||
if (!entry) {
|
||||
pr_warn("roce_gid_mgmt: couldn't allocate entry for IPv4 update\n");
|
||||
continue;
|
||||
}
|
||||
entry->ip.sin_family = AF_INET;
|
||||
entry->ip.sin_addr.s_addr = ifa->ifa_address;
|
||||
list_add_tail(&entry->list, &sin_list);
|
||||
}
|
||||
endfor_ifa(in_dev);
|
||||
rcu_read_unlock();
|
||||
|
||||
in_dev_put(in_dev);
|
||||
list_for_each_entry_safe(sin_iter, sin_temp, &sin_list, list) {
|
||||
update_gid_ip(GID_ADD, ib_dev, port, ndev,
|
||||
(struct sockaddr *)&sin_iter->ip);
|
||||
list_del(&sin_iter->list);
|
||||
kfree(sin_iter);
|
||||
}
|
||||
}
|
||||
|
||||
static void enum_netdev_ipv6_ips(struct ib_device *ib_dev,
|
||||
|
|
|
@ -1624,11 +1624,16 @@ static int ucma_open(struct inode *inode, struct file *filp)
|
|||
if (!file)
|
||||
return -ENOMEM;
|
||||
|
||||
file->close_wq = create_singlethread_workqueue("ucma_close_id");
|
||||
if (!file->close_wq) {
|
||||
kfree(file);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&file->event_list);
|
||||
INIT_LIST_HEAD(&file->ctx_list);
|
||||
init_waitqueue_head(&file->poll_wait);
|
||||
mutex_init(&file->mut);
|
||||
file->close_wq = create_singlethread_workqueue("ucma_close_id");
|
||||
|
||||
filp->private_data = file;
|
||||
file->filp = filp;
|
||||
|
|
|
@ -1975,7 +1975,7 @@ static void clear_dte_entry(u16 devid)
|
|||
{
|
||||
/* remove entry from the device table seen by the hardware */
|
||||
amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
|
||||
amd_iommu_dev_table[devid].data[1] = 0;
|
||||
amd_iommu_dev_table[devid].data[1] &= DTE_FLAG_MASK;
|
||||
|
||||
amd_iommu_apply_erratum_63(devid);
|
||||
}
|
||||
|
|
|
@ -295,6 +295,7 @@
|
|||
#define IOMMU_PTE_IR (1ULL << 61)
|
||||
#define IOMMU_PTE_IW (1ULL << 62)
|
||||
|
||||
#define DTE_FLAG_MASK (0x3ffULL << 32)
|
||||
#define DTE_FLAG_IOTLB (0x01UL << 32)
|
||||
#define DTE_FLAG_GV (0x01ULL << 55)
|
||||
#define DTE_GLX_SHIFT (56)
|
||||
|
|
|
@ -516,6 +516,13 @@ static void do_fault(struct work_struct *work)
|
|||
goto out;
|
||||
}
|
||||
|
||||
if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) {
|
||||
/* handle_mm_fault would BUG_ON() */
|
||||
up_read(&mm->mmap_sem);
|
||||
handle_fault_error(fault);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = handle_mm_fault(mm, vma, address, write);
|
||||
if (ret & VM_FAULT_ERROR) {
|
||||
/* failed to service fault */
|
||||
|
|
|
@ -2115,15 +2115,19 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
|
|||
return -ENOMEM;
|
||||
/* It is large page*/
|
||||
if (largepage_lvl > 1) {
|
||||
unsigned long nr_superpages, end_pfn;
|
||||
|
||||
pteval |= DMA_PTE_LARGE_PAGE;
|
||||
lvl_pages = lvl_to_nr_pages(largepage_lvl);
|
||||
|
||||
nr_superpages = sg_res / lvl_pages;
|
||||
end_pfn = iov_pfn + nr_superpages * lvl_pages - 1;
|
||||
|
||||
/*
|
||||
* Ensure that old small page tables are
|
||||
* removed to make room for superpage,
|
||||
* if they exist.
|
||||
* removed to make room for superpage(s).
|
||||
*/
|
||||
dma_pte_free_pagetable(domain, iov_pfn,
|
||||
iov_pfn + lvl_pages - 1);
|
||||
dma_pte_free_pagetable(domain, iov_pfn, end_pfn);
|
||||
} else {
|
||||
pteval &= ~(uint64_t)DMA_PTE_LARGE_PAGE;
|
||||
}
|
||||
|
|
|
@ -634,10 +634,10 @@ static int __commit_transaction(struct dm_cache_metadata *cmd,
|
|||
|
||||
disk_super = dm_block_data(sblock);
|
||||
|
||||
disk_super->flags = cpu_to_le32(cmd->flags);
|
||||
if (mutator)
|
||||
update_flags(disk_super, mutator);
|
||||
|
||||
disk_super->flags = cpu_to_le32(cmd->flags);
|
||||
disk_super->mapping_root = cpu_to_le64(cmd->root);
|
||||
disk_super->hint_root = cpu_to_le64(cmd->hint_root);
|
||||
disk_super->discard_root = cpu_to_le64(cmd->discard_root);
|
||||
|
|
|
@ -301,11 +301,16 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent,
|
|||
{
|
||||
int s;
|
||||
uint32_t max_entries = le32_to_cpu(left->header.max_entries);
|
||||
unsigned target = (nr_left + nr_center + nr_right) / 3;
|
||||
BUG_ON(target > max_entries);
|
||||
unsigned total = nr_left + nr_center + nr_right;
|
||||
unsigned target_right = total / 3;
|
||||
unsigned remainder = (target_right * 3) != total;
|
||||
unsigned target_left = target_right + remainder;
|
||||
|
||||
BUG_ON(target_left > max_entries);
|
||||
BUG_ON(target_right > max_entries);
|
||||
|
||||
if (nr_left < nr_right) {
|
||||
s = nr_left - target;
|
||||
s = nr_left - target_left;
|
||||
|
||||
if (s < 0 && nr_center < -s) {
|
||||
/* not enough in central node */
|
||||
|
@ -316,10 +321,10 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent,
|
|||
} else
|
||||
shift(left, center, s);
|
||||
|
||||
shift(center, right, target - nr_right);
|
||||
shift(center, right, target_right - nr_right);
|
||||
|
||||
} else {
|
||||
s = target - nr_right;
|
||||
s = target_right - nr_right;
|
||||
if (s > 0 && nr_center < s) {
|
||||
/* not enough in central node */
|
||||
shift(center, right, nr_center);
|
||||
|
@ -329,7 +334,7 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent,
|
|||
} else
|
||||
shift(center, right, s);
|
||||
|
||||
shift(left, center, nr_left - target);
|
||||
shift(left, center, nr_left - target_left);
|
||||
}
|
||||
|
||||
*key_ptr(parent, c->index) = center->keys[0];
|
||||
|
|
|
@ -523,7 +523,7 @@ static int btree_split_beneath(struct shadow_spine *s, uint64_t key)
|
|||
|
||||
r = new_block(s->info, &right);
|
||||
if (r < 0) {
|
||||
/* FIXME: put left */
|
||||
unlock_block(s->info, left);
|
||||
return r;
|
||||
}
|
||||
|
||||
|
|
|
@ -2195,7 +2195,7 @@ static int narrow_write_error(struct r1bio *r1_bio, int i)
|
|||
bio_trim(wbio, sector - r1_bio->sector, sectors);
|
||||
wbio->bi_iter.bi_sector += rdev->data_offset;
|
||||
wbio->bi_bdev = rdev->bdev;
|
||||
if (submit_bio_wait(WRITE, wbio) == 0)
|
||||
if (submit_bio_wait(WRITE, wbio) < 0)
|
||||
/* failure! */
|
||||
ok = rdev_set_badblocks(rdev, sector,
|
||||
sectors, 0)
|
||||
|
@ -2258,15 +2258,16 @@ static void handle_write_finished(struct r1conf *conf, struct r1bio *r1_bio)
|
|||
rdev_dec_pending(conf->mirrors[m].rdev,
|
||||
conf->mddev);
|
||||
}
|
||||
if (test_bit(R1BIO_WriteError, &r1_bio->state))
|
||||
close_write(r1_bio);
|
||||
if (fail) {
|
||||
spin_lock_irq(&conf->device_lock);
|
||||
list_add(&r1_bio->retry_list, &conf->bio_end_io_list);
|
||||
spin_unlock_irq(&conf->device_lock);
|
||||
md_wakeup_thread(conf->mddev->thread);
|
||||
} else
|
||||
} else {
|
||||
if (test_bit(R1BIO_WriteError, &r1_bio->state))
|
||||
close_write(r1_bio);
|
||||
raid_end_bio_io(r1_bio);
|
||||
}
|
||||
}
|
||||
|
||||
static void handle_read_error(struct r1conf *conf, struct r1bio *r1_bio)
|
||||
|
@ -2385,6 +2386,10 @@ static void raid1d(struct md_thread *thread)
|
|||
r1_bio = list_first_entry(&tmp, struct r1bio,
|
||||
retry_list);
|
||||
list_del(&r1_bio->retry_list);
|
||||
if (mddev->degraded)
|
||||
set_bit(R1BIO_Degraded, &r1_bio->state);
|
||||
if (test_bit(R1BIO_WriteError, &r1_bio->state))
|
||||
close_write(r1_bio);
|
||||
raid_end_bio_io(r1_bio);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
* far_copies (stored in second byte of layout)
|
||||
* far_offset (stored in bit 16 of layout )
|
||||
* use_far_sets (stored in bit 17 of layout )
|
||||
* use_far_sets_bugfixed (stored in bit 18 of layout )
|
||||
*
|
||||
* The data to be stored is divided into chunks using chunksize. Each device
|
||||
* is divided into far_copies sections. In each section, chunks are laid out
|
||||
|
@ -1497,6 +1498,8 @@ static void status(struct seq_file *seq, struct mddev *mddev)
|
|||
seq_printf(seq, " %d offset-copies", conf->geo.far_copies);
|
||||
else
|
||||
seq_printf(seq, " %d far-copies", conf->geo.far_copies);
|
||||
if (conf->geo.far_set_size != conf->geo.raid_disks)
|
||||
seq_printf(seq, " %d devices per set", conf->geo.far_set_size);
|
||||
}
|
||||
seq_printf(seq, " [%d/%d] [", conf->geo.raid_disks,
|
||||
conf->geo.raid_disks - mddev->degraded);
|
||||
|
@ -2467,7 +2470,7 @@ static int narrow_write_error(struct r10bio *r10_bio, int i)
|
|||
choose_data_offset(r10_bio, rdev) +
|
||||
(sector - r10_bio->sector));
|
||||
wbio->bi_bdev = rdev->bdev;
|
||||
if (submit_bio_wait(WRITE, wbio) == 0)
|
||||
if (submit_bio_wait(WRITE, wbio) < 0)
|
||||
/* Failure! */
|
||||
ok = rdev_set_badblocks(rdev, sector,
|
||||
sectors, 0)
|
||||
|
@ -2654,17 +2657,18 @@ static void handle_write_completed(struct r10conf *conf, struct r10bio *r10_bio)
|
|||
rdev_dec_pending(rdev, conf->mddev);
|
||||
}
|
||||
}
|
||||
if (test_bit(R10BIO_WriteError,
|
||||
&r10_bio->state))
|
||||
close_write(r10_bio);
|
||||
if (fail) {
|
||||
spin_lock_irq(&conf->device_lock);
|
||||
list_add(&r10_bio->retry_list, &conf->bio_end_io_list);
|
||||
spin_unlock_irq(&conf->device_lock);
|
||||
md_wakeup_thread(conf->mddev->thread);
|
||||
} else
|
||||
} else {
|
||||
if (test_bit(R10BIO_WriteError,
|
||||
&r10_bio->state))
|
||||
close_write(r10_bio);
|
||||
raid_end_bio_io(r10_bio);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void raid10d(struct md_thread *thread)
|
||||
|
@ -2691,6 +2695,12 @@ static void raid10d(struct md_thread *thread)
|
|||
r10_bio = list_first_entry(&tmp, struct r10bio,
|
||||
retry_list);
|
||||
list_del(&r10_bio->retry_list);
|
||||
if (mddev->degraded)
|
||||
set_bit(R10BIO_Degraded, &r10_bio->state);
|
||||
|
||||
if (test_bit(R10BIO_WriteError,
|
||||
&r10_bio->state))
|
||||
close_write(r10_bio);
|
||||
raid_end_bio_io(r10_bio);
|
||||
}
|
||||
}
|
||||
|
@ -3387,7 +3397,7 @@ static int setup_geo(struct geom *geo, struct mddev *mddev, enum geo_type new)
|
|||
disks = mddev->raid_disks + mddev->delta_disks;
|
||||
break;
|
||||
}
|
||||
if (layout >> 18)
|
||||
if (layout >> 19)
|
||||
return -1;
|
||||
if (chunk < (PAGE_SIZE >> 9) ||
|
||||
!is_power_of_2(chunk))
|
||||
|
@ -3399,7 +3409,22 @@ static int setup_geo(struct geom *geo, struct mddev *mddev, enum geo_type new)
|
|||
geo->near_copies = nc;
|
||||
geo->far_copies = fc;
|
||||
geo->far_offset = fo;
|
||||
geo->far_set_size = (layout & (1<<17)) ? disks / fc : disks;
|
||||
switch (layout >> 17) {
|
||||
case 0: /* original layout. simple but not always optimal */
|
||||
geo->far_set_size = disks;
|
||||
break;
|
||||
case 1: /* "improved" layout which was buggy. Hopefully no-one is
|
||||
* actually using this, but leave code here just in case.*/
|
||||
geo->far_set_size = disks/fc;
|
||||
WARN(geo->far_set_size < fc,
|
||||
"This RAID10 layout does not provide data safety - please backup and create new array\n");
|
||||
break;
|
||||
case 2: /* "improved" layout fixed to match documentation */
|
||||
geo->far_set_size = fc * nc;
|
||||
break;
|
||||
default: /* Not a valid layout */
|
||||
return -1;
|
||||
}
|
||||
geo->chunk_mask = chunk - 1;
|
||||
geo->chunk_shift = ffz(~chunk);
|
||||
return nc*fc;
|
||||
|
|
|
@ -46,8 +46,8 @@ extern struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
|
|||
const struct horus3a_config *config,
|
||||
struct i2c_adapter *i2c);
|
||||
#else
|
||||
static inline struct dvb_frontend *horus3a_attach(
|
||||
const struct cxd2820r_config *config,
|
||||
static inline struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
|
||||
const struct horus3a_config *config,
|
||||
struct i2c_adapter *i2c)
|
||||
{
|
||||
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||
|
|
|
@ -43,7 +43,7 @@ struct dvb_frontend *lnbh25_attach(
|
|||
struct lnbh25_config *cfg,
|
||||
struct i2c_adapter *i2c);
|
||||
#else
|
||||
static inline dvb_frontend *lnbh25_attach(
|
||||
static inline struct dvb_frontend *lnbh25_attach(
|
||||
struct dvb_frontend *fe,
|
||||
struct lnbh25_config *cfg,
|
||||
struct i2c_adapter *i2c)
|
||||
|
|
|
@ -18,6 +18,27 @@
|
|||
|
||||
static struct dvb_frontend_ops m88ds3103_ops;
|
||||
|
||||
/* write single register with mask */
|
||||
static int m88ds3103_update_bits(struct m88ds3103_dev *dev,
|
||||
u8 reg, u8 mask, u8 val)
|
||||
{
|
||||
int ret;
|
||||
u8 tmp;
|
||||
|
||||
/* no need for read if whole reg is written */
|
||||
if (mask != 0xff) {
|
||||
ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
val &= mask;
|
||||
tmp &= ~mask;
|
||||
val |= tmp;
|
||||
}
|
||||
|
||||
return regmap_bulk_write(dev->regmap, reg, &val, 1);
|
||||
}
|
||||
|
||||
/* write reg val table using reg addr auto increment */
|
||||
static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
|
||||
const struct m88ds3103_reg_val *tab, int tab_len)
|
||||
|
@ -394,10 +415,10 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
|
|||
u8tmp2 = 0x00; /* 0b00 */
|
||||
break;
|
||||
}
|
||||
ret = regmap_update_bits(dev->regmap, 0x22, 0xc0, u8tmp1 << 6);
|
||||
ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x24, 0xc0, u8tmp2 << 6);
|
||||
ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
@ -455,13 +476,13 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
|
|||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
ret = regmap_update_bits(dev->regmap, 0x9d, 0x08, 0x08);
|
||||
ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_write(dev->regmap, 0xf1, 0x01);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x30, 0x80, 0x80);
|
||||
ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
@ -498,7 +519,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
|
|||
switch (dev->cfg->ts_mode) {
|
||||
case M88DS3103_TS_SERIAL:
|
||||
case M88DS3103_TS_SERIAL_D7:
|
||||
ret = regmap_update_bits(dev->regmap, 0x29, 0x20, u8tmp1);
|
||||
ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
|
||||
if (ret)
|
||||
goto err;
|
||||
u8tmp1 = 0;
|
||||
|
@ -567,11 +588,11 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
|
|||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0x4d, 0x02, dev->cfg->spec_inv << 1);
|
||||
ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0x30, 0x10, dev->cfg->agc_inv << 4);
|
||||
ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -625,13 +646,13 @@ static int m88ds3103_init(struct dvb_frontend *fe)
|
|||
dev->warm = false;
|
||||
|
||||
/* wake up device from sleep */
|
||||
ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x01);
|
||||
ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x00);
|
||||
ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x00);
|
||||
ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -749,18 +770,18 @@ static int m88ds3103_sleep(struct dvb_frontend *fe)
|
|||
utmp = 0x29;
|
||||
else
|
||||
utmp = 0x27;
|
||||
ret = regmap_update_bits(dev->regmap, utmp, 0x01, 0x00);
|
||||
ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
/* sleep */
|
||||
ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00);
|
||||
ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01);
|
||||
ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
|
||||
if (ret)
|
||||
goto err;
|
||||
ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10);
|
||||
ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -992,12 +1013,12 @@ static int m88ds3103_set_tone(struct dvb_frontend *fe,
|
|||
}
|
||||
|
||||
utmp = tone << 7 | dev->cfg->envelope_mode << 5;
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
utmp = 1 << 2;
|
||||
ret = regmap_update_bits(dev->regmap, 0xa1, reg_a1_mask, utmp);
|
||||
ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1047,7 +1068,7 @@ static int m88ds3103_set_voltage(struct dvb_frontend *fe,
|
|||
voltage_dis ^= dev->cfg->lnb_en_pol;
|
||||
|
||||
utmp = voltage_dis << 1 | voltage_sel << 0;
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0x03, utmp);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1080,7 +1101,7 @@ static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
|
|||
}
|
||||
|
||||
utmp = dev->cfg->envelope_mode << 5;
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1115,12 +1136,12 @@ static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
|
|||
} else {
|
||||
dev_dbg(&client->dev, "diseqc tx timeout\n");
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40);
|
||||
ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1152,7 +1173,7 @@ static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
|
|||
}
|
||||
|
||||
utmp = dev->cfg->envelope_mode << 5;
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1194,12 +1215,12 @@ static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
|
|||
} else {
|
||||
dev_dbg(&client->dev, "diseqc tx timeout\n");
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40);
|
||||
ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80);
|
||||
ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
|
@ -1435,13 +1456,13 @@ static int m88ds3103_probe(struct i2c_client *client,
|
|||
goto err_kfree;
|
||||
|
||||
/* sleep */
|
||||
ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00);
|
||||
ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
|
||||
if (ret)
|
||||
goto err_kfree;
|
||||
ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01);
|
||||
ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
|
||||
if (ret)
|
||||
goto err_kfree;
|
||||
ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10);
|
||||
ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
|
||||
if (ret)
|
||||
goto err_kfree;
|
||||
|
||||
|
|
|
@ -502,6 +502,10 @@ static int si2168_init(struct dvb_frontend *fe)
|
|||
/* firmware is in the new format */
|
||||
for (remaining = fw->size; remaining > 0; remaining -= 17) {
|
||||
len = fw->data[fw->size - remaining];
|
||||
if (len > SI2168_ARGLEN) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len);
|
||||
cmd.wlen = len;
|
||||
cmd.rlen = 1;
|
||||
|
|
|
@ -80,11 +80,9 @@ irqreturn_t netup_spi_interrupt(struct netup_spi *spi)
|
|||
u16 reg;
|
||||
unsigned long flags;
|
||||
|
||||
if (!spi) {
|
||||
dev_dbg(&spi->master->dev,
|
||||
"%s(): SPI not initialized\n", __func__);
|
||||
if (!spi)
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&spi->lock, flags);
|
||||
reg = readw(&spi->regs->control_stat);
|
||||
if (!(reg & NETUP_SPI_CTRL_IRQ)) {
|
||||
|
@ -234,11 +232,9 @@ void netup_spi_release(struct netup_unidvb_dev *ndev)
|
|||
unsigned long flags;
|
||||
struct netup_spi *spi = ndev->spi;
|
||||
|
||||
if (!spi) {
|
||||
dev_dbg(&spi->master->dev,
|
||||
"%s(): SPI not initialized\n", __func__);
|
||||
if (!spi)
|
||||
return;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&spi->lock, flags);
|
||||
reg = readw(&spi->regs->control_stat);
|
||||
writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue