[POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.h
Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -15,6 +15,8 @@
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#ifndef CBE_REGS_H
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#define CBE_REGS_H
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#include <asm/cell-pmu.h>
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/*
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*
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* Some HID register definitions
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@ -35,32 +37,6 @@
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*
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*/
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/* Macros for the pm_control register. */
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#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
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#define CBE_PM_ENABLE_PERF_MON 0x80000000
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#define CBE_PM_STOP_AT_MAX 0x40000000
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#define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3)
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#define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28)
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#define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18)
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#define CBE_PM_FREEZE_ALL_CTRS 0x00100000
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#define CBE_PM_ENABLE_EXT_TRACE 0x00008000
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/* Macros for the trace_address register. */
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#define CBE_PM_TRACE_BUF_FULL 0x00000800
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#define CBE_PM_TRACE_BUF_EMPTY 0x00000400
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#define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff)
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#define CBE_PM_TRACE_BUF_MAX_COUNT 0x400
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/* Macros for the pm07_control registers. */
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#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f)
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#define CBE_PM_CTR_INPUT_CONTROL 0x02000000
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#define CBE_PM_CTR_POLARITY 0x01000000
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#define CBE_PM_CTR_COUNT_CYCLES 0x00800000
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#define CBE_PM_CTR_ENABLE 0x00400000
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/* Macros for the pm_status register. */
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#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
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union spe_reg {
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u64 val;
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u8 spe[8];
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@ -160,9 +136,6 @@ extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);
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* counters currently have a value waiting to be written.
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*/
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#define NR_PHYS_CTRS 4
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#define NR_CTRS (NR_PHYS_CTRS * 2)
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struct cbe_pmd_shadow_regs {
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u32 group_control;
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u32 debug_bus_control;
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@ -30,7 +30,6 @@
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#include "cbe_regs.h"
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#include "interrupt.h"
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#include "pmu.h"
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/*
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* When writing to write-only mmio addresses, save a shadow copy. All of the
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@ -1,57 +0,0 @@
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/*
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* Cell Broadband Engine Performance Monitor
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*
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* (C) Copyright IBM Corporation 2001,2006
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*
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* Author:
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* David Erb (djerb@us.ibm.com)
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* Kevin Corry (kevcorry@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __PERFMON_H__
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#define __PERFMON_H__
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enum pm_reg_name {
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group_control,
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debug_bus_control,
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trace_address,
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ext_tr_timer,
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pm_status,
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pm_control,
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pm_interval,
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pm_start_stop,
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};
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extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);
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extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
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extern u32 cbe_read_ctr(u32 cpu, u32 ctr);
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extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr);
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extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm (u32 cpu, enum pm_reg_name reg);
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extern void cbe_write_pm (u32 cpu, enum pm_reg_name reg, u32 val);
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extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr);
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extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
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extern void cbe_enable_pm(u32 cpu);
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extern void cbe_disable_pm(u32 cpu);
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extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
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#endif
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90
include/asm-powerpc/cell-pmu.h
Normal file
90
include/asm-powerpc/cell-pmu.h
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@ -0,0 +1,90 @@
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/*
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* Cell Broadband Engine Performance Monitor
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*
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* (C) Copyright IBM Corporation 2006
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*
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* Author:
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* David Erb (djerb@us.ibm.com)
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* Kevin Corry (kevcorry@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ASM_CELL_PMU_H__
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#define __ASM_CELL_PMU_H__
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/* The Cell PMU has four hardware performance counters, which can be
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* configured as four 32-bit counters or eight 16-bit counters.
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*/
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#define NR_PHYS_CTRS 4
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#define NR_CTRS (NR_PHYS_CTRS * 2)
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/* Macros for the pm_control register. */
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#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1))))
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#define CBE_PM_ENABLE_PERF_MON 0x80000000
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#define CBE_PM_STOP_AT_MAX 0x40000000
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#define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3)
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#define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28)
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#define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18)
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#define CBE_PM_FREEZE_ALL_CTRS 0x00100000
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#define CBE_PM_ENABLE_EXT_TRACE 0x00008000
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/* Macros for the trace_address register. */
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#define CBE_PM_TRACE_BUF_FULL 0x00000800
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#define CBE_PM_TRACE_BUF_EMPTY 0x00000400
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#define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff)
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#define CBE_PM_TRACE_BUF_MAX_COUNT 0x400
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/* Macros for the pm07_control registers. */
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#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f)
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#define CBE_PM_CTR_INPUT_CONTROL 0x02000000
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#define CBE_PM_CTR_POLARITY 0x01000000
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#define CBE_PM_CTR_COUNT_CYCLES 0x00800000
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#define CBE_PM_CTR_ENABLE 0x00400000
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/* Macros for the pm_status register. */
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#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
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enum pm_reg_name {
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group_control,
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debug_bus_control,
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trace_address,
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ext_tr_timer,
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pm_status,
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pm_control,
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pm_interval,
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pm_start_stop,
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};
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/* Routines for reading/writing the PMU registers. */
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extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr);
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extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val);
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extern u32 cbe_read_ctr(u32 cpu, u32 ctr);
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extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr);
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extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val);
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extern u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg);
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extern void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val);
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extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr);
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extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size);
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extern void cbe_enable_pm(u32 cpu);
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extern void cbe_disable_pm(u32 cpu);
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extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
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#endif /* __ASM_CELL_PMU_H__ */
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