redonkable/remarkable-linux
redonkable/remarkable-linux
1
0
Fork 0
Code Releases Activity

clk: tegra: Miscellaneous coding style cleanups

Browse source 
Use unsigned int for loop variables that can never become negative and
remove a couple of gratuitous blank lines. Also use single spaces around
operators and use a single space instead of a tab to separate comments
from code.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-11-18 14:04:20 +01:00
parent c4947e364b
commit e52d7c04bb
5 changed files with 19 additions and 25 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/clk/tegra/clk-pll.c
View file

@ -936,7 +936,7 @@ static int _calc_dynamic_ramp_rate(struct clk_hw *hw,
p_div = _p_div_to_hw(hw, p);
if (p_div < 0)
return p_div;
else
cfg->p = p_div;
if (cfg->n > divn_max(pll) || cfg->output_rate > pll->params->vco_max)

4
drivers/clk/tegra/clk-tegra114.c
View file

@ -965,8 +965,8 @@ static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
static __init void tegra114_utmi_param_configure(void __iomem *clk_base)
{
unsigned int i;
u32 reg;
int i;
for (i = 0; i < ARRAY_SIZE(utmi_parameters); i++) {
if (osc_freq == utmi_parameters[i].osc_frequency)
@ -1173,7 +1173,7 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,
{
struct clk *clk;
struct tegra_periph_init_data *data;
int i;
unsigned int i;
/* xusb_ss_div2 */
clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0,

2
drivers/clk/tegra/clk-tegra124.c
View file

@ -1024,8 +1024,8 @@ static struct clk **clks;
static void tegra124_utmi_param_configure(void __iomem *clk_base)
{
unsigned int i;
u32 reg;
int i;
for (i = 0; i < ARRAY_SIZE(utmi_parameters); i++) {
if (osc_freq == utmi_parameters[i].osc_frequency)

3
drivers/clk/tegra/clk-tegra20.c
View file

@ -759,7 +759,6 @@ static void __init tegra20_audio_clk_init(void)
CLK_SET_RATE_PARENT, 89,
periph_clk_enb_refcnt);
clks[TEGRA20_CLK_AUDIO_2X] = clk;
}
static const char *i2s1_parents[] = {"pll_a_out0", "audio_2x", "pll_p",
@ -802,7 +801,7 @@ static void __init tegra20_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
struct clk *clk;
int i;
unsigned int i;
/* ac97 */
clk = tegra_clk_register_periph_gate("ac97", "pll_a_out0",

9
drivers/clk/tegra/clk-tegra30.c
View file

@ -505,7 +505,6 @@ static struct tegra_clk_pll_params pll_d_params = {
.freq_table = pll_d_freq_table,
.flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_LFCON |
TEGRA_PLL_USE_LOCK,
};
static struct tegra_clk_pll_params pll_d2_params = {
@ -861,13 +860,12 @@ static struct tegra_clk tegra30_clks[tegra_clk_max] __initdata = {
[tegra_clk_pll_p_out4] = { .dt_id = TEGRA30_CLK_PLL_P_OUT4, .present = true },
[tegra_clk_pll_a] = { .dt_id = TEGRA30_CLK_PLL_A, .present = true },
[tegra_clk_pll_a_out0] = { .dt_id = TEGRA30_CLK_PLL_A_OUT0, .present = true },
};
static void tegra30_utmi_param_configure(void)
{
unsigned int i;
u32 reg;
int i;
for (i = 0; i < ARRAY_SIZE(utmi_parameters); i++) {
if (input_freq == utmi_parameters[i].osc_frequency)
@ -1135,7 +1133,7 @@ static void __init tegra30_periph_clk_init(void)
{
struct tegra_periph_init_data *data;
struct clk *clk;
int i;
unsigned int i;
/* dsia */
clk = tegra_clk_register_periph_gate("dsia", "pll_d_out0", 0, clk_base,
@ -1224,7 +1222,6 @@ static void tegra30_cpu_out_of_reset(u32 cpu)
wmb();
}
static void tegra30_enable_cpu_clock(u32 cpu)
{
unsigned int reg;
@ -1237,7 +1234,6 @@ static void tegra30_enable_cpu_clock(u32 cpu)
static void tegra30_disable_cpu_clock(u32 cpu)
{
unsigned int reg;
reg = readl(clk_base + TEGRA_CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
@ -1441,7 +1437,6 @@ static void __init tegra30_clock_init(struct device_node *np)
NULL) < 0)
return;
tegra_fixed_clk_init(tegra30_clks);
tegra30_pll_init();
tegra30_super_clk_init();