pinctrl: dt-bindings: add documentation for AP806 pin controllers
Document the device tree binding for the pin controllers found on the Armada 7K and Armada 8K SoCs. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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@ -28,14 +28,53 @@ Required properties:
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- compatible: must be: "marvell,ap806-clock"
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- #clock-cells: must be set to 1
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Pinctrl:
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--------
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For common binding part and usage, refer to
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Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.
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Required properties:
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- compatible must be "marvell,ap806-pinctrl",
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Available mpp pins/groups and functions:
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Note: brackets (x) are not part of the mpp name for marvell,function and given
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only for more detailed description in this document.
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name pins functions
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================================================================================
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mpp0 0 gpio, sdio(clk), spi0(clk)
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mpp1 1 gpio, sdio(cmd), spi0(miso)
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mpp2 2 gpio, sdio(d0), spi0(mosi)
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mpp3 3 gpio, sdio(d1), spi0(cs0n)
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mpp4 4 gpio, sdio(d2), i2c0(sda)
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mpp5 5 gpio, sdio(d3), i2c0(sdk)
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mpp6 6 gpio, sdio(ds)
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mpp7 7 gpio, sdio(d4), uart1(rxd)
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mpp8 8 gpio, sdio(d5), uart1(txd)
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mpp9 9 gpio, sdio(d6), spi0(cs1n)
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mpp10 10 gpio, sdio(d7)
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mpp11 11 gpio, uart0(txd)
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mpp12 12 gpio, sdio(pw_off), sdio(hw_rst)
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mpp13 13 gpio
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mpp14 14 gpio
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mpp15 15 gpio
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mpp16 16 gpio
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mpp17 17 gpio
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mpp18 18 gpio
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mpp19 19 gpio, uart0(rxd), sdio(pw_off)
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Example:
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ap_syscon: system-controller@6f4000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x6f4000 0x1000>;
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syscon: system-controller@6f4000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x6f4000 0x1000>;
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ap_clk: clock {
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compatible = "marvell,ap806-clock";
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#clock-cells = <1>;
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};
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ap_clk: clock {
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compatible = "marvell,ap806-clock";
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#clock-cells = <1>;
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};
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ap_pinctrl: pinctrl {
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compatible = "marvell,ap806-pinctrl";
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};
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};
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