drm/i915: don't save/restore CACHE_MODE_0 on gen7+
On gen7+, CACHE_MODE_0 moved, so we're clobbering some other reg rather than restoring CACHE_MODE_0. Don't do that. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -369,7 +369,8 @@ int i915_save_state(struct drm_device *dev)
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intel_disable_gt_powersave(dev);
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/* Cache mode state */
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dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
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if (INTEL_INFO(dev)->gen < 7)
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dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
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/* Memory Arbitration state */
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dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
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@ -418,7 +419,9 @@ int i915_restore_state(struct drm_device *dev)
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}
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/* Cache mode state */
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I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 | 0xffff0000);
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if (INTEL_INFO(dev)->gen < 7)
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I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
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0xffff0000);
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/* Memory arbitration state */
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I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
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