[PATCH] sata_sil24: update sil24_hardreset()
Use phy debouncing instead of unconditional wait after DEV_RST and make sil24_hardreset() to request followup SRST as that's the only way to wait for !BSY. Note that the original implementation never worked - if the cached status was !BSY, ata_busy_sleep() finished immediately; otherwise, it timed out regardless of the actual device status. Signed-off-by: Tejun Heo <htejun@gmail.com>
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@ -591,7 +591,7 @@ static int sil24_hardreset(struct ata_port *ap, unsigned int *class)
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{
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void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
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const char *reason;
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int tout_msec;
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int tout_msec, rc;
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u32 tmp;
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/* sil24 does the right thing(tm) without any protection */
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@ -605,10 +605,14 @@ static int sil24_hardreset(struct ata_port *ap, unsigned int *class)
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tmp = ata_wait_register(port + PORT_CTRL_STAT,
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PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, tout_msec);
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/* SStatus oscillates between zero and valid status for short
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* duration after DEV_RST, give it time to settle.
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/* SStatus oscillates between zero and valid status after
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* DEV_RST, debounce it.
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*/
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msleep(100);
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rc = sata_phy_debounce(ap, sata_deb_timing_before_fsrst);
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if (rc) {
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reason = "PHY debouncing failed";
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goto err;
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}
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if (tmp & PORT_CS_DEV_RST) {
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if (ata_port_offline(ap))
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@ -617,15 +621,13 @@ static int sil24_hardreset(struct ata_port *ap, unsigned int *class)
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goto err;
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}
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if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
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reason = "device not ready";
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goto err;
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}
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/* sil24 doesn't report device class code after hardreset,
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* leave *class alone.
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/* Sil24 doesn't store signature FIS after hardreset, so we
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* can't wait for BSY to clear. Some devices take a long time
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* to get ready and those devices will choke if we don't wait
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* for BSY clearance here. Tell libata to perform follow-up
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* softreset.
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*/
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return 0;
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return -EAGAIN;
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err:
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ata_port_printk(ap, KERN_ERR, "hardreset failed (%s)\n", reason);
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