sparc64:Support User Probes for sparc
Signed-off-by: Eric Saint Etienne <eric.saint.etienne@oracle.com> Signed-off-by: Allen Pais <allen.pais@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>zero-colors
Allen Pais
David S. Miller
parent
69973b8308
commit
e8f4aa6087
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@ -96,6 +96,7 @@ config KPROBES_ON_FTRACE
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config UPROBES
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def_bool n
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depends on ARCH_SUPPORTS_UPROBES
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help
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Uprobes is the user-space counterpart to kprobes: they
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enable instrumentation applications (such as 'perf probe')
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@ -155,6 +155,9 @@ config PGTABLE_LEVELS
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default 4 if 64BIT
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default 3
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config ARCH_SUPPORTS_UPROBES
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def_bool y if SPARC64
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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@ -213,6 +213,7 @@ CONFIG_SCHEDSTATS=y
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# CONFIG_RCU_CPU_STALL_DETECTOR is not set
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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CONFIG_BLK_DEV_IO_TRACE=y
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CONFIG_UPROBE_EVENTS=y
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CONFIG_KEYS=y
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CONFIG_CRYPTO_NULL=m
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CONFIG_CRYPTO_TEST=m
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@ -10,6 +10,8 @@ enum die_val {
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DIE_OOPS = 1,
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DIE_DEBUG, /* ta 0x70 */
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DIE_DEBUG_2, /* ta 0x71 */
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DIE_BPT, /* ta 0x73 */
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DIE_SSTEP, /* ta 0x74 */
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DIE_DIE,
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DIE_TRAP,
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DIE_TRAP_TL1,
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@ -61,7 +61,10 @@ extern union global_cpu_snapshot global_cpu_snapshot[NR_CPUS];
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#define force_successful_syscall_return() set_thread_noerror(1)
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#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
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#define instruction_pointer(regs) ((regs)->tpc)
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#define instruction_pointer_set(regs, val) ((regs)->tpc = (val))
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#define instruction_pointer_set(regs, val) do { \
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(regs)->tpc = (val); \
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(regs)->tnpc = (val)+4; \
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} while (0)
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#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
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static inline int is_syscall_success(struct pt_regs *regs)
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{
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@ -77,6 +80,36 @@ unsigned long profile_pc(struct pt_regs *);
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#else
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#define profile_pc(regs) instruction_pointer(regs)
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#endif
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#define MAX_REG_OFFSET (offsetof(struct pt_regs, magic))
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extern int regs_query_register_offset(const char *name);
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/**
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* regs_get_register() - get register value from its offset
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* @regs: pt_regs from which register value is gotten
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* @offset: offset number of the register.
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*
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* regs_get_register returns the value of a register whose
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* offset from @regs. The @offset is the offset of the register
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* in struct pt_regs. If @offset is bigger than MAX_REG_OFFSET,
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* this returns 0.
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*/
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static inline unsigned long regs_get_register(struct pt_regs *regs,
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unsigned long offset)
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{
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if (unlikely(offset >= MAX_REG_OFFSET))
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return 0;
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if (offset == PT_V9_Y)
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return *(unsigned int *)((unsigned long)regs + offset);
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return *(unsigned long *)((unsigned long)regs + offset);
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}
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/* Valid only for Kernel mode traps. */
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static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
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{
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return regs->u_regs[UREG_I6];
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}
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#else /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#else /* (defined(__sparc__) && defined(__arch64__)) */
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@ -180,7 +180,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
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#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
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/* flag bit 4 is available */
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#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */
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/* flag bit 6 is available */
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#define TIF_UPROBE 6 /* breakpointed or singlestepped */
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#define TIF_32BIT 7 /* 32-bit binary */
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#define TIF_NOHZ 8 /* in adaptive nohz mode */
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#define TIF_SECCOMP 9 /* secure computing */
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@ -199,6 +199,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
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#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_UNALIGNED (1<<TIF_UNALIGNED)
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#define _TIF_UPROBE (1<<TIF_UPROBE)
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#define _TIF_32BIT (1<<TIF_32BIT)
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#define _TIF_NOHZ (1<<TIF_NOHZ)
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#define _TIF_SECCOMP (1<<TIF_SECCOMP)
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@ -209,7 +210,8 @@ register struct thread_info *current_thread_info_reg asm("g6");
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#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
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_TIF_DO_NOTIFY_RESUME_MASK | \
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_TIF_NEED_RESCHED)
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#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING)
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#define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \
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_TIF_SIGPENDING | _TIF_UPROBE)
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#define is_32bit_task() (test_thread_flag(TIF_32BIT))
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@ -186,6 +186,12 @@
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#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
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#endif
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#ifdef CONFIG_UPROBES
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#define UPROBES_TRAP(lvl) TRAP_ARG(uprobe_trap, lvl)
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#else
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#define UPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
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#endif
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#ifdef CONFIG_KGDB
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#define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl)
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#else
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@ -0,0 +1,59 @@
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#ifndef _ASM_UPROBES_H
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#define _ASM_UPROBES_H
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/*
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* User-space Probes (UProbes) for sparc
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*
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* Copyright (C) 2013 Oracle, Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Authors:
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* Jose E. Marchesi <jose.marchesi@oracle.com>
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* Eric Saint Etienne <eric.saint.etienne@oracle.com>
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*/
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typedef u32 uprobe_opcode_t;
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#define MAX_UINSN_BYTES 4
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#define UPROBE_XOL_SLOT_BYTES (MAX_UINSN_BYTES * 2)
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#define UPROBE_SWBP_INSN_SIZE 4
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#define UPROBE_SWBP_INSN 0x91d02073 /* ta 0x73 */
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#define UPROBE_STP_INSN 0x91d02074 /* ta 0x74 */
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#define ANNUL_BIT (1 << 29)
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struct arch_uprobe {
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union {
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u8 insn[MAX_UINSN_BYTES];
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u32 ixol;
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};
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};
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struct arch_uprobe_task {
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u32 saved_tpc;
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u32 saved_tnpc;
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};
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struct task_struct;
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struct notifier_block;
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extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr);
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extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs);
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extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs);
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extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk);
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extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data);
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extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs);
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#endif /* _ASM_UPROBES_H */
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@ -116,4 +116,5 @@ obj-$(CONFIG_COMPAT) += $(audit--y)
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pc--$(CONFIG_PERF_EVENTS) := perf_event.o
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obj-$(CONFIG_SPARC64) += $(pc--y)
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obj-$(CONFIG_UPROBES) += uprobes.o
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obj-$(CONFIG_SPARC64) += jump_label.o
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@ -46,6 +46,43 @@
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/* #define ALLOW_INIT_TRACING */
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struct pt_regs_offset {
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const char *name;
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int offset;
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};
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#define REG_OFFSET_NAME(n, r) \
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{.name = n, .offset = (PT_V9_##r)}
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#define REG_OFFSET_END {.name = NULL, .offset = 0}
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static const struct pt_regs_offset regoffset_table[] = {
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REG_OFFSET_NAME("g0", G0),
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REG_OFFSET_NAME("g1", G1),
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REG_OFFSET_NAME("g2", G2),
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REG_OFFSET_NAME("g3", G3),
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REG_OFFSET_NAME("g4", G4),
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REG_OFFSET_NAME("g5", G5),
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REG_OFFSET_NAME("g6", G6),
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REG_OFFSET_NAME("g7", G7),
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REG_OFFSET_NAME("i0", I0),
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REG_OFFSET_NAME("i1", I1),
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REG_OFFSET_NAME("i2", I2),
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REG_OFFSET_NAME("i3", I3),
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REG_OFFSET_NAME("i4", I4),
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REG_OFFSET_NAME("i5", I5),
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REG_OFFSET_NAME("i6", I6),
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REG_OFFSET_NAME("i7", I7),
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REG_OFFSET_NAME("tstate", TSTATE),
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REG_OFFSET_NAME("pc", TPC),
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REG_OFFSET_NAME("npc", TNPC),
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REG_OFFSET_NAME("y", Y),
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REG_OFFSET_NAME("lr", I7),
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REG_OFFSET_END,
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};
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/*
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* Called by kernel/ptrace.c when detaching..
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*
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@ -1107,3 +1144,20 @@ asmlinkage void syscall_trace_leave(struct pt_regs *regs)
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if (test_thread_flag(TIF_NOHZ))
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user_enter();
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}
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/**
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* regs_query_register_offset() - query register offset from its name
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* @name: the name of a register
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*
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* regs_query_register_offset() returns the offset of a register in struct
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* pt_regs from its name. If the name is invalid, this returns -EINVAL;
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*/
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int regs_query_register_offset(const char *name)
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{
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const struct pt_regs_offset *roff;
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for (roff = regoffset_table; roff->name != NULL; roff++)
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if (!strcmp(roff->name, name))
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return roff->offset;
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return -EINVAL;
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}
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@ -545,6 +545,8 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
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void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags)
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{
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user_exit();
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if (thread_info_flags & _TIF_UPROBE)
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uprobe_notify_resume(regs);
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if (thread_info_flags & _TIF_SIGPENDING)
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do_signal(regs, orig_i0);
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if (thread_info_flags & _TIF_NOTIFY_RESUME) {
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@ -165,7 +165,7 @@ tl0_resv169: BTRAP(0x169) BTRAP(0x16a) BTRAP(0x16b) BTRAP(0x16c)
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tl0_linux64: LINUX_64BIT_SYSCALL_TRAP
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tl0_gsctx: TRAP(sparc64_get_context) TRAP(sparc64_set_context)
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tl0_resv170: KPROBES_TRAP(0x170) KPROBES_TRAP(0x171) KGDB_TRAP(0x172)
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tl0_resv173: BTRAP(0x173) BTRAP(0x174) BTRAP(0x175) BTRAP(0x176) BTRAP(0x177)
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tl0_resv173: UPROBES_TRAP(0x173) UPROBES_TRAP(0x174) BTRAP(0x175) BTRAP(0x176) BTRAP(0x177)
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tl0_resv178: BTRAP(0x178) BTRAP(0x179) BTRAP(0x17a) BTRAP(0x17b) BTRAP(0x17c)
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tl0_resv17d: BTRAP(0x17d) BTRAP(0x17e) BTRAP(0x17f)
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#define BTRAPS(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3) BTRAP(x+4) BTRAP(x+5) BTRAP(x+6) BTRAP(x+7)
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@ -0,0 +1,331 @@
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/*
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* User-space Probes (UProbes) for sparc
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*
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* Copyright (C) 2013 Oracle Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Authors:
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* Jose E. Marchesi <jose.marchesi@oracle.com>
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* Eric Saint Etienne <eric.saint.etienne@oracle.com>
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*/
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#include <linux/kernel.h>
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#include <linux/highmem.h>
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#include <linux/uprobes.h>
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#include <linux/uaccess.h>
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#include <linux/sched.h> /* For struct task_struct */
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#include <linux/kdebug.h>
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#include <asm/cacheflush.h>
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#include <asm/uaccess.h>
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/* Compute the address of the breakpoint instruction and return it.
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*
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* Note that uprobe_get_swbp_addr is defined as a weak symbol in
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* kernel/events/uprobe.c.
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*/
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unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
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{
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return instruction_pointer(regs);
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}
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static void copy_to_page(struct page *page, unsigned long vaddr,
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const void *src, int len)
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{
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void *kaddr = kmap_atomic(page);
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memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len);
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kunmap_atomic(kaddr);
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}
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/* Fill in the xol area with the probed instruction followed by the
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* single-step trap. Some fixups in the copied instruction are
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* performed at this point.
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*
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* Note that uprobe_xol_copy is defined as a weak symbol in
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* kernel/events/uprobe.c.
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*/
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void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
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void *src, unsigned long len)
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{
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const u32 stp_insn = UPROBE_STP_INSN;
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u32 insn = *(u32 *) src;
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/* Branches annulling their delay slot must be fixed to not do
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* so. Clearing the annul bit on these instructions we can be
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* sure the single-step breakpoint in the XOL slot will be
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* executed.
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*/
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u32 op = (insn >> 30) & 0x3;
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u32 op2 = (insn >> 22) & 0x7;
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if (op == 0 &&
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(op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) &&
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(insn & ANNUL_BIT) == ANNUL_BIT)
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insn &= ~ANNUL_BIT;
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copy_to_page(page, vaddr, &insn, len);
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copy_to_page(page, vaddr+len, &stp_insn, 4);
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}
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/* Instruction analysis/validity.
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*
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* This function returns 0 on success or a -ve number on error.
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*/
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int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
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struct mm_struct *mm, unsigned long addr)
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{
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/* Any unsupported instruction? Then return -EINVAL */
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return 0;
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}
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/* If INSN is a relative control transfer instruction, return the
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* corrected branch destination value.
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*
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* Note that regs->tpc and regs->tnpc still hold the values of the
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* program counters at the time of the single-step trap due to the
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* execution of the UPROBE_STP_INSN at utask->xol_vaddr + 4.
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*
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*/
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static unsigned long relbranch_fixup(u32 insn, struct uprobe_task *utask,
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struct pt_regs *regs)
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{
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/* Branch not taken, no mods necessary. */
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if (regs->tnpc == regs->tpc + 0x4UL)
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return utask->autask.saved_tnpc + 0x4UL;
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/* The three cases are call, branch w/prediction,
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* and traditional branch.
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*/
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if ((insn & 0xc0000000) == 0x40000000 ||
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(insn & 0xc1c00000) == 0x00400000 ||
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(insn & 0xc1c00000) == 0x00800000) {
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unsigned long real_pc = (unsigned long) utask->vaddr;
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unsigned long ixol_addr = utask->xol_vaddr;
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/* The instruction did all the work for us
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* already, just apply the offset to the correct
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* instruction location.
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*/
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return (real_pc + (regs->tnpc - ixol_addr));
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}
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|
||||
/* It is jmpl or some other absolute PC modification instruction,
|
||||
* leave NPC as-is.
|
||||
*/
|
||||
return regs->tnpc;
|
||||
}
|
||||
|
||||
/* If INSN is an instruction which writes its PC location
|
||||
* into a destination register, fix that up.
|
||||
*/
|
||||
static int retpc_fixup(struct pt_regs *regs, u32 insn,
|
||||
unsigned long real_pc)
|
||||
{
|
||||
unsigned long *slot = NULL;
|
||||
int rc = 0;
|
||||
|
||||
/* Simplest case is 'call', which always uses %o7 */
|
||||
if ((insn & 0xc0000000) == 0x40000000)
|
||||
slot = ®s->u_regs[UREG_I7];
|
||||
|
||||
/* 'jmpl' encodes the register inside of the opcode */
|
||||
if ((insn & 0xc1f80000) == 0x81c00000) {
|
||||
unsigned long rd = ((insn >> 25) & 0x1f);
|
||||
|
||||
if (rd <= 15) {
|
||||
slot = ®s->u_regs[rd];
|
||||
} else {
|
||||
unsigned long fp = regs->u_regs[UREG_FP];
|
||||
/* Hard case, it goes onto the stack. */
|
||||
flushw_all();
|
||||
|
||||
rd -= 16;
|
||||
if (test_thread_64bit_stack(fp)) {
|
||||
unsigned long __user *uslot =
|
||||
(unsigned long __user *) (fp + STACK_BIAS) + rd;
|
||||
rc = __put_user(real_pc, uslot);
|
||||
} else {
|
||||
unsigned int __user *uslot = (unsigned int
|
||||
__user *) fp + rd;
|
||||
rc = __put_user((u32) real_pc, uslot);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (slot != NULL)
|
||||
*slot = real_pc;
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* Single-stepping can be avoided for certain instructions: NOPs and
|
||||
* instructions that can be emulated. This function determines
|
||||
* whether the instruction where the uprobe is installed falls in one
|
||||
* of these cases and emulates it.
|
||||
*
|
||||
* This function returns true if the single-stepping can be skipped,
|
||||
* false otherwise.
|
||||
*/
|
||||
bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
/* We currently only emulate NOP instructions.
|
||||
*/
|
||||
|
||||
if (auprobe->ixol == (1 << 24)) {
|
||||
regs->tnpc += 4;
|
||||
regs->tpc += 4;
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Prepare to execute out of line. At this point
|
||||
* current->utask->xol_vaddr points to an allocated XOL slot properly
|
||||
* initialized with the original instruction and the single-stepping
|
||||
* trap instruction.
|
||||
*
|
||||
* This function returns 0 on success, any other number on error.
|
||||
*/
|
||||
int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
struct uprobe_task *utask = current->utask;
|
||||
struct arch_uprobe_task *autask = ¤t->utask->autask;
|
||||
|
||||
/* Save the current program counters so they can be restored
|
||||
* later.
|
||||
*/
|
||||
autask->saved_tpc = regs->tpc;
|
||||
autask->saved_tnpc = regs->tnpc;
|
||||
|
||||
/* Adjust PC and NPC so the first instruction in the XOL slot
|
||||
* will be executed by the user task.
|
||||
*/
|
||||
instruction_pointer_set(regs, utask->xol_vaddr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Prepare to resume execution after the single-step. Called after
|
||||
* single-stepping. To avoid the SMP problems that can occur when we
|
||||
* temporarily put back the original opcode to single-step, we
|
||||
* single-stepped a copy of the instruction.
|
||||
*
|
||||
* This function returns 0 on success, any other number on error.
|
||||
*/
|
||||
int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
struct uprobe_task *utask = current->utask;
|
||||
struct arch_uprobe_task *autask = &utask->autask;
|
||||
u32 insn = auprobe->ixol;
|
||||
int rc = 0;
|
||||
|
||||
if (utask->state == UTASK_SSTEP_ACK) {
|
||||
regs->tnpc = relbranch_fixup(insn, utask, regs);
|
||||
regs->tpc = autask->saved_tnpc;
|
||||
rc = retpc_fixup(regs, insn, (unsigned long) utask->vaddr);
|
||||
} else {
|
||||
regs->tnpc = utask->vaddr+4;
|
||||
regs->tpc = autask->saved_tnpc+4;
|
||||
}
|
||||
return rc;
|
||||
}
|
||||
|
||||
/* Handler for uprobe traps. This is called from the traps table and
|
||||
* triggers the proper die notification.
|
||||
*/
|
||||
asmlinkage void uprobe_trap(struct pt_regs *regs,
|
||||
unsigned long trap_level)
|
||||
{
|
||||
BUG_ON(trap_level != 0x173 && trap_level != 0x174);
|
||||
|
||||
/* We are only interested in user-mode code. Uprobe traps
|
||||
* shall not be present in kernel code.
|
||||
*/
|
||||
if (!user_mode(regs)) {
|
||||
local_irq_enable();
|
||||
bad_trap(regs, trap_level);
|
||||
return;
|
||||
}
|
||||
|
||||
/* trap_level == 0x173 --> ta 0x73
|
||||
* trap_level == 0x174 --> ta 0x74
|
||||
*/
|
||||
if (notify_die((trap_level == 0x173) ? DIE_BPT : DIE_SSTEP,
|
||||
(trap_level == 0x173) ? "bpt" : "sstep",
|
||||
regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
|
||||
bad_trap(regs, trap_level);
|
||||
}
|
||||
|
||||
/* Callback routine for handling die notifications.
|
||||
*/
|
||||
int arch_uprobe_exception_notify(struct notifier_block *self,
|
||||
unsigned long val, void *data)
|
||||
{
|
||||
int ret = NOTIFY_DONE;
|
||||
struct die_args *args = (struct die_args *)data;
|
||||
|
||||
/* We are only interested in userspace traps */
|
||||
if (args->regs && !user_mode(args->regs))
|
||||
return NOTIFY_DONE;
|
||||
|
||||
switch (val) {
|
||||
case DIE_BPT:
|
||||
if (uprobe_pre_sstep_notifier(args->regs))
|
||||
ret = NOTIFY_STOP;
|
||||
break;
|
||||
|
||||
case DIE_SSTEP:
|
||||
if (uprobe_post_sstep_notifier(args->regs))
|
||||
ret = NOTIFY_STOP;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* This function gets called when a XOL instruction either gets
|
||||
* trapped or the thread has a fatal signal, so reset the instruction
|
||||
* pointer to its probed address.
|
||||
*/
|
||||
void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
struct uprobe_task *utask = current->utask;
|
||||
|
||||
instruction_pointer_set(regs, utask->vaddr);
|
||||
}
|
||||
|
||||
/* If xol insn itself traps and generates a signal(Say,
|
||||
* SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
|
||||
* instruction jumps back to its own address.
|
||||
*/
|
||||
bool arch_uprobe_xol_was_trapped(struct task_struct *t)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned long
|
||||
arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
unsigned long orig_ret_vaddr = regs->u_regs[UREG_I7];
|
||||
|
||||
regs->u_regs[UREG_I7] = trampoline_vaddr-8;
|
||||
|
||||
return orig_ret_vaddr + 8;
|
||||
}
|
||||
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/errno.h>
|
||||
#include <linux/rbtree.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/wait.h>
|
||||
|
||||
struct vm_area_struct;
|
||||
struct mm_struct;
|
||||
|
|
|
|||
Loading…
Reference in New Issue