ssb: fix ssb clock rate according to broadcom source
This fix was done according to si_clock_rate function in broadcom siutils.c Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
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switch (plltype) {
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case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
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if (m & SSB_CHIPCO_CLK_T6_MMASK)
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return SSB_CHIPCO_CLK_T6_M0;
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return SSB_CHIPCO_CLK_T6_M1;
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return SSB_CHIPCO_CLK_T6_M1;
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return SSB_CHIPCO_CLK_T6_M0;
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case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
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case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
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case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
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