[SPARC64]: Move {setup,teardown}_msi_irq into pci_pbm_info.
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
f1cd8de2c9
commit
e9870c4c0a
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@ -1092,17 +1092,12 @@ EXPORT_SYMBOL(pci_domain_nr);
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int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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{
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struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
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struct pci_controller_info *p = pbm->parent;
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int virt_irq, err;
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int virt_irq;
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if (!pbm->msi_num || !p->setup_msi_irq)
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if (!pbm->setup_msi_irq)
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return -EINVAL;
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err = p->setup_msi_irq(&virt_irq, pdev, desc);
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if (err)
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return err;
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return 0;
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return pbm->setup_msi_irq(&virt_irq, pdev, desc);
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}
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void arch_teardown_msi_irq(unsigned int virt_irq)
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@ -1110,12 +1105,11 @@ void arch_teardown_msi_irq(unsigned int virt_irq)
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struct msi_desc *entry = get_irq_msi(virt_irq);
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struct pci_dev *pdev = entry->dev;
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struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
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struct pci_controller_info *p = pbm->parent;
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if (!pbm->msi_num || !p->setup_msi_irq)
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if (!pbm->teardown_msi_irq)
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return;
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return p->teardown_msi_irq(virt_irq, pdev);
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return pbm->teardown_msi_irq(virt_irq, pdev);
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}
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#endif /* !(CONFIG_PCI_MSI) */
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@ -991,114 +991,6 @@ h_error:
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return -EINVAL;
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}
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static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
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{
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const u32 *val;
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int len;
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val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msiq_num = *val;
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if (pbm->msiq_num) {
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const struct msiq_prop {
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u32 first_msiq;
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u32 num_msiq;
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u32 first_devino;
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} *mqp;
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const struct msi_range_prop {
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u32 first_msi;
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u32 num_msi;
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} *mrng;
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const struct addr_range_prop {
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u32 msi32_high;
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u32 msi32_low;
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u32 msi32_len;
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u32 msi64_high;
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u32 msi64_low;
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u32 msi64_len;
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} *arng;
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val = of_get_property(pbm->prom_node, "msi-eq-size", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msiq_ent_count = *val;
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mqp = of_get_property(pbm->prom_node,
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"msi-eq-to-devino", &len);
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if (!mqp || len != sizeof(struct msiq_prop))
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goto no_msi;
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pbm->msiq_first = mqp->first_msiq;
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pbm->msiq_first_devino = mqp->first_devino;
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val = of_get_property(pbm->prom_node, "#msi", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msi_num = *val;
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mrng = of_get_property(pbm->prom_node, "msi-ranges", &len);
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if (!mrng || len != sizeof(struct msi_range_prop))
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goto no_msi;
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pbm->msi_first = mrng->first_msi;
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val = of_get_property(pbm->prom_node, "msi-data-mask", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msi_data_mask = *val;
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val = of_get_property(pbm->prom_node, "msix-data-width", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msix_data_width = *val;
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arng = of_get_property(pbm->prom_node, "msi-address-ranges",
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&len);
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if (!arng || len != sizeof(struct addr_range_prop))
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goto no_msi;
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pbm->msi32_start = ((u64)arng->msi32_high << 32) |
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(u64) arng->msi32_low;
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pbm->msi64_start = ((u64)arng->msi64_high << 32) |
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(u64) arng->msi64_low;
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pbm->msi32_len = arng->msi32_len;
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pbm->msi64_len = arng->msi64_len;
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if (msi_bitmap_alloc(pbm))
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goto no_msi;
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if (msi_queue_alloc(pbm)) {
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msi_bitmap_free(pbm);
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goto no_msi;
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}
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printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
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"devino[0x%x]\n",
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pbm->name,
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pbm->msiq_first, pbm->msiq_num,
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pbm->msiq_ent_count,
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pbm->msiq_first_devino);
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printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
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"width[%u]\n",
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pbm->name,
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pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
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pbm->msix_data_width);
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printk(KERN_INFO "%s: MSI addr32[0x%lx:0x%x] "
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"addr64[0x%lx:0x%x]\n",
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pbm->name,
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pbm->msi32_start, pbm->msi32_len,
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pbm->msi64_start, pbm->msi64_len);
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printk(KERN_INFO "%s: MSI queues at RA [%p]\n",
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pbm->name,
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pbm->msi_queues);
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}
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return;
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no_msi:
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pbm->msiq_num = 0;
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printk(KERN_INFO "%s: No MSI support.\n", pbm->name);
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}
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static int alloc_msi(struct pci_pbm_info *pbm)
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{
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@ -1217,6 +1109,117 @@ static void pci_sun4v_teardown_msi_irq(unsigned int virt_irq,
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*/
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sun4v_destroy_msi(virt_irq);
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}
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static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
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{
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const u32 *val;
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int len;
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val = of_get_property(pbm->prom_node, "#msi-eqs", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msiq_num = *val;
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if (pbm->msiq_num) {
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const struct msiq_prop {
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u32 first_msiq;
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u32 num_msiq;
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u32 first_devino;
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} *mqp;
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const struct msi_range_prop {
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u32 first_msi;
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u32 num_msi;
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} *mrng;
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const struct addr_range_prop {
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u32 msi32_high;
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u32 msi32_low;
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u32 msi32_len;
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u32 msi64_high;
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u32 msi64_low;
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u32 msi64_len;
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} *arng;
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val = of_get_property(pbm->prom_node, "msi-eq-size", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msiq_ent_count = *val;
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mqp = of_get_property(pbm->prom_node,
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"msi-eq-to-devino", &len);
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if (!mqp || len != sizeof(struct msiq_prop))
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goto no_msi;
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pbm->msiq_first = mqp->first_msiq;
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pbm->msiq_first_devino = mqp->first_devino;
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val = of_get_property(pbm->prom_node, "#msi", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msi_num = *val;
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mrng = of_get_property(pbm->prom_node, "msi-ranges", &len);
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if (!mrng || len != sizeof(struct msi_range_prop))
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goto no_msi;
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pbm->msi_first = mrng->first_msi;
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val = of_get_property(pbm->prom_node, "msi-data-mask", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msi_data_mask = *val;
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val = of_get_property(pbm->prom_node, "msix-data-width", &len);
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if (!val || len != 4)
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goto no_msi;
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pbm->msix_data_width = *val;
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arng = of_get_property(pbm->prom_node, "msi-address-ranges",
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&len);
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if (!arng || len != sizeof(struct addr_range_prop))
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goto no_msi;
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pbm->msi32_start = ((u64)arng->msi32_high << 32) |
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(u64) arng->msi32_low;
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pbm->msi64_start = ((u64)arng->msi64_high << 32) |
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(u64) arng->msi64_low;
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pbm->msi32_len = arng->msi32_len;
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pbm->msi64_len = arng->msi64_len;
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if (msi_bitmap_alloc(pbm))
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goto no_msi;
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if (msi_queue_alloc(pbm)) {
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msi_bitmap_free(pbm);
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goto no_msi;
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}
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printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
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"devino[0x%x]\n",
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pbm->name,
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pbm->msiq_first, pbm->msiq_num,
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pbm->msiq_ent_count,
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pbm->msiq_first_devino);
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printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
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"width[%u]\n",
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pbm->name,
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pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
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pbm->msix_data_width);
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printk(KERN_INFO "%s: MSI addr32[0x%lx:0x%x] "
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"addr64[0x%lx:0x%x]\n",
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pbm->name,
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pbm->msi32_start, pbm->msi32_len,
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pbm->msi64_start, pbm->msi64_len);
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printk(KERN_INFO "%s: MSI queues at RA [%p]\n",
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pbm->name,
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pbm->msi_queues);
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}
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pbm->setup_msi_irq = pci_sun4v_setup_msi_irq;
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pbm->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
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return;
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no_msi:
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pbm->msiq_num = 0;
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printk(KERN_INFO "%s: No MSI support.\n", pbm->name);
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}
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#else /* CONFIG_PCI_MSI */
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static void pci_sun4v_msi_init(struct pci_pbm_info *pbm)
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{
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@ -1303,11 +1306,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
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p->index = pci_num_controllers++;
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#ifdef CONFIG_PCI_MSI
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p->setup_msi_irq = pci_sun4v_setup_msi_irq;
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p->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
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#endif
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/* Like PSYCHO and SCHIZO we have a 2GB aligned area
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* for memory space.
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*/
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@ -103,6 +103,9 @@ struct pci_pbm_info {
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u32 msi64_len;
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void *msi_queues;
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unsigned long *msi_bitmap;
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int (*setup_msi_irq)(unsigned int *virt_irq_p, struct pci_dev *pdev,
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struct msi_desc *entry);
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void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
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#endif /* !(CONFIG_PCI_MSI) */
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/* This PBM's streaming buffer. */
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@ -128,13 +131,6 @@ struct pci_controller_info {
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/* The PCI bus modules controlled by us. */
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struct pci_pbm_info pbm_A;
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struct pci_pbm_info pbm_B;
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/* Operations which are controller specific. */
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#ifdef CONFIG_PCI_MSI
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int (*setup_msi_irq)(unsigned int *virt_irq_p, struct pci_dev *pdev,
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struct msi_desc *entry);
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void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
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#endif
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};
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#endif /* !(__SPARC64_PBM_H) */
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