pinctrl: tegra: some bits move between registers

Some of the pinmux configuration bits that exist in "drive group"
registers in Tegra30..Tegra124 move to the "pinmux" registers on future
chips. Add a flag to support this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Stephen Warren 2015-02-24 14:00:49 -07:00 committed by Linus Walleij
parent 8d4684b39b
commit ea62306193
6 changed files with 36 additions and 6 deletions

View file

@ -348,14 +348,24 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
*width = 1; *width = 1;
break; break;
case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE: case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
*bank = g->drv_bank; if (pmx->soc->hsm_in_mux) {
*reg = g->drv_reg; *bank = g->mux_bank;
*reg = g->mux_reg;
} else {
*bank = g->drv_bank;
*reg = g->drv_reg;
}
*bit = g->hsm_bit; *bit = g->hsm_bit;
*width = 1; *width = 1;
break; break;
case TEGRA_PINCONF_PARAM_SCHMITT: case TEGRA_PINCONF_PARAM_SCHMITT:
*bank = g->drv_bank; if (pmx->soc->schmitt_in_mux) {
*reg = g->drv_reg; *bank = g->mux_bank;
*reg = g->mux_reg;
} else {
*bank = g->drv_bank;
*reg = g->drv_reg;
}
*bit = g->schmitt_bit; *bit = g->schmitt_bit;
*width = 1; *width = 1;
break; break;
@ -390,8 +400,13 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
*width = g->slwr_width; *width = g->slwr_width;
break; break;
case TEGRA_PINCONF_PARAM_DRIVE_TYPE: case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
*bank = g->drv_bank; if (pmx->soc->drvtype_in_mux) {
*reg = g->drv_reg; *bank = g->mux_bank;
*reg = g->mux_reg;
} else {
*bank = g->drv_bank;
*reg = g->drv_reg;
}
*bit = g->drvtype_bit; *bit = g->drvtype_bit;
*width = 2; *width = 2;
break; break;

View file

@ -182,6 +182,9 @@ struct tegra_pinctrl_soc_data {
unsigned nfunctions; unsigned nfunctions;
const struct tegra_pingroup *groups; const struct tegra_pingroup *groups;
unsigned ngroups; unsigned ngroups;
bool hsm_in_mux;
bool schmitt_in_mux;
bool drvtype_in_mux;
}; };
int tegra_pinctrl_probe(struct platform_device *pdev, int tegra_pinctrl_probe(struct platform_device *pdev,

View file

@ -1841,6 +1841,9 @@ static const struct tegra_pinctrl_soc_data tegra114_pinctrl = {
.nfunctions = ARRAY_SIZE(tegra114_functions), .nfunctions = ARRAY_SIZE(tegra114_functions),
.groups = tegra114_groups, .groups = tegra114_groups,
.ngroups = ARRAY_SIZE(tegra114_groups), .ngroups = ARRAY_SIZE(tegra114_groups),
.hsm_in_mux = false,
.schmitt_in_mux = false,
.drvtype_in_mux = false,
}; };
static int tegra114_pinctrl_probe(struct platform_device *pdev) static int tegra114_pinctrl_probe(struct platform_device *pdev)

View file

@ -2053,6 +2053,9 @@ static const struct tegra_pinctrl_soc_data tegra124_pinctrl = {
.nfunctions = ARRAY_SIZE(tegra124_functions), .nfunctions = ARRAY_SIZE(tegra124_functions),
.groups = tegra124_groups, .groups = tegra124_groups,
.ngroups = ARRAY_SIZE(tegra124_groups), .ngroups = ARRAY_SIZE(tegra124_groups),
.hsm_in_mux = false,
.schmitt_in_mux = false,
.drvtype_in_mux = false,
}; };
static int tegra124_pinctrl_probe(struct platform_device *pdev) static int tegra124_pinctrl_probe(struct platform_device *pdev)

View file

@ -2221,6 +2221,9 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = {
.nfunctions = ARRAY_SIZE(tegra20_functions), .nfunctions = ARRAY_SIZE(tegra20_functions),
.groups = tegra20_groups, .groups = tegra20_groups,
.ngroups = ARRAY_SIZE(tegra20_groups), .ngroups = ARRAY_SIZE(tegra20_groups),
.hsm_in_mux = false,
.schmitt_in_mux = false,
.drvtype_in_mux = false,
}; };
static int tegra20_pinctrl_probe(struct platform_device *pdev) static int tegra20_pinctrl_probe(struct platform_device *pdev)

View file

@ -2476,6 +2476,9 @@ static const struct tegra_pinctrl_soc_data tegra30_pinctrl = {
.nfunctions = ARRAY_SIZE(tegra30_functions), .nfunctions = ARRAY_SIZE(tegra30_functions),
.groups = tegra30_groups, .groups = tegra30_groups,
.ngroups = ARRAY_SIZE(tegra30_groups), .ngroups = ARRAY_SIZE(tegra30_groups),
.hsm_in_mux = false,
.schmitt_in_mux = false,
.drvtype_in_mux = false,
}; };
static int tegra30_pinctrl_probe(struct platform_device *pdev) static int tegra30_pinctrl_probe(struct platform_device *pdev)