Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks OMAP2+: PM/serial: fix console semaphore acquire during suspend OMAP1: SRAM: fix size for OMAP1611 SoCs arm: omap2: io: fix clk_get() error check arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check omap: nand: remove hardware ECC as default omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD omap: PM debug: fix wake-on-timer debugfs dependency
This commit is contained in:
commit
ec5d043f28
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@ -216,7 +216,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
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{
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.name = "wl1271",
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.mmc = 3,
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.caps = MMC_CAP_4_BIT_DATA,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
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.gpio_wp = -EINVAL,
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.gpio_cd = -EINVAL,
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.nonremovable = true,
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@ -297,7 +297,7 @@ static int __init _omap2_init_reprogram_sdrc(void)
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return 0;
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dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
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if (!dpll3_m2_ck)
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if (IS_ERR(dpll3_m2_ck))
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return -EINVAL;
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rate = clk_get_rate(dpll3_m2_ck);
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@ -161,6 +161,23 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
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printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
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}
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void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
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{
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u32 tick_rate, cycles;
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if (!seconds && !milliseconds)
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return;
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tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
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cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
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omap_dm_timer_stop(gptimer_wakeup);
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omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
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pr_info("PM: Resume timer in %u.%03u secs"
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" (%d ticks at %d ticks/sec.)\n",
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seconds, milliseconds, cycles, tick_rate);
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}
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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@ -354,23 +371,6 @@ void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
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pwrdm->timer = t;
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}
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void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
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{
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u32 tick_rate, cycles;
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if (!seconds && !milliseconds)
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return;
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tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
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cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
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omap_dm_timer_stop(gptimer_wakeup);
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omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
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pr_info("PM: Resume timer in %u.%03u secs"
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" (%d ticks at %d ticks/sec.)\n",
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seconds, milliseconds, cycles, tick_rate);
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}
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static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
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{
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struct seq_file *s = (struct seq_file *)user;
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@ -53,6 +53,19 @@
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#include <plat/powerdomain.h>
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#include <plat/clockdomain.h>
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#ifdef CONFIG_SUSPEND
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static suspend_state_t suspend_state = PM_SUSPEND_ON;
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static inline bool is_suspending(void)
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{
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return (suspend_state != PM_SUSPEND_ON);
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}
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#else
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static inline bool is_suspending(void)
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{
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return false;
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}
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#endif
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static void (*omap2_sram_idle)(void);
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static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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@ -120,8 +133,9 @@ static void omap2_enter_full_retention(void)
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goto no_sleep;
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/* Block console output in case it is on one of the OMAP UARTs */
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if (try_acquire_console_sem())
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goto no_sleep;
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if (!is_suspending())
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if (try_acquire_console_sem())
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goto no_sleep;
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omap_uart_prepare_idle(0);
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omap_uart_prepare_idle(1);
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@ -136,7 +150,8 @@ static void omap2_enter_full_retention(void)
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omap_uart_resume_idle(1);
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omap_uart_resume_idle(0);
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release_console_sem();
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if (!is_suspending())
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release_console_sem();
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no_sleep:
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if (omap2_pm_debug) {
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@ -284,6 +299,12 @@ out:
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local_irq_enable();
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}
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static int omap2_pm_begin(suspend_state_t state)
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{
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suspend_state = state;
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return 0;
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}
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static int omap2_pm_prepare(void)
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{
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/* We cannot sleep in idle until we have resumed */
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@ -333,10 +354,17 @@ static void omap2_pm_finish(void)
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enable_hlt();
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}
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static void omap2_pm_end(void)
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{
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suspend_state = PM_SUSPEND_ON;
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}
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static struct platform_suspend_ops omap_pm_ops = {
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.begin = omap2_pm_begin,
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.prepare = omap2_pm_prepare,
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.enter = omap2_pm_enter,
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.finish = omap2_pm_finish,
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.end = omap2_pm_end,
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.valid = suspend_valid_only_mem,
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};
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@ -50,6 +50,19 @@
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#include "sdrc.h"
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#include "control.h"
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#ifdef CONFIG_SUSPEND
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static suspend_state_t suspend_state = PM_SUSPEND_ON;
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static inline bool is_suspending(void)
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{
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return (suspend_state != PM_SUSPEND_ON);
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}
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#else
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static inline bool is_suspending(void)
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{
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return false;
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}
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#endif
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/* Scratchpad offsets */
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#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
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#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
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@ -387,10 +400,11 @@ void omap_sram_idle(void)
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}
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/* Block console output in case it is on one of the OMAP UARTs */
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if (per_next_state < PWRDM_POWER_ON ||
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core_next_state < PWRDM_POWER_ON)
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if (try_acquire_console_sem())
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goto console_still_active;
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if (!is_suspending())
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if (per_next_state < PWRDM_POWER_ON ||
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core_next_state < PWRDM_POWER_ON)
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if (try_acquire_console_sem())
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goto console_still_active;
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/* PER */
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if (per_next_state < PWRDM_POWER_ON) {
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@ -470,7 +484,8 @@ void omap_sram_idle(void)
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omap_uart_resume_idle(3);
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}
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release_console_sem();
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if (!is_suspending())
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release_console_sem();
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console_still_active:
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/* Disable IO-PAD and IO-CHAIN wakeup */
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@ -514,8 +529,6 @@ out:
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}
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#ifdef CONFIG_SUSPEND
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static suspend_state_t suspend_state;
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static int omap3_pm_prepare(void)
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{
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disable_hlt();
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@ -243,13 +243,14 @@
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#define OMAP24XX_EN_GPT1_MASK (1 << 0)
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/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
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#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2)
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#define OMAP24XX_ST_GPIOS_MASK 2
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#define OMAP24XX_ST_GPT1_SHIFT (1 << 0)
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#define OMAP24XX_ST_GPT1_MASK 0
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#define OMAP24XX_ST_GPIOS_SHIFT 2
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#define OMAP24XX_ST_GPIOS_MASK (1 << 2)
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#define OMAP24XX_ST_GPT1_SHIFT 0
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#define OMAP24XX_ST_GPT1_MASK (1 << 0)
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/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
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#define OMAP2430_ST_MDM_SHIFT (1 << 0)
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#define OMAP2430_ST_MDM_SHIFT 0
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#define OMAP2430_ST_MDM_MASK (1 << 0)
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/* 3430 register bits shared between CM & PRM registers */
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@ -16,6 +16,7 @@
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <plat/common.h>
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#include <plat/board.h>
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return -ENODEV;
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sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
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if (sync_32k_ick)
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if (!IS_ERR(sync_32k_ick))
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clk_enable(sync_32k_ick);
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clocksource_32k.mult = clocksource_hz2mult(32768,
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@ -166,7 +166,7 @@ static void __init omap_detect_sram(void)
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cpu_is_omap1710())
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omap_sram_size = 0x4000; /* 16K */
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else if (cpu_is_omap1611())
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omap_sram_size = 0x3e800; /* 250K */
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omap_sram_size = SZ_256K;
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else {
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printk(KERN_ERR "Could not detect SRAM size\n");
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omap_sram_size = 0x4000;
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@ -7,7 +7,6 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define CONFIG_MTD_NAND_OMAP_HWECC
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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