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e1000e: 82571 Tx Data Corruption during Tx hang recovery

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A bus trace shows that while executing e1000e_down, TCTL is cleared except
for the PSP bit.  This occurs while in the middle of fetching a TSO packet
since the Tx packet buffer is full at that point. Before the device is
reset, the e1000_watchdog_task starts to run from the middle (it was
apparently pre-empted earlier, although that is not in the trace) and sets
TCTL.EN.  At that point, 82571 transmits the corrupted packet, apparently
because TCTL.MULR was cleared in the middle of fetching a packet, which is
forbidden.

Driver should just clear TCTL.EN in e1000_reset_hw_82571 instead of
clearing the entire register, so as not to change any settings in the
middle of fetching a packet.

Signed-off-by: Tushar Dave <tushar.n.dave@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
This commit is contained in:
Tushar Dave 2012-08-01 02:11:15 +00:00 committed by Peter P Waskiewicz Jr
parent b7ec70be01
commit eca90f5504
1 changed files with 4 additions and 2 deletions
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6
drivers/net/ethernet/intel/e1000e/82571.c
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@ -999,7 +999,7 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
**/ **/
static s32 e1000_reset_hw_82571(struct e1000_hw *hw) static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
{ {
u32 ctrl, ctrl_ext, eecd; u32 ctrl, ctrl_ext, eecd, tctl;
s32 ret_val; s32 ret_val;
/* /*
@ -1014,7 +1014,9 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
ew32(IMC, 0xffffffff); ew32(IMC, 0xffffffff);
ew32(RCTL, 0); ew32(RCTL, 0);
ew32(TCTL, E1000_TCTL_PSP); tctl = er32(TCTL);
tctl &= ~E1000_TCTL_EN;
ew32(TCTL, tctl);
e1e_flush(); e1e_flush();
usleep_range(10000, 20000); usleep_range(10000, 20000);