dmaengine: edma: DT: Change memcpy channel array from 16bit to 32bit type
This change makes the DT file to be easier to read since the memcpy channels array does not need the '/bits/ 16' to be specified, which might confuse some people. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -22,8 +22,7 @@ Required properties:
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Optional properties:
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- ti,hwmods: Name of the hwmods associated to the eDMA CC
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- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
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these channels will be SW triggered channels. The list must
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contain 16 bits numbers, see example.
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these channels will be SW triggered channels. See example.
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- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
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the driver, they are allocated to be used by for example the
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DSP. See example.
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@ -56,7 +55,7 @@ edma: edma@49000000 {
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ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 7>, <&edma_tptc2 0>;
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/* Channel 20 and 21 is allocated for memcpy */
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ti,edma-memcpy-channels = /bits/ 16 <20 21>;
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ti,edma-memcpy-channels = <20 21>;
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/* The following PaRAM slots are reserved: 35-45 and 100-110 */
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ti,edma-reserved-slot-ranges = /bits/ 16 <35 10>,
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/bits/ 16 <100 10>;
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@ -1752,16 +1752,14 @@ static enum dma_status edma_tx_status(struct dma_chan *chan,
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return ret;
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}
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static bool edma_is_memcpy_channel(int ch_num, u16 *memcpy_channels)
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static bool edma_is_memcpy_channel(int ch_num, s32 *memcpy_channels)
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{
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s16 *memcpy_ch = memcpy_channels;
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if (!memcpy_channels)
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return false;
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while (*memcpy_ch != -1) {
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if (*memcpy_ch == ch_num)
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while (*memcpy_channels != -1) {
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if (*memcpy_channels == ch_num)
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return true;
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memcpy_ch++;
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memcpy_channels++;
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}
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return false;
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}
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@ -1775,7 +1773,7 @@ static void edma_dma_init(struct edma_cc *ecc, bool legacy_mode)
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{
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struct dma_device *s_ddev = &ecc->dma_slave;
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struct dma_device *m_ddev = NULL;
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s16 *memcpy_channels = ecc->info->memcpy_channels;
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s32 *memcpy_channels = ecc->info->memcpy_channels;
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int i, j;
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dma_cap_zero(s_ddev->cap_mask);
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@ -1996,16 +1994,16 @@ static struct edma_soc_info *edma_setup_info_from_dt(struct device *dev,
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prop = of_find_property(dev->of_node, "ti,edma-memcpy-channels", &sz);
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if (prop) {
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const char pname[] = "ti,edma-memcpy-channels";
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size_t nelm = sz / sizeof(s16);
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s16 *memcpy_ch;
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size_t nelm = sz / sizeof(s32);
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s32 *memcpy_ch;
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memcpy_ch = devm_kcalloc(dev, nelm + 1, sizeof(s16),
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memcpy_ch = devm_kcalloc(dev, nelm + 1, sizeof(s32),
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GFP_KERNEL);
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if (!memcpy_ch)
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return ERR_PTR(-ENOMEM);
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ret = of_property_read_u16_array(dev->of_node, pname,
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(u16 *)memcpy_ch, nelm);
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ret = of_property_read_u32_array(dev->of_node, pname,
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(u32 *)memcpy_ch, nelm);
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if (ret)
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return ERR_PTR(ret);
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@ -72,7 +72,7 @@ struct edma_soc_info {
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struct edma_rsv_info *rsv;
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/* List of channels allocated for memcpy, terminated with -1 */
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s16 *memcpy_channels;
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s32 *memcpy_channels;
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s8 (*queue_priority_mapping)[2];
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const s16 (*xbar_chans)[2];
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