[PATCH] sata_sil24: reimplement hardreset
Reimplement hardreset according to the datasheet. The old hardreset didn't reset controller status and the controller might not be ready after reset. Also, as SStatus is a bit flakey after hardreset, sata_std_hardrset() didn't use to wait long enough before proceeding. Note that as we're not depending on SStatus, DET==1 condition cannot be used to wait for link, so use shorter timeout for no device case. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -521,10 +521,47 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class)
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static int sil24_hardreset(struct ata_port *ap, unsigned int *class)
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{
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unsigned int dummy_class;
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void __iomem *port = (void __iomem *)ap->ioaddr.cmd_addr;
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const char *reason;
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int tout_msec;
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u32 tmp;
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/* sil24 doesn't report device signature after hard reset */
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return sata_std_hardreset(ap, &dummy_class);
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/* sil24 does the right thing(tm) without any protection */
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ata_set_sata_spd(ap);
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tout_msec = 100;
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if (sata_dev_present(ap))
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tout_msec = 5000;
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writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT);
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tmp = ata_wait_register(port + PORT_CTRL_STAT,
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PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, tout_msec);
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/* SStatus oscillates between zero and valid status for short
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* duration after DEV_RST, give it time to settle.
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*/
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msleep(100);
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if (tmp & PORT_CS_DEV_RST) {
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if (!sata_dev_present(ap))
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return 0;
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reason = "link not ready";
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goto err;
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}
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if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
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reason = "device not ready";
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goto err;
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}
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/* sil24 doesn't report device class code after hardreset,
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* leave *class alone.
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*/
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return 0;
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err:
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printk(KERN_ERR "ata%u: hardreset failed (%s)\n", ap->id, reason);
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return -EIO;
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}
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static int sil24_probe_reset(struct ata_port *ap, unsigned int *classes)
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