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MLK-15128-3 pinctrl: freescale: support scu and memmap pinctrl together 

As i.MX8MQ is a ARM64 SoC but it does NOT use SCU pinctrl, so
need to support both SCU and MEMMAP pinctrl together for ARM64
build.

use IMX8_USE_SCU flag to distinguish SCU and MEMMAP pinctrl
type.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
pull/10/head
Anson Huang 2017-06-20 23:05:52 +08:00 committed by Jason Liu
parent a207265543
commit ed57aad6d5
4 changed files with 107 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
drivers/pinctrl/freescale/pinctrl-imx.c
View File

@ -158,6 +158,7 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
unsigned group)
{
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
struct imx_pinctrl_soc_info *info = ipctl->info;
unsigned int npins;
int i, err;
struct group_desc *grp = NULL;
@ -181,7 +182,11 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
func->name, grp->name);
for (i = 0; i < npins; i++) {
err = imx_pmx_set_one_pin(ipctl, &((struct imx_pin *)(grp->data))[i]);
struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
if (info->flags & IMX8_USE_SCU)
err = imx_pmx_set_one_pin_scu(ipctl, pin);
else
err = imx_pmx_set_one_pin_mem(ipctl, pin);
if (err)
return err;
}
@ -255,23 +260,41 @@ static u32 imx_pinconf_parse_generic_config(struct device_node *np,
static int imx_pinconf_get(struct pinctrl_dev *pctldev,
unsigned pin_id, unsigned long *config)
{
return imx_pinconf_backend_get(pctldev, pin_id, config);
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
const struct imx_pinctrl_soc_info *info = ipctl->info;
if (info->flags & IMX8_USE_SCU)
return imx_pinconf_backend_get_scu(pctldev, pin_id, config);
else
return imx_pinconf_backend_get_mem(pctldev, pin_id, config);
}
static int imx_pinconf_set(struct pinctrl_dev *pctldev,
unsigned pin_id, unsigned long *configs,
unsigned num_configs)
{
return imx_pinconf_backend_set(pctldev, pin_id, configs, num_configs);
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
const struct imx_pinctrl_soc_info *info = ipctl->info;
if (info->flags & IMX8_USE_SCU)
return imx_pinconf_backend_set_scu(pctldev, pin_id, configs, num_configs);
else
return imx_pinconf_backend_set_mem(pctldev, pin_id, configs, num_configs);
}
static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s, unsigned pin_id)
{
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
const struct imx_pinctrl_soc_info *info = ipctl->info;
unsigned long config;
int ret;
ret = imx_pinconf_backend_get(pctldev, pin_id, &config);
if (info->flags & IMX8_USE_SCU)
ret = imx_pinconf_backend_get_scu(pctldev, pin_id, &config);
else
ret = imx_pinconf_backend_get_mem(pctldev, pin_id, &config);
if (ret) {
seq_printf(s, "N/A");
return;
@ -390,8 +413,12 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
for (i = 0; i < grp->num_pins; i++) {
struct imx_pin *pin = &((struct imx_pin *)(grp->data))[i];
imx_pinctrl_parse_pin(info, &grp->pins[i], pin,
list_p, config);
if (info->flags & IMX8_USE_SCU)
imx_pinctrl_parse_pin_scu(info, &grp->pins[i],
pin, list_p, config);
else
imx_pinctrl_parse_pin_mem(info, &grp->pins[i],
pin, list_p, config);
}
return 0;

73
drivers/pinctrl/freescale/pinctrl-imx.h
View File

@ -141,12 +141,69 @@ int imx_pinctrl_probe(struct platform_device *pdev,
struct imx_pinctrl_soc_info *info);
int imx_pinctrl_suspend(struct device *dev);
int imx_pinctrl_resume(struct device *dev);
int imx_pmx_set_one_pin(struct imx_pinctrl *ipctl, struct imx_pin *pin);
int imx_pinconf_backend_get(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config);
int imx_pinconf_backend_set(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs);
int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin,
const __be32 **list_p, u32 generic_config);
#ifdef CONFIG_PINCTRL_IMX_MEMMAP
int imx_pmx_set_one_pin_mem(struct imx_pinctrl *ipctl, struct imx_pin *pin);
int imx_pinconf_backend_get_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config);
int imx_pinconf_backend_set_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs);
int imx_pinctrl_parse_pin_mem(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p,
u32 generic_config);
#else
static inline int imx_pmx_set_one_pin_mem(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
return 0;
}
static inline int imx_pinconf_backend_get_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config)
{
return 0;
}
static inline int imx_pinconf_backend_set_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs)
{
return 0;
}
static inline int imx_pinctrl_parse_pin_mem(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p,
u32 generic_config)
{
return 0;
}
#endif
#ifdef CONFIG_PINCTRL_IMX_SCU
int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin);
int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config);
int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs);
int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p,
u32 generic_config);
#else
static inline int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
return 0;
}
static inline int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config)
{
return 0;
}
static inline int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs)
{
return 0;
}
static inline int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p,
u32 generic_config)
{
return 0;
}
#endif
#endif /* __DRIVERS_PINCTRL_IMX_H */

8
drivers/pinctrl/freescale/pinctrl-memmap.c
View File

@ -33,7 +33,7 @@
#define IOMUXC_IBE (1 << 16)
#define IOMUXC_OBE (1 << 17)
int imx_pmx_set_one_pin(struct imx_pinctrl *ipctl, struct imx_pin *pin)
int imx_pmx_set_one_pin_mem(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
const struct imx_pinctrl_soc_info *info = ipctl->info;
unsigned int pin_id = pin->pin;
@ -108,7 +108,7 @@ int imx_pmx_set_one_pin(struct imx_pinctrl *ipctl, struct imx_pin *pin)
return 0;
}
int imx_pinconf_backend_get(struct pinctrl_dev *pctldev,
int imx_pinconf_backend_get_mem(struct pinctrl_dev *pctldev,
unsigned pin_id, unsigned long *config)
{
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
@ -129,7 +129,7 @@ int imx_pinconf_backend_get(struct pinctrl_dev *pctldev,
return 0;
}
int imx_pinconf_backend_set(struct pinctrl_dev *pctldev,
int imx_pinconf_backend_set_mem(struct pinctrl_dev *pctldev,
unsigned pin_id, unsigned long *configs,
unsigned num_configs)
{
@ -166,7 +166,7 @@ int imx_pinconf_backend_set(struct pinctrl_dev *pctldev,
return 0;
}
int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
int imx_pinctrl_parse_pin_mem(struct imx_pinctrl_soc_info *info,
unsigned int *grp_pin_id, struct imx_pin *pin,
const __be32 **list_p, u32 generic_config)
{

9
drivers/pinctrl/freescale/pinctrl-scu.c
View File

@ -31,12 +31,12 @@
sc_ipc_t pinctrl_ipcHandle;
int imx_pmx_set_one_pin(struct imx_pinctrl *ipctl, struct imx_pin *pin)
int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
return 0;
}
int imx_pinconf_backend_get(struct pinctrl_dev *pctldev, unsigned pin_id,
int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config)
{
sc_err_t err = SC_ERR_NONE;
@ -54,7 +54,8 @@ int imx_pinconf_backend_get(struct pinctrl_dev *pctldev, unsigned pin_id,
return 0;
}
int imx_pinconf_backend_set(struct pinctrl_dev *pctldev, unsigned pin_id,
int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs)
{
sc_err_t err = SC_ERR_NONE;
@ -90,7 +91,7 @@ int imx_pinconf_backend_set(struct pinctrl_dev *pctldev, unsigned pin_id,
return 0;
}
int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin,
const __be32 **list_p, u32 generic_config)
{