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sh: Fix the offset from P1SEG/P2SEG where we map RAM 

We need to map the gap between 0x00000000 and __MEMORY_START in the PMB,
as well as RAM.

With this change my 7785LCR board can switch to 32bit MMU mode at
runtime.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
wifi-calibration
Matt Fleming 2009-10-06 21:22:32 +00:00 committed by Paul Mundt
parent 3105121949
commit ef269b3276
1 changed files with 7 additions and 6 deletions
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13
arch/sh/mm/pmb.c
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@ -275,7 +275,7 @@ static void __pmb_unmap(struct pmb_entry *pmbe)
int __uses_jump_to_uncached pmb_init(void)
{
unsigned int i;
long size;
long size, ret;
jump_to_uncached();
@ -287,12 +287,13 @@ int __uses_jump_to_uncached pmb_init(void)
* P1 - provides a cached window onto physical memory
* P2 - provides an uncached window onto physical memory
*/
size = pmb_remap(P2SEG, __MEMORY_START, __MEMORY_SIZE,
PMB_WT | PMB_UB);
BUG_ON(size != __MEMORY_SIZE);
size = __MEMORY_START + __MEMORY_SIZE;
size = pmb_remap(P1SEG, __MEMORY_START, __MEMORY_SIZE, PMB_C);
BUG_ON(size != __MEMORY_SIZE);
ret = pmb_remap(P1SEG, 0x00000000, size, PMB_C);
BUG_ON(ret != size);
ret = pmb_remap(P2SEG, 0x00000000, size, PMB_WT | PMB_UB);
BUG_ON(ret != size);
ctrl_outl(0, PMB_IRMCR);