fpga: region: move device tree support to of-fpga-region.c
Create of-fpga-region.c and move the following functions without modification from fpga-region.c. * of_fpga_region_find * of_fpga_region_get_mgr * of_fpga_region_get_bridges * child_regions_with_firmware * of_fpga_region_parse_ov * of_fpga_region_notify_pre_apply * of_fpga_region_notify_post_remove * of_fpga_region_notify * of_fpga_region_probe * of_fpga_region_remove Create two new functions with some code from fpga_region_init/exit. * of_fpga_region_init * of_fpga_region_exit Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
503d4b7a44
commit
ef3acdd820
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@ -13,10 +13,18 @@ if FPGA
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config FPGA_REGION
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tristate "FPGA Region"
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depends on OF && FPGA_BRIDGE
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depends on FPGA_BRIDGE
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help
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FPGA Regions allow loading FPGA images under control of
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the Device Tree.
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FPGA Region common code. A FPGA Region controls a FPGA Manager
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and the FPGA Bridges associated with either a reconfigurable
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region of an FPGA or a whole FPGA.
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config OF_FPGA_REGION
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tristate "FPGA Region Device Tree Overlay Support"
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depends on OF && FPGA_REGION
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help
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Support for loading FPGA images by applying a Device Tree
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overlay.
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config FPGA_MGR_ICE40_SPI
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tristate "Lattice iCE40 SPI"
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@ -74,7 +82,6 @@ config FPGA_MGR_ZYNQ_FPGA
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config FPGA_BRIDGE
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tristate "FPGA Bridge Framework"
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depends on OF
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help
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Say Y here if you want to support bridges connected between host
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processors and FPGAs or between FPGAs.
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@ -26,3 +26,4 @@ obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o
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# High Level Interfaces
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obj-$(CONFIG_FPGA_REGION) += fpga-region.o
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obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o
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@ -2,6 +2,7 @@
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* FPGA Region - Device Tree support for FPGA programming under Linux
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*
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* Copyright (C) 2013-2016 Altera Corporation
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* Copyright (C) 2017 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -23,7 +24,6 @@
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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@ -44,30 +44,6 @@ struct fpga_region *fpga_region_class_find(
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}
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EXPORT_SYMBOL_GPL(fpga_region_class_find);
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static const struct of_device_id fpga_region_of_match[] = {
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{ .compatible = "fpga-region", },
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{},
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};
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MODULE_DEVICE_TABLE(of, fpga_region_of_match);
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static int fpga_region_of_node_match(struct device *dev, const void *data)
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{
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return dev->of_node == data;
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}
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/**
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* of_fpga_region_find - find FPGA region
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* @np: device node of FPGA Region
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*
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* Caller will need to put_device(®ion->dev) when done.
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*
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* Returns FPGA Region struct or NULL
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*/
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static struct fpga_region *of_fpga_region_find(struct device_node *np)
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{
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return fpga_region_class_find(NULL, np, fpga_region_of_node_match);
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}
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/**
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* fpga_region_get - get an exclusive reference to a fpga region
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* @region: FPGA Region struct
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@ -115,102 +91,6 @@ static void fpga_region_put(struct fpga_region *region)
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mutex_unlock(®ion->mutex);
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}
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/**
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* of_fpga_region_get_mgr - get reference for FPGA manager
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* @np: device node of FPGA region
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*
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* Get FPGA Manager from "fpga-mgr" property or from ancestor region.
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*
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* Caller should call fpga_mgr_put() when done with manager.
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*
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* Return: fpga manager struct or IS_ERR() condition containing error code.
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*/
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static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
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{
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struct device_node *mgr_node;
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struct fpga_manager *mgr;
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of_node_get(np);
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while (np) {
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if (of_device_is_compatible(np, "fpga-region")) {
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mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
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if (mgr_node) {
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mgr = of_fpga_mgr_get(mgr_node);
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of_node_put(np);
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return mgr;
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}
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}
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np = of_get_next_parent(np);
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}
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of_node_put(np);
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return ERR_PTR(-EINVAL);
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}
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/**
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* of_fpga_region_get_bridges - create a list of bridges
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* @region: FPGA region
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*
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* Create a list of bridges including the parent bridge and the bridges
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* specified by "fpga-bridges" property. Note that the
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* fpga_bridges_enable/disable/put functions are all fine with an empty list
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* if that happens.
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*
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* Caller should call fpga_bridges_put(®ion->bridge_list) when
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* done with the bridges.
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*
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* Return 0 for success (even if there are no bridges specified)
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* or -EBUSY if any of the bridges are in use.
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*/
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static int of_fpga_region_get_bridges(struct fpga_region *region)
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{
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struct device *dev = ®ion->dev;
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struct device_node *region_np = dev->of_node;
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struct fpga_image_info *info = region->info;
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struct device_node *br, *np, *parent_br = NULL;
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int i, ret;
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/* If parent is a bridge, add to list */
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ret = of_fpga_bridge_get_to_list(region_np->parent, info,
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®ion->bridge_list);
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/* -EBUSY means parent is a bridge that is under use. Give up. */
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if (ret == -EBUSY)
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return ret;
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/* Zero return code means parent was a bridge and was added to list. */
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if (!ret)
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parent_br = region_np->parent;
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/* If overlay has a list of bridges, use it. */
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if (of_parse_phandle(info->overlay, "fpga-bridges", 0))
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np = info->overlay;
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else
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np = region_np;
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for (i = 0; ; i++) {
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br = of_parse_phandle(np, "fpga-bridges", i);
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if (!br)
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break;
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/* If parent bridge is in list, skip it. */
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if (br == parent_br)
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continue;
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/* If node is a bridge, get it and add to list */
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ret = of_fpga_bridge_get_to_list(br, info,
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®ion->bridge_list);
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/* If any of the bridges are in use, give up */
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if (ret == -EBUSY) {
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fpga_bridges_put(®ion->bridge_list);
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return -EBUSY;
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}
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}
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return 0;
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}
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/**
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* fpga_region_program_fpga - program FPGA
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* @region: FPGA region
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}
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EXPORT_SYMBOL_GPL(fpga_region_program_fpga);
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/**
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* child_regions_with_firmware
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* @overlay: device node of the overlay
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*
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* If the overlay adds child FPGA regions, they are not allowed to have
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* firmware-name property.
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*
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* Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
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*/
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static int child_regions_with_firmware(struct device_node *overlay)
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{
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struct device_node *child_region;
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const char *child_firmware_name;
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int ret = 0;
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of_node_get(overlay);
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child_region = of_find_matching_node(overlay, fpga_region_of_match);
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while (child_region) {
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if (!of_property_read_string(child_region, "firmware-name",
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&child_firmware_name)) {
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ret = -EINVAL;
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break;
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}
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child_region = of_find_matching_node(child_region,
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fpga_region_of_match);
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}
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of_node_put(child_region);
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if (ret)
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pr_err("firmware-name not allowed in child FPGA region: %pOF",
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child_region);
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return ret;
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}
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/**
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* of_fpga_region_parse_ov - parse and check overlay applied to region
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*
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* @region: FPGA region
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* @overlay: overlay applied to the FPGA region
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*
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* Given an overlay applied to a FPGA region, parse the FPGA image specific
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* info in the overlay and do some checking.
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*
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* Returns:
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* NULL if overlay doesn't direct us to program the FPGA.
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* fpga_image_info struct if there is an image to program.
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* error code for invalid overlay.
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*/
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static struct fpga_image_info *of_fpga_region_parse_ov(
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struct fpga_region *region,
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struct device_node *overlay)
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{
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struct device *dev = ®ion->dev;
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struct fpga_image_info *info;
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const char *firmware_name;
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int ret;
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if (region->info) {
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dev_err(dev, "Region already has overlay applied.\n");
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return ERR_PTR(-EINVAL);
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}
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/*
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* Reject overlay if child FPGA Regions added in the overlay have
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* firmware-name property (would mean that an FPGA region that has
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* not been added to the live tree yet is doing FPGA programming).
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*/
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ret = child_regions_with_firmware(overlay);
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if (ret)
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return ERR_PTR(ret);
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info = fpga_image_info_alloc(dev);
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if (!info)
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return ERR_PTR(-ENOMEM);
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info->overlay = overlay;
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/* Read FPGA region properties from the overlay */
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if (of_property_read_bool(overlay, "partial-fpga-config"))
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info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
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if (of_property_read_bool(overlay, "external-fpga-config"))
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info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
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if (of_property_read_bool(overlay, "encrypted-fpga-config"))
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info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
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if (!of_property_read_string(overlay, "firmware-name",
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&firmware_name)) {
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info->firmware_name = devm_kstrdup(dev, firmware_name,
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GFP_KERNEL);
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if (!info->firmware_name)
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return ERR_PTR(-ENOMEM);
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}
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of_property_read_u32(overlay, "region-unfreeze-timeout-us",
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&info->enable_timeout_us);
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of_property_read_u32(overlay, "region-freeze-timeout-us",
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&info->disable_timeout_us);
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of_property_read_u32(overlay, "config-complete-timeout-us",
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&info->config_complete_timeout_us);
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/* If overlay is not programming the FPGA, don't need FPGA image info */
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if (!info->firmware_name) {
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ret = 0;
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goto ret_no_info;
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}
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/*
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* If overlay informs us FPGA was externally programmed, specifying
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* firmware here would be ambiguous.
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*/
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if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
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dev_err(dev, "error: specified firmware and external-fpga-config");
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ret = -EINVAL;
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goto ret_no_info;
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}
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return info;
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ret_no_info:
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fpga_image_info_free(info);
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return ERR_PTR(ret);
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}
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/**
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* of_fpga_region_notify_pre_apply - pre-apply overlay notification
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*
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* @region: FPGA region that the overlay was applied to
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* @nd: overlay notification data
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*
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* Called when an overlay targeted to a FPGA Region is about to be applied.
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* Parses the overlay for properties that influence how the FPGA will be
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* programmed and does some checking. If the checks pass, programs the FPGA.
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* If the checks fail, overlay is rejected and does not get added to the
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* live tree.
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*
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* Returns 0 for success or negative error code for failure.
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*/
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static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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{
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struct device *dev = ®ion->dev;
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struct fpga_image_info *info;
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int ret;
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if (region->info) {
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dev_err(dev, "Region already has overlay applied.\n");
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return -EINVAL;
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}
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info = of_fpga_region_parse_ov(region, nd->overlay);
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if (IS_ERR(info))
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return PTR_ERR(info);
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if (!info)
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return 0;
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region->info = info;
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ret = fpga_region_program_fpga(region);
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if (ret) {
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/* error; reject overlay */
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fpga_image_info_free(info);
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region->info = NULL;
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}
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return ret;
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}
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/**
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* of_fpga_region_notify_post_remove - post-remove overlay notification
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*
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* @region: FPGA region that was targeted by the overlay that was removed
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* @nd: overlay notification data
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*
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* Called after an overlay has been removed if the overlay's target was a
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* FPGA region.
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*/
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static void of_fpga_region_notify_post_remove(struct fpga_region *region,
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struct of_overlay_notify_data *nd)
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{
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fpga_bridges_disable(®ion->bridge_list);
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fpga_bridges_put(®ion->bridge_list);
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fpga_image_info_free(region->info);
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region->info = NULL;
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}
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/**
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* of_fpga_region_notify - reconfig notifier for dynamic DT changes
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* @nb: notifier block
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* @action: notifier action
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* @arg: reconfig data
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*
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* This notifier handles programming a FPGA when a "firmware-name" property is
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* added to a fpga-region.
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*
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* Returns NOTIFY_OK or error if FPGA programming fails.
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*/
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static int of_fpga_region_notify(struct notifier_block *nb,
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unsigned long action, void *arg)
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{
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struct of_overlay_notify_data *nd = arg;
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struct fpga_region *region;
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int ret;
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switch (action) {
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case OF_OVERLAY_PRE_APPLY:
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pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
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break;
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case OF_OVERLAY_POST_APPLY:
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pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
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return NOTIFY_OK; /* not for us */
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case OF_OVERLAY_PRE_REMOVE:
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pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
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return NOTIFY_OK; /* not for us */
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case OF_OVERLAY_POST_REMOVE:
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pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
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break;
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default: /* should not happen */
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return NOTIFY_OK;
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}
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region = of_fpga_region_find(nd->target);
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if (!region)
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return NOTIFY_OK;
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ret = 0;
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switch (action) {
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case OF_OVERLAY_PRE_APPLY:
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ret = of_fpga_region_notify_pre_apply(region, nd);
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break;
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case OF_OVERLAY_POST_REMOVE:
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of_fpga_region_notify_post_remove(region, nd);
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break;
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}
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put_device(®ion->dev);
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if (ret)
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return notifier_from_errno(ret);
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return NOTIFY_OK;
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}
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static struct notifier_block fpga_region_of_nb = {
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.notifier_call = of_fpga_region_notify,
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};
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int fpga_region_register(struct device *dev, struct fpga_region *region)
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{
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int id, ret = 0;
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|
@ -576,64 +203,6 @@ int fpga_region_unregister(struct fpga_region *region)
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}
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EXPORT_SYMBOL_GPL(fpga_region_unregister);
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static int of_fpga_region_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct fpga_region *region;
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struct fpga_manager *mgr;
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int ret;
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/* Find the FPGA mgr specified by region or parent region. */
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mgr = of_fpga_region_get_mgr(np);
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if (IS_ERR(mgr))
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return -EPROBE_DEFER;
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|
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region = devm_kzalloc(dev, sizeof(*region), GFP_KERNEL);
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if (!region) {
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ret = -ENOMEM;
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goto eprobe_mgr_put;
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}
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|
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region->mgr = mgr;
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/* Specify how to get bridges for this type of region. */
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region->get_bridges = of_fpga_region_get_bridges;
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||||
|
||||
ret = fpga_region_register(dev, region);
|
||||
if (ret)
|
||||
goto eprobe_mgr_put;
|
||||
|
||||
of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
|
||||
|
||||
dev_info(dev, "FPGA Region probed\n");
|
||||
|
||||
return 0;
|
||||
|
||||
eprobe_mgr_put:
|
||||
fpga_mgr_put(mgr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int of_fpga_region_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct fpga_region *region = platform_get_drvdata(pdev);
|
||||
|
||||
fpga_region_unregister(region);
|
||||
fpga_mgr_put(region->mgr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver of_fpga_region_driver = {
|
||||
.probe = of_fpga_region_probe,
|
||||
.remove = of_fpga_region_remove,
|
||||
.driver = {
|
||||
.name = "fpga-region",
|
||||
.of_match_table = of_match_ptr(fpga_region_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
static void fpga_region_dev_release(struct device *dev)
|
||||
{
|
||||
struct fpga_region *region = to_fpga_region(dev);
|
||||
|
@ -647,36 +216,17 @@ static void fpga_region_dev_release(struct device *dev)
|
|||
*/
|
||||
static int __init fpga_region_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
fpga_region_class = class_create(THIS_MODULE, "fpga_region");
|
||||
if (IS_ERR(fpga_region_class))
|
||||
return PTR_ERR(fpga_region_class);
|
||||
|
||||
fpga_region_class->dev_release = fpga_region_dev_release;
|
||||
|
||||
ret = of_overlay_notifier_register(&fpga_region_of_nb);
|
||||
if (ret)
|
||||
goto err_class;
|
||||
|
||||
ret = platform_driver_register(&of_fpga_region_driver);
|
||||
if (ret)
|
||||
goto err_plat;
|
||||
|
||||
return 0;
|
||||
|
||||
err_plat:
|
||||
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
||||
err_class:
|
||||
class_destroy(fpga_region_class);
|
||||
ida_destroy(&fpga_region_ida);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit fpga_region_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&of_fpga_region_driver);
|
||||
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
||||
class_destroy(fpga_region_class);
|
||||
ida_destroy(&fpga_region_ida);
|
||||
}
|
||||
|
|
496
drivers/fpga/of-fpga-region.c
Normal file
496
drivers/fpga/of-fpga-region.c
Normal file
|
@ -0,0 +1,496 @@
|
|||
/*
|
||||
* FPGA Region - Device Tree support for FPGA programming under Linux
|
||||
*
|
||||
* Copyright (C) 2013-2016 Altera Corporation
|
||||
* Copyright (C) 2017 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/fpga/fpga-bridge.h>
|
||||
#include <linux/fpga/fpga-mgr.h>
|
||||
#include <linux/fpga/fpga-region.h>
|
||||
#include <linux/idr.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
static const struct of_device_id fpga_region_of_match[] = {
|
||||
{ .compatible = "fpga-region", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, fpga_region_of_match);
|
||||
|
||||
static int fpga_region_of_node_match(struct device *dev, const void *data)
|
||||
{
|
||||
return dev->of_node == data;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_find - find FPGA region
|
||||
* @np: device node of FPGA Region
|
||||
*
|
||||
* Caller will need to put_device(®ion->dev) when done.
|
||||
*
|
||||
* Returns FPGA Region struct or NULL
|
||||
*/
|
||||
static struct fpga_region *of_fpga_region_find(struct device_node *np)
|
||||
{
|
||||
return fpga_region_class_find(NULL, np, fpga_region_of_node_match);
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_get_mgr - get reference for FPGA manager
|
||||
* @np: device node of FPGA region
|
||||
*
|
||||
* Get FPGA Manager from "fpga-mgr" property or from ancestor region.
|
||||
*
|
||||
* Caller should call fpga_mgr_put() when done with manager.
|
||||
*
|
||||
* Return: fpga manager struct or IS_ERR() condition containing error code.
|
||||
*/
|
||||
static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
|
||||
{
|
||||
struct device_node *mgr_node;
|
||||
struct fpga_manager *mgr;
|
||||
|
||||
of_node_get(np);
|
||||
while (np) {
|
||||
if (of_device_is_compatible(np, "fpga-region")) {
|
||||
mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
|
||||
if (mgr_node) {
|
||||
mgr = of_fpga_mgr_get(mgr_node);
|
||||
of_node_put(np);
|
||||
return mgr;
|
||||
}
|
||||
}
|
||||
np = of_get_next_parent(np);
|
||||
}
|
||||
of_node_put(np);
|
||||
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_get_bridges - create a list of bridges
|
||||
* @region: FPGA region
|
||||
*
|
||||
* Create a list of bridges including the parent bridge and the bridges
|
||||
* specified by "fpga-bridges" property. Note that the
|
||||
* fpga_bridges_enable/disable/put functions are all fine with an empty list
|
||||
* if that happens.
|
||||
*
|
||||
* Caller should call fpga_bridges_put(®ion->bridge_list) when
|
||||
* done with the bridges.
|
||||
*
|
||||
* Return 0 for success (even if there are no bridges specified)
|
||||
* or -EBUSY if any of the bridges are in use.
|
||||
*/
|
||||
static int of_fpga_region_get_bridges(struct fpga_region *region)
|
||||
{
|
||||
struct device *dev = ®ion->dev;
|
||||
struct device_node *region_np = dev->of_node;
|
||||
struct fpga_image_info *info = region->info;
|
||||
struct device_node *br, *np, *parent_br = NULL;
|
||||
int i, ret;
|
||||
|
||||
/* If parent is a bridge, add to list */
|
||||
ret = of_fpga_bridge_get_to_list(region_np->parent, info,
|
||||
®ion->bridge_list);
|
||||
|
||||
/* -EBUSY means parent is a bridge that is under use. Give up. */
|
||||
if (ret == -EBUSY)
|
||||
return ret;
|
||||
|
||||
/* Zero return code means parent was a bridge and was added to list. */
|
||||
if (!ret)
|
||||
parent_br = region_np->parent;
|
||||
|
||||
/* If overlay has a list of bridges, use it. */
|
||||
if (of_parse_phandle(info->overlay, "fpga-bridges", 0))
|
||||
np = info->overlay;
|
||||
else
|
||||
np = region_np;
|
||||
|
||||
for (i = 0; ; i++) {
|
||||
br = of_parse_phandle(np, "fpga-bridges", i);
|
||||
if (!br)
|
||||
break;
|
||||
|
||||
/* If parent bridge is in list, skip it. */
|
||||
if (br == parent_br)
|
||||
continue;
|
||||
|
||||
/* If node is a bridge, get it and add to list */
|
||||
ret = of_fpga_bridge_get_to_list(br, info,
|
||||
®ion->bridge_list);
|
||||
|
||||
/* If any of the bridges are in use, give up */
|
||||
if (ret == -EBUSY) {
|
||||
fpga_bridges_put(®ion->bridge_list);
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* child_regions_with_firmware
|
||||
* @overlay: device node of the overlay
|
||||
*
|
||||
* If the overlay adds child FPGA regions, they are not allowed to have
|
||||
* firmware-name property.
|
||||
*
|
||||
* Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
|
||||
*/
|
||||
static int child_regions_with_firmware(struct device_node *overlay)
|
||||
{
|
||||
struct device_node *child_region;
|
||||
const char *child_firmware_name;
|
||||
int ret = 0;
|
||||
|
||||
of_node_get(overlay);
|
||||
|
||||
child_region = of_find_matching_node(overlay, fpga_region_of_match);
|
||||
while (child_region) {
|
||||
if (!of_property_read_string(child_region, "firmware-name",
|
||||
&child_firmware_name)) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
child_region = of_find_matching_node(child_region,
|
||||
fpga_region_of_match);
|
||||
}
|
||||
|
||||
of_node_put(child_region);
|
||||
|
||||
if (ret)
|
||||
pr_err("firmware-name not allowed in child FPGA region: %pOF",
|
||||
child_region);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_parse_ov - parse and check overlay applied to region
|
||||
*
|
||||
* @region: FPGA region
|
||||
* @overlay: overlay applied to the FPGA region
|
||||
*
|
||||
* Given an overlay applied to a FPGA region, parse the FPGA image specific
|
||||
* info in the overlay and do some checking.
|
||||
*
|
||||
* Returns:
|
||||
* NULL if overlay doesn't direct us to program the FPGA.
|
||||
* fpga_image_info struct if there is an image to program.
|
||||
* error code for invalid overlay.
|
||||
*/
|
||||
static struct fpga_image_info *of_fpga_region_parse_ov(
|
||||
struct fpga_region *region,
|
||||
struct device_node *overlay)
|
||||
{
|
||||
struct device *dev = ®ion->dev;
|
||||
struct fpga_image_info *info;
|
||||
const char *firmware_name;
|
||||
int ret;
|
||||
|
||||
if (region->info) {
|
||||
dev_err(dev, "Region already has overlay applied.\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
/*
|
||||
* Reject overlay if child FPGA Regions added in the overlay have
|
||||
* firmware-name property (would mean that an FPGA region that has
|
||||
* not been added to the live tree yet is doing FPGA programming).
|
||||
*/
|
||||
ret = child_regions_with_firmware(overlay);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
info = fpga_image_info_alloc(dev);
|
||||
if (!info)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
info->overlay = overlay;
|
||||
|
||||
/* Read FPGA region properties from the overlay */
|
||||
if (of_property_read_bool(overlay, "partial-fpga-config"))
|
||||
info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
|
||||
|
||||
if (of_property_read_bool(overlay, "external-fpga-config"))
|
||||
info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
|
||||
|
||||
if (of_property_read_bool(overlay, "encrypted-fpga-config"))
|
||||
info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
|
||||
|
||||
if (!of_property_read_string(overlay, "firmware-name",
|
||||
&firmware_name)) {
|
||||
info->firmware_name = devm_kstrdup(dev, firmware_name,
|
||||
GFP_KERNEL);
|
||||
if (!info->firmware_name)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
|
||||
of_property_read_u32(overlay, "region-unfreeze-timeout-us",
|
||||
&info->enable_timeout_us);
|
||||
|
||||
of_property_read_u32(overlay, "region-freeze-timeout-us",
|
||||
&info->disable_timeout_us);
|
||||
|
||||
of_property_read_u32(overlay, "config-complete-timeout-us",
|
||||
&info->config_complete_timeout_us);
|
||||
|
||||
/* If overlay is not programming the FPGA, don't need FPGA image info */
|
||||
if (!info->firmware_name) {
|
||||
ret = 0;
|
||||
goto ret_no_info;
|
||||
}
|
||||
|
||||
/*
|
||||
* If overlay informs us FPGA was externally programmed, specifying
|
||||
* firmware here would be ambiguous.
|
||||
*/
|
||||
if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
|
||||
dev_err(dev, "error: specified firmware and external-fpga-config");
|
||||
ret = -EINVAL;
|
||||
goto ret_no_info;
|
||||
}
|
||||
|
||||
return info;
|
||||
ret_no_info:
|
||||
fpga_image_info_free(info);
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_notify_pre_apply - pre-apply overlay notification
|
||||
*
|
||||
* @region: FPGA region that the overlay was applied to
|
||||
* @nd: overlay notification data
|
||||
*
|
||||
* Called when an overlay targeted to a FPGA Region is about to be applied.
|
||||
* Parses the overlay for properties that influence how the FPGA will be
|
||||
* programmed and does some checking. If the checks pass, programs the FPGA.
|
||||
* If the checks fail, overlay is rejected and does not get added to the
|
||||
* live tree.
|
||||
*
|
||||
* Returns 0 for success or negative error code for failure.
|
||||
*/
|
||||
static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
|
||||
struct of_overlay_notify_data *nd)
|
||||
{
|
||||
struct device *dev = ®ion->dev;
|
||||
struct fpga_image_info *info;
|
||||
int ret;
|
||||
|
||||
if (region->info) {
|
||||
dev_err(dev, "Region already has overlay applied.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
info = of_fpga_region_parse_ov(region, nd->overlay);
|
||||
if (IS_ERR(info))
|
||||
return PTR_ERR(info);
|
||||
|
||||
if (!info)
|
||||
return 0;
|
||||
|
||||
region->info = info;
|
||||
ret = fpga_region_program_fpga(region);
|
||||
if (ret) {
|
||||
/* error; reject overlay */
|
||||
fpga_image_info_free(info);
|
||||
region->info = NULL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_notify_post_remove - post-remove overlay notification
|
||||
*
|
||||
* @region: FPGA region that was targeted by the overlay that was removed
|
||||
* @nd: overlay notification data
|
||||
*
|
||||
* Called after an overlay has been removed if the overlay's target was a
|
||||
* FPGA region.
|
||||
*/
|
||||
static void of_fpga_region_notify_post_remove(struct fpga_region *region,
|
||||
struct of_overlay_notify_data *nd)
|
||||
{
|
||||
fpga_bridges_disable(®ion->bridge_list);
|
||||
fpga_bridges_put(®ion->bridge_list);
|
||||
fpga_image_info_free(region->info);
|
||||
region->info = NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* of_fpga_region_notify - reconfig notifier for dynamic DT changes
|
||||
* @nb: notifier block
|
||||
* @action: notifier action
|
||||
* @arg: reconfig data
|
||||
*
|
||||
* This notifier handles programming a FPGA when a "firmware-name" property is
|
||||
* added to a fpga-region.
|
||||
*
|
||||
* Returns NOTIFY_OK or error if FPGA programming fails.
|
||||
*/
|
||||
static int of_fpga_region_notify(struct notifier_block *nb,
|
||||
unsigned long action, void *arg)
|
||||
{
|
||||
struct of_overlay_notify_data *nd = arg;
|
||||
struct fpga_region *region;
|
||||
int ret;
|
||||
|
||||
switch (action) {
|
||||
case OF_OVERLAY_PRE_APPLY:
|
||||
pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
|
||||
break;
|
||||
case OF_OVERLAY_POST_APPLY:
|
||||
pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
|
||||
return NOTIFY_OK; /* not for us */
|
||||
case OF_OVERLAY_PRE_REMOVE:
|
||||
pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
|
||||
return NOTIFY_OK; /* not for us */
|
||||
case OF_OVERLAY_POST_REMOVE:
|
||||
pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
|
||||
break;
|
||||
default: /* should not happen */
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
region = of_fpga_region_find(nd->target);
|
||||
if (!region)
|
||||
return NOTIFY_OK;
|
||||
|
||||
ret = 0;
|
||||
switch (action) {
|
||||
case OF_OVERLAY_PRE_APPLY:
|
||||
ret = of_fpga_region_notify_pre_apply(region, nd);
|
||||
break;
|
||||
|
||||
case OF_OVERLAY_POST_REMOVE:
|
||||
of_fpga_region_notify_post_remove(region, nd);
|
||||
break;
|
||||
}
|
||||
|
||||
put_device(®ion->dev);
|
||||
|
||||
if (ret)
|
||||
return notifier_from_errno(ret);
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block fpga_region_of_nb = {
|
||||
.notifier_call = of_fpga_region_notify,
|
||||
};
|
||||
|
||||
static int of_fpga_region_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct fpga_region *region;
|
||||
struct fpga_manager *mgr;
|
||||
int ret;
|
||||
|
||||
/* Find the FPGA mgr specified by region or parent region. */
|
||||
mgr = of_fpga_region_get_mgr(np);
|
||||
if (IS_ERR(mgr))
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
region = devm_kzalloc(dev, sizeof(*region), GFP_KERNEL);
|
||||
if (!region) {
|
||||
ret = -ENOMEM;
|
||||
goto eprobe_mgr_put;
|
||||
}
|
||||
|
||||
region->mgr = mgr;
|
||||
|
||||
/* Specify how to get bridges for this type of region. */
|
||||
region->get_bridges = of_fpga_region_get_bridges;
|
||||
|
||||
ret = fpga_region_register(dev, region);
|
||||
if (ret)
|
||||
goto eprobe_mgr_put;
|
||||
|
||||
of_platform_populate(np, fpga_region_of_match, NULL, ®ion->dev);
|
||||
|
||||
dev_info(dev, "FPGA Region probed\n");
|
||||
|
||||
return 0;
|
||||
|
||||
eprobe_mgr_put:
|
||||
fpga_mgr_put(mgr);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int of_fpga_region_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct fpga_region *region = platform_get_drvdata(pdev);
|
||||
|
||||
fpga_region_unregister(region);
|
||||
fpga_mgr_put(region->mgr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver of_fpga_region_driver = {
|
||||
.probe = of_fpga_region_probe,
|
||||
.remove = of_fpga_region_remove,
|
||||
.driver = {
|
||||
.name = "of-fpga-region",
|
||||
.of_match_table = of_match_ptr(fpga_region_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
/**
|
||||
* fpga_region_init - init function for fpga_region class
|
||||
* Creates the fpga_region class and registers a reconfig notifier.
|
||||
*/
|
||||
static int __init of_fpga_region_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = of_overlay_notifier_register(&fpga_region_of_nb);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = platform_driver_register(&of_fpga_region_driver);
|
||||
if (ret)
|
||||
goto err_plat;
|
||||
|
||||
return 0;
|
||||
|
||||
err_plat:
|
||||
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit of_fpga_region_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&of_fpga_region_driver);
|
||||
of_overlay_notifier_unregister(&fpga_region_of_nb);
|
||||
}
|
||||
|
||||
subsys_initcall(of_fpga_region_init);
|
||||
module_exit(of_fpga_region_exit);
|
||||
|
||||
MODULE_DESCRIPTION("FPGA Region");
|
||||
MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
Loading…
Reference in a new issue