Documentation: DT: qcom_hidma: update binding for MSI
Adding a new binding for qcom,hidma-1.1 to distinguish HW supporting MSI interrupts from the older revision. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest),
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the channel nodes appear on their own, not under a management node.
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the channel nodes appear on their own, not under a management node.
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Required properties:
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Required properties:
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- compatible: must contain "qcom,hidma-1.0"
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- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1"
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for MSI capable HW.
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- reg: Addresses for the transfer and event channel
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- reg: Addresses for the transfer and event channel
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- interrupts: Should contain the event interrupt
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- interrupts: Should contain the event interrupt
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- desc-count: Number of asynchronous requests this channel can handle
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- desc-count: Number of asynchronous requests this channel can handle
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- iommus: required a iommu node
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- iommus: required a iommu node
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Optional properties for MSI:
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- msi-parent : See the generic MSI binding described in
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devicetree/bindings/interrupt-controller/msi.txt for a description of the
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msi-parent property.
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Example:
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Example:
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Hypervisor OS configuration:
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Hypervisor OS configuration:
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