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[ARM] Kirkwood: small L2 code cleanup

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Strictly speaking, a MCR instruction does not produce any output.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Nicolas Pitre 2009-03-27 14:22:26 -04:00
parent d75de08727
commit f000328ac1
1 changed files with 1 additions and 3 deletions
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arch/arm/mm/cache-feroceon-l2.c
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@ -258,9 +258,7 @@ static void __init enable_dcache(void)
static void __init __invalidate_icache(void) static void __init __invalidate_icache(void)
{ {
int dummy; __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy));
} }
static int __init invalidate_and_disable_icache(void) static int __init invalidate_and_disable_icache(void)