tools/power turbostat: Decode MSR_MISC_PWR_MGMT
This MSR is helpful to show if P-state HW coordination is enabled or disabled. Signed-off-by: Len Brown <len.brown@intel.com>
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@ -2783,6 +2783,26 @@ void decode_misc_enable_msr(void)
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msr & (1 << 18) ? "MONITOR" : "");
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}
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/*
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* Decode MSR_MISC_PWR_MGMT
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*
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* Decode the bits according to the Nehalem documentation
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* bit[0] seems to continue to have same meaning going forward
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* bit[1] less so...
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*/
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void decode_misc_pwr_mgmt_msr(void)
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{
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unsigned long long msr;
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if (!do_nhm_platform_info)
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return;
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if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
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fprintf(stderr, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
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base_cpu, msr,
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msr & (1 << 0) ? "DIS" : "EN",
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msr & (1 << 1) ? "EN" : "DIS");
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}
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void process_cpuid()
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{
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@ -2936,6 +2956,9 @@ void process_cpuid()
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do_slm_cstates = is_slm(family, model);
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do_knl_cstates = is_knl(family, model);
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if (debug)
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decode_misc_pwr_mgmt_msr();
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rapl_probe(family, model);
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perf_limit_reasons_probe(family, model);
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