MIPS: Clean-up GIC and vectored interrupts.
This change adds macros for routing of GIC interrupts for EIC and non-EIC hardware modes. Also added Malta GIC macros having to do with performance and timer interrupts. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3576/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -206,7 +206,7 @@
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#define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100
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#define GIC_VPE_EIC_SS(intr) \
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(GIC_EIC_SHADOW_SET_BASE + (4 * intr))
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(GIC_VPE_EIC_SHADOW_SET_BASE + (4 * intr))
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#define GIC_VPE_EIC_VEC_BASE 0x0800
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#define GIC_VPE_EIC_VEC(intr) \
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@ -330,6 +330,17 @@ struct gic_intr_map {
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#define GIC_FLAG_TRANSPARENT 0x02
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};
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/*
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* This is only used in EIC mode. This helps to figure out which
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* shared interrupts we need to process when we get a vector interrupt.
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*/
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#define GIC_MAX_SHARED_INTR 0x5
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struct gic_shared_intr_map {
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unsigned int num_shared_intr;
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unsigned int intr_list[GIC_MAX_SHARED_INTR];
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unsigned int local_intr_mask;
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};
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extern void gic_init(unsigned long gic_base_addr,
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unsigned long gic_addrspace_size, struct gic_intr_map *intrmap,
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unsigned int intrmap_size, unsigned int irqbase);
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@ -338,5 +349,7 @@ extern unsigned int gic_get_int(void);
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extern void gic_send_ipi(unsigned int intr);
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extern unsigned int plat_ipi_call_int_xlate(unsigned int);
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extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
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extern void gic_bind_eic_interrupt(int irq, int set);
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extern unsigned int gic_get_timer_pending(void);
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#endif /* _ASM_GICREGS_H */
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@ -86,6 +86,16 @@
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#define GIC_CPU_INT4 4 /* . */
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#define GIC_CPU_INT5 5 /* Core Interrupt 5 */
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/* MALTA GIC local interrupts */
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#define GIC_INT_TMR (GIC_CPU_INT5)
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#define GIC_INT_PERFCTR (GIC_CPU_INT5)
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/* GIC constants */
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/* Add 2 to convert non-eic hw int # to eic vector # */
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#define GIC_CPU_TO_VEC_OFFSET (2)
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/* If we map an intr to pin X, GIC will actually generate vector X+1 */
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#define GIC_PIN_TO_VEC_OFFSET (1)
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#define GIC_EXT_INTR(x) x
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/* External Interrupts used for IPI */
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