xtensa: move kernel mapping addresses into kmem_layout.h
Create a header dedicated to memory layout definitions. Include it from places where these definitions are needed. Express vmalloc area address, VIRTUAL_MEMORY_ADDRESS and KERNELOFFSET through KSEG address. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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arch/xtensa/include/asm/kmem_layout.h
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arch/xtensa/include/asm/kmem_layout.h
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/*
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* Kernel virtual memory layout definitions.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Copyright (C) 2016 Cadence Design Systems Inc.
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*/
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#ifndef _XTENSA_KMEM_LAYOUT_H
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#define _XTENSA_KMEM_LAYOUT_H
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#include <asm/types.h>
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/*
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* Fixed TLB translations in the processor.
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*/
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#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
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#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
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#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
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#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
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#endif
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@ -15,15 +15,7 @@
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <platform/hardware.h>
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/*
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* Fixed TLB translations in the processor.
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*/
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#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
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#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
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#define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
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#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
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#include <asm/kmem_layout.h>
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/*
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* PAGE_SHIFT determines the page size
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@ -13,6 +13,7 @@
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#include <asm-generic/pgtable-nopmd.h>
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#include <asm/page.h>
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#include <asm/kmem_layout.h>
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/*
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* We only use two ring levels, user and kernel space.
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* Virtual memory area. We keep a distance to other memory regions to be
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* on the safe side. We also use this area for cache aliasing.
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*/
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#define VMALLOC_START 0xC0000000
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#define VMALLOC_END 0xC7FEFFFF
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#define TLBTEMP_BASE_1 0xC7FF0000
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#define VMALLOC_START (XCHAL_KSEG_CACHED_VADDR - 0x10000000)
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#define VMALLOC_END (VMALLOC_START + 0x07FEFFFF)
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#define TLBTEMP_BASE_1 (VMALLOC_END + 1)
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#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE)
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#if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE
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#define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE)
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@ -20,6 +20,7 @@
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#include <variant/core.h>
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#include <platform/hardware.h>
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#include <asm/kmem_layout.h>
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#if XCHAL_HAVE_PTP_MMU
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#define XCHAL_KIO_CACHED_VADDR 0xe0000000
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@ -48,10 +49,10 @@ static inline unsigned long xtensa_get_kio_paddr(void)
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#if defined(CONFIG_MMU)
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/* Will Become VECBASE */
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#define VIRTUAL_MEMORY_ADDRESS 0xD0000000
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#define VIRTUAL_MEMORY_ADDRESS XCHAL_KSEG_CACHED_VADDR
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/* Image Virtual Start Address */
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#define KERNELOFFSET 0xD0003000
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#define KERNELOFFSET (XCHAL_KSEG_CACHED_VADDR + 0x3000)
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#if defined(XCHAL_HAVE_PTP_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
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/* MMU v3 - XCHAL_HAVE_PTP_MMU == 1 */
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@ -344,7 +344,7 @@ void __init mem_init(void)
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" fixmap : 0x%08lx - 0x%08lx (%5lu kB)\n"
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#endif
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#ifdef CONFIG_MMU
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" vmalloc : 0x%08x - 0x%08x (%5u MB)\n"
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" vmalloc : 0x%08lx - 0x%08lx (%5lu MB)\n"
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#endif
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" lowmem : 0x%08lx - 0x%08lx (%5lu MB)\n",
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#ifdef CONFIG_HIGHMEM
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