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m68knommu: move ColdFire slice timer address defiens to 54xx header

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Move the base address defines of the ColdFire 54xx CPU slice timers into the
54xx specific header (m54xxsim.h). They are CPU specific, and belong with the
CPU specific defines. Also make them relative to the MBAR peripheral region,
making the define the absolute address.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2012-09-17 16:51:20 +10:00
parent 6d8a1393ec
commit f2f41c68ea
3 changed files with 8 additions and 9 deletions
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6
arch/m68k/include/asm/m54xxsim.h
View file

@ -46,6 +46,12 @@
#define MCF_IRQ_UART2 (MCFINT_VECBASE + 33)
#define MCF_IRQ_UART3 (MCFINT_VECBASE + 32)
/*
* Slice Timer support.
*/
#define MCFSLT_TIMER0 (MCF_MBAR + 0x900) /* Base addr TIMER0 */
#define MCFSLT_TIMER1 (MCF_MBAR + 0x910) /* Base addr TIMER1 */
/*
* Generic GPIO support
*/

7
arch/m68k/include/asm/mcfslt.h
View file

@ -12,13 +12,6 @@
#define mcfslt_h
/****************************************************************************/
/*
* Get address specific defines for the 547x.
*/
#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */
#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */
/*
* Define the SLT timer register set addresses.
*/

4
arch/m68k/platform/coldfire/sltimers.c
View file

@ -32,7 +32,7 @@
/*
* By default use Slice Timer 1 as the profiler clock timer.
*/
#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
#define PA(a) (MCFSLT_TIMER1 + (a))
/*
* Choose a reasonably fast profile timer. Make it an odd value to
@ -76,7 +76,7 @@ void mcfslt_profile_init(void)
/*
* By default use Slice Timer 0 as the system clock timer.
*/
#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
#define TA(a) (MCFSLT_TIMER0 + (a))
static u32 mcfslt_cycles_per_jiffy;
static u32 mcfslt_cnt;