Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
This commit is contained in:
commit
f3ffb68144
|
@ -214,12 +214,13 @@ hardware.
|
|||
The interaction of the iflag bits is as follows (parity error
|
||||
given as an example):
|
||||
Parity error INPCK IGNPAR
|
||||
None n/a n/a character received
|
||||
Yes n/a 0 character discarded
|
||||
Yes 0 1 character received, marked as
|
||||
n/a 0 n/a character received, marked as
|
||||
TTY_NORMAL
|
||||
Yes 1 1 character received, marked as
|
||||
None 1 n/a character received, marked as
|
||||
TTY_NORMAL
|
||||
Yes 1 0 character received, marked as
|
||||
TTY_PARITY
|
||||
Yes 1 1 character discarded
|
||||
|
||||
Other flags may be used (eg, xon/xoff characters) if your
|
||||
hardware supports hardware "soft" flow control.
|
||||
|
|
17
MAINTAINERS
17
MAINTAINERS
|
@ -568,6 +568,18 @@ L: linuxppc-dev@ozlabs.org
|
|||
W: http://www.penguinppc.org/ppc64/
|
||||
S: Supported
|
||||
|
||||
BROADCOM BNX2 GIGABIT ETHERNET DRIVER
|
||||
P: Michael Chan
|
||||
M: mchan@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
||||
BROADCOM TG3 GIGABIT ETHERNET DRIVER
|
||||
P: Michael Chan
|
||||
M: mchan@broadcom.com
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
||||
BTTV VIDEO4LINUX DRIVER
|
||||
P: Mauro Carvalho Chehab
|
||||
M: mchehab@infradead.org
|
||||
|
@ -1877,6 +1889,11 @@ L: linux-kernel@vger.kernel.org
|
|||
W: http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
|
||||
S: Maintained
|
||||
|
||||
MULTIMEDIA CARD SUBSYSTEM
|
||||
P: Russell King
|
||||
M: rmk+mmc@arm.linux.org.uk
|
||||
S: Maintained
|
||||
|
||||
MULTISOUND SOUND DRIVER
|
||||
P: Andrew Veliath
|
||||
M: andrewtv@usa.net
|
||||
|
|
4
Makefile
4
Makefile
|
@ -1,8 +1,8 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 17
|
||||
EXTRAVERSION =-rc5
|
||||
NAME=Lordi Rules
|
||||
EXTRAVERSION =-rc6
|
||||
NAME=Crazed Snow-Weasel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus);
|
|||
EXPORT_SYMBOL(smp_call_function);
|
||||
EXPORT_SYMBOL(smp_call_function_on_cpu);
|
||||
EXPORT_SYMBOL(_atomic_dec_and_lock);
|
||||
EXPORT_SYMBOL(cpu_present_mask);
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
/*
|
||||
|
|
|
@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr)
|
|||
if (cpuid != boot_cpuid) {
|
||||
flags |= 0x00040000UL; /* "remain halted" */
|
||||
*pflags = flags;
|
||||
clear_bit(cpuid, &cpu_present_mask);
|
||||
cpu_clear(cpuid, cpu_present_map);
|
||||
halt();
|
||||
}
|
||||
#endif
|
||||
|
@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr)
|
|||
|
||||
#ifdef CONFIG_SMP
|
||||
/* Wait for the secondaries to halt. */
|
||||
cpu_clear(boot_cpuid, cpu_possible_map);
|
||||
while (cpus_weight(cpu_possible_map))
|
||||
cpu_clear(boot_cpuid, cpu_present_map);
|
||||
while (cpus_weight(cpu_present_map))
|
||||
barrier();
|
||||
#endif
|
||||
|
||||
|
|
|
@ -68,7 +68,6 @@ enum ipi_message_type {
|
|||
static int smp_secondary_alive __initdata = 0;
|
||||
|
||||
/* Which cpus ids came online. */
|
||||
cpumask_t cpu_present_mask;
|
||||
cpumask_t cpu_online_map;
|
||||
|
||||
EXPORT_SYMBOL(cpu_online_map);
|
||||
|
@ -439,7 +438,7 @@ setup_smp(void)
|
|||
if ((cpu->flags & 0x1cc) == 0x1cc) {
|
||||
smp_num_probed++;
|
||||
/* Assume here that "whami" == index */
|
||||
cpu_set(i, cpu_present_mask);
|
||||
cpu_set(i, cpu_present_map);
|
||||
cpu->pal_revision = boot_cpu_palrev;
|
||||
}
|
||||
|
||||
|
@ -450,11 +449,10 @@ setup_smp(void)
|
|||
}
|
||||
} else {
|
||||
smp_num_probed = 1;
|
||||
cpu_set(boot_cpuid, cpu_present_mask);
|
||||
}
|
||||
|
||||
printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
|
||||
smp_num_probed, cpu_possible_map.bits[0]);
|
||||
printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
|
||||
smp_num_probed, cpu_present_map.bits[0]);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus)
|
|||
|
||||
/* Nothing to do on a UP box, or when told not to. */
|
||||
if (smp_num_probed == 1 || max_cpus == 0) {
|
||||
cpu_present_mask = cpumask_of_cpu(boot_cpuid);
|
||||
cpu_present_map = cpumask_of_cpu(boot_cpuid);
|
||||
printk(KERN_INFO "SMP mode deactivated.\n");
|
||||
return;
|
||||
}
|
||||
|
@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus)
|
|||
void __devinit
|
||||
smp_prepare_boot_cpu(void)
|
||||
{
|
||||
/*
|
||||
* Mark the boot cpu (current cpu) as online
|
||||
*/
|
||||
cpu_set(smp_processor_id(), cpu_online_map);
|
||||
}
|
||||
|
||||
int __devinit
|
||||
|
|
|
@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask)
|
|||
register int bcpu = boot_cpuid;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
cpumask_t cpm = cpu_present_mask;
|
||||
cpumask_t cpm = cpu_present_map;
|
||||
volatile unsigned long *dim0, *dim1, *dim2, *dim3;
|
||||
unsigned long mask0, mask1, mask2, mask3, dummy;
|
||||
|
||||
|
|
|
@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
|
|||
help
|
||||
Choice for UART for kernel low-level using S3C2410 UARTS,
|
||||
should be between zero and two. The port must have been
|
||||
initalised by the boot-loader before use.
|
||||
initialised by the boot-loader before use.
|
||||
|
||||
The uncompressor code port configuration is now handled
|
||||
by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
|
||||
|
|
|
@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
|
|||
|
||||
static void ixp23xx_irq_mask(unsigned int irq)
|
||||
{
|
||||
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
volatile unsigned long *intr_reg;
|
||||
|
||||
if (irq >= 56)
|
||||
irq += 8;
|
||||
|
||||
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
*intr_reg &= ~(1 << (irq % 32));
|
||||
}
|
||||
|
||||
|
@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
|
|||
*/
|
||||
static void ixp23xx_irq_level_unmask(unsigned int irq)
|
||||
{
|
||||
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
volatile unsigned long *intr_reg;
|
||||
|
||||
ixp23xx_irq_ack(irq);
|
||||
|
||||
if (irq >= 56)
|
||||
irq += 8;
|
||||
|
||||
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
*intr_reg |= (1 << (irq % 32));
|
||||
}
|
||||
|
||||
static void ixp23xx_irq_edge_unmask(unsigned int irq)
|
||||
{
|
||||
volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
volatile unsigned long *intr_reg;
|
||||
|
||||
if (irq >= 56)
|
||||
irq += 8;
|
||||
|
||||
intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
|
||||
*intr_reg |= (1 << (irq % 32));
|
||||
}
|
||||
|
||||
|
|
|
@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
|
|||
2) If > 64MB of memory space is required, the IXP4xx can be
|
||||
configured to use indirect registers to access PCI This allows
|
||||
for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
|
||||
The disadvantadge of this is that every PCI access requires
|
||||
The disadvantage of this is that every PCI access requires
|
||||
three local register accesses plus a spinlock, but in some
|
||||
cases the performance hit is acceptable. In addition, you cannot
|
||||
mmap() PCI devices in this case due to the indirect nature
|
||||
|
|
|
@ -493,6 +493,7 @@ static void __init mainstone_map_io(void)
|
|||
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
|
||||
/* Maintainer: MontaVista Software Inc. */
|
||||
.phys_io = 0x40000000,
|
||||
.boot_params = 0xa0000100, /* BLOB boot parameter setting */
|
||||
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
||||
.map_io = mainstone_map_io,
|
||||
.init_irq = mainstone_init_irq,
|
||||
|
|
|
@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
|
|||
depends on ARCH_S3C2410 && PM
|
||||
help
|
||||
Say Y here if you want verbose debugging from the PM Suspend and
|
||||
Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
|
||||
Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
|
||||
for more information.
|
||||
|
||||
config S3C2410_PM_CHECK
|
||||
|
|
|
@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
|
|||
ecc_mask = 0;
|
||||
}
|
||||
|
||||
if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
|
||||
if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
|
||||
if (mem_types[i].prot_l1)
|
||||
mem_types[i].prot_l1 |= PMD_BIT4;
|
||||
|
@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
|
|||
pgd = init_mm.pgd;
|
||||
|
||||
base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
|
||||
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
|
||||
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
|
||||
base_pmdval |= PMD_BIT4;
|
||||
|
||||
for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
|
||||
|
|
|
@ -13,7 +13,7 @@ choice
|
|||
default SGI_IP22
|
||||
|
||||
config MIPS_MTX1
|
||||
bool "Support for 4G Systems MTX-1 board"
|
||||
bool "4G Systems MTX-1 board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select SOC_AU1500
|
||||
|
@ -120,7 +120,7 @@ config MIPS_MIRAGE
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config MIPS_COBALT
|
||||
bool "Support for Cobalt Server"
|
||||
bool "Cobalt Server"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select I8259
|
||||
|
@ -132,7 +132,7 @@ config MIPS_COBALT
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config MACH_DECSTATION
|
||||
bool "Support for DECstations"
|
||||
bool "DECstations"
|
||||
select BOOT_ELF32
|
||||
select DMA_NONCOHERENT
|
||||
select EARLY_PRINTK
|
||||
|
@ -158,7 +158,7 @@ config MACH_DECSTATION
|
|||
otherwise choose R3000.
|
||||
|
||||
config MIPS_EV64120
|
||||
bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
|
||||
bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
|
@ -175,7 +175,7 @@ config MIPS_EV64120
|
|||
kernel for this platform.
|
||||
|
||||
config MIPS_EV96100
|
||||
bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
|
||||
bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
|
@ -195,7 +195,7 @@ config MIPS_EV96100
|
|||
here if you wish to build a kernel for this platform.
|
||||
|
||||
config MIPS_IVR
|
||||
bool "Support for Globespan IVR board"
|
||||
bool "Globespan IVR board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select ITE_BOARD_GEN
|
||||
|
@ -211,7 +211,7 @@ config MIPS_IVR
|
|||
build a kernel for this platform.
|
||||
|
||||
config MIPS_ITE8172
|
||||
bool "Support for ITE 8172G board"
|
||||
bool "ITE 8172G board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select ITE_BOARD_GEN
|
||||
|
@ -228,7 +228,7 @@ config MIPS_ITE8172
|
|||
a kernel for this platform.
|
||||
|
||||
config MACH_JAZZ
|
||||
bool "Support for the Jazz family of machines"
|
||||
bool "Jazz family of machines"
|
||||
select ARC
|
||||
select ARC32
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
|
@ -246,7 +246,7 @@ config MACH_JAZZ
|
|||
Olivetti M700-10 workstations.
|
||||
|
||||
config LASAT
|
||||
bool "Support for LASAT Networks platforms"
|
||||
bool "LASAT Networks platforms"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select MIPS_GT64120
|
||||
|
@ -258,7 +258,7 @@ config LASAT
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config MIPS_ATLAS
|
||||
bool "Support for MIPS Atlas board"
|
||||
bool "MIPS Atlas board"
|
||||
select BOOT_ELF32
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
|
@ -283,7 +283,7 @@ config MIPS_ATLAS
|
|||
board.
|
||||
|
||||
config MIPS_MALTA
|
||||
bool "Support for MIPS Malta board"
|
||||
bool "MIPS Malta board"
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
select BOOT_ELF32
|
||||
select HAVE_STD_PC_SERIAL_PORT
|
||||
|
@ -311,7 +311,7 @@ config MIPS_MALTA
|
|||
board.
|
||||
|
||||
config MIPS_SEAD
|
||||
bool "Support for MIPS SEAD board (EXPERIMENTAL)"
|
||||
bool "MIPS SEAD board (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
select IRQ_CPU
|
||||
select DMA_NONCOHERENT
|
||||
|
@ -328,7 +328,7 @@ config MIPS_SEAD
|
|||
board.
|
||||
|
||||
config MIPS_SIM
|
||||
bool 'Support for MIPS simulator (MIPSsim)'
|
||||
bool 'MIPS simulator (MIPSsim)'
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_CPU
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
|
@ -341,7 +341,7 @@ config MIPS_SIM
|
|||
emulator.
|
||||
|
||||
config MOMENCO_JAGUAR_ATX
|
||||
bool "Support for Momentum Jaguar board"
|
||||
bool "Momentum Jaguar board"
|
||||
select BOOT_ELF32
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
|
@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX
|
|||
Momentum Computer <http://www.momenco.com/>.
|
||||
|
||||
config MOMENCO_OCELOT
|
||||
bool "Support for Momentum Ocelot board"
|
||||
bool "Momentum Ocelot board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select IRQ_CPU
|
||||
|
@ -378,7 +378,7 @@ config MOMENCO_OCELOT
|
|||
Momentum Computer <http://www.momenco.com/>.
|
||||
|
||||
config MOMENCO_OCELOT_3
|
||||
bool "Support for Momentum Ocelot-3 board"
|
||||
bool "Momentum Ocelot-3 board"
|
||||
select BOOT_ELF32
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
|
@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3
|
|||
PMC-Sierra Rm79000 core.
|
||||
|
||||
config MOMENCO_OCELOT_C
|
||||
bool "Support for Momentum Ocelot-C board"
|
||||
bool "Momentum Ocelot-C board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select IRQ_CPU
|
||||
|
@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C
|
|||
Momentum Computer <http://www.momenco.com/>.
|
||||
|
||||
config MOMENCO_OCELOT_G
|
||||
bool "Support for Momentum Ocelot-G board"
|
||||
bool "Momentum Ocelot-G board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select IRQ_CPU
|
||||
|
@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G
|
|||
Momentum Computer <http://www.momenco.com/>.
|
||||
|
||||
config MIPS_XXS1500
|
||||
bool "Support for MyCable XXS1500 board"
|
||||
bool "MyCable XXS1500 board"
|
||||
select DMA_NONCOHERENT
|
||||
select SOC_AU1500
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config PNX8550_V2PCI
|
||||
bool "Support for Philips PNX8550 based Viper2-PCI board"
|
||||
bool "Philips PNX8550 based Viper2-PCI board"
|
||||
select PNX8550
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config PNX8550_JBS
|
||||
bool "Support for Philips PNX8550 based JBS board"
|
||||
bool "Philips PNX8550 based JBS board"
|
||||
select PNX8550
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config DDB5074
|
||||
bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
|
||||
bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
select DDB5XXX_COMMON
|
||||
select DMA_NONCOHERENT
|
||||
|
@ -465,7 +465,7 @@ config DDB5074
|
|||
evaluation board.
|
||||
|
||||
config DDB5476
|
||||
bool "Support for NEC DDB Vrc-5476"
|
||||
bool "NEC DDB Vrc-5476"
|
||||
select DDB5XXX_COMMON
|
||||
select DMA_NONCOHERENT
|
||||
select HAVE_STD_PC_SERIAL_PORT
|
||||
|
@ -486,7 +486,7 @@ config DDB5476
|
|||
IDE controller, PS2 keyboard, PS2 mouse, etc.
|
||||
|
||||
config DDB5477
|
||||
bool "Support for NEC DDB Vrc-5477"
|
||||
bool "NEC DDB Vrc-5477"
|
||||
select DDB5XXX_COMMON
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
|
@ -504,13 +504,13 @@ config DDB5477
|
|||
ether port USB, AC97, PCI, etc.
|
||||
|
||||
config MACH_VR41XX
|
||||
bool "Support for NEC VR4100 series based machines"
|
||||
bool "NEC VR41XX-based machines"
|
||||
select SYS_HAS_CPU_VR41XX
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
|
||||
|
||||
config PMC_YOSEMITE
|
||||
bool "Support for PMC-Sierra Yosemite eval board"
|
||||
bool "PMC-Sierra Yosemite eval board"
|
||||
select DMA_COHERENT
|
||||
select HW_HAS_PCI
|
||||
select IRQ_CPU
|
||||
|
@ -527,7 +527,7 @@ config PMC_YOSEMITE
|
|||
manufactured by PMC-Sierra.
|
||||
|
||||
config QEMU
|
||||
bool "Support for Qemu"
|
||||
bool "Qemu"
|
||||
select DMA_COHERENT
|
||||
select GENERIC_ISA_DMA
|
||||
select HAVE_STD_PC_SERIAL_PORT
|
||||
|
@ -547,7 +547,7 @@ config QEMU
|
|||
can be found at http://www.linux-mips.org/wiki/Qemu.
|
||||
|
||||
config SGI_IP22
|
||||
bool "Support for SGI IP22 (Indy/Indigo2)"
|
||||
bool "SGI IP22 (Indy/Indigo2)"
|
||||
select ARC
|
||||
select ARC32
|
||||
select BOOT_ELF32
|
||||
|
@ -567,7 +567,7 @@ config SGI_IP22
|
|||
that runs on these, say Y here.
|
||||
|
||||
config SGI_IP27
|
||||
bool "Support for SGI IP27 (Origin200/2000)"
|
||||
bool "SGI IP27 (Origin200/2000)"
|
||||
select ARC
|
||||
select ARC64
|
||||
select BOOT_ELF64
|
||||
|
@ -583,7 +583,7 @@ config SGI_IP27
|
|||
here.
|
||||
|
||||
config SGI_IP32
|
||||
bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
|
||||
bool "SGI IP32 (O2) (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
select ARC
|
||||
select ARC32
|
||||
|
@ -604,7 +604,7 @@ config SGI_IP32
|
|||
If you want this kernel to run on SGI O2 workstation, say Y here.
|
||||
|
||||
config SIBYTE_BIGSUR
|
||||
bool "Support for Sibyte BCM91480B-BigSur"
|
||||
bool "Sibyte BCM91480B-BigSur"
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
select PCI_DOMAINS
|
||||
|
@ -615,7 +615,7 @@ config SIBYTE_BIGSUR
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_SWARM
|
||||
bool "Support for Sibyte BCM91250A-SWARM"
|
||||
bool "Sibyte BCM91250A-SWARM"
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
select SIBYTE_SB1250
|
||||
|
@ -626,7 +626,7 @@ config SIBYTE_SWARM
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_SENTOSA
|
||||
bool "Support for Sibyte BCM91250E-Sentosa"
|
||||
bool "Sibyte BCM91250E-Sentosa"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -637,7 +637,7 @@ config SIBYTE_SENTOSA
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_RHONE
|
||||
bool "Support for Sibyte BCM91125E-Rhone"
|
||||
bool "Sibyte BCM91125E-Rhone"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -648,7 +648,7 @@ config SIBYTE_RHONE
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_CARMEL
|
||||
bool "Support for Sibyte BCM91120x-Carmel"
|
||||
bool "Sibyte BCM91120x-Carmel"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -659,7 +659,7 @@ config SIBYTE_CARMEL
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_PTSWARM
|
||||
bool "Support for Sibyte BCM91250PT-PTSWARM"
|
||||
bool "Sibyte BCM91250PT-PTSWARM"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -671,7 +671,7 @@ config SIBYTE_PTSWARM
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_LITTLESUR
|
||||
bool "Support for Sibyte BCM91250C2-LittleSur"
|
||||
bool "Sibyte BCM91250C2-LittleSur"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_CRHINE
|
||||
bool "Support for Sibyte BCM91120C-CRhine"
|
||||
bool "Sibyte BCM91120C-CRhine"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -694,7 +694,7 @@ config SIBYTE_CRHINE
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SIBYTE_CRHONE
|
||||
bool "Support for Sibyte BCM91125C-CRhone"
|
||||
bool "Sibyte BCM91125C-CRhone"
|
||||
depends on EXPERIMENTAL
|
||||
select BOOT_ELF32
|
||||
select DMA_COHERENT
|
||||
|
@ -706,7 +706,7 @@ config SIBYTE_CRHONE
|
|||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
|
||||
config SNI_RM200_PCI
|
||||
bool "Support for SNI RM200 PCI"
|
||||
bool "SNI RM200 PCI"
|
||||
select ARC
|
||||
select ARC32
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
|
@ -732,7 +732,7 @@ config SNI_RM200_PCI
|
|||
support this machine type.
|
||||
|
||||
config TOSHIBA_JMR3927
|
||||
bool "Support for Toshiba JMR-TX3927 board"
|
||||
bool "Toshiba JMR-TX3927 board"
|
||||
select DMA_NONCOHERENT
|
||||
select HW_HAS_PCI
|
||||
select MIPS_TX3927
|
||||
|
@ -743,7 +743,7 @@ config TOSHIBA_JMR3927
|
|||
select TOSHIBA_BOARDS
|
||||
|
||||
config TOSHIBA_RBTX4927
|
||||
bool "Support for Toshiba TBTX49[23]7 board"
|
||||
bool "Toshiba TBTX49[23]7 board"
|
||||
select DMA_NONCOHERENT
|
||||
select HAS_TXX9_SERIAL
|
||||
select HW_HAS_PCI
|
||||
|
@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927
|
|||
support this machine type
|
||||
|
||||
config TOSHIBA_RBTX4938
|
||||
bool "Support for Toshiba RBTX4938 board"
|
||||
bool "Toshiba RBTX4938 board"
|
||||
select HAVE_STD_PC_SERIAL_PORT
|
||||
select DMA_NONCOHERENT
|
||||
select GENERIC_ISA_DMA
|
||||
|
@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB
|
|||
|
||||
config PAGE_SIZE_16KB
|
||||
bool "16kB"
|
||||
depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
|
||||
depends on !CPU_R3000 && !CPU_TX39XX
|
||||
help
|
||||
Using 16kB page size will result in higher performance kernel at
|
||||
the price of higher memory consumption. This option is available on
|
||||
all non-R3000 family processor. Not that at the time of this
|
||||
writing this option is still high experimental; there are also
|
||||
issues with compatibility of user applications.
|
||||
all non-R3000 family processors. Note that you will need a suitable
|
||||
Linux distribution to support this.
|
||||
|
||||
config PAGE_SIZE_64KB
|
||||
bool "64kB"
|
||||
|
@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB
|
|||
Using 64kB page size will result in higher performance kernel at
|
||||
the price of higher memory consumption. This option is available on
|
||||
all non-R3000 family processor. Not that at the time of this
|
||||
writing this option is still high experimental; there are also
|
||||
issues with compatibility of user applications.
|
||||
writing this option is still high experimental.
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
@ -68,6 +68,7 @@
|
|||
|
||||
extern void set_debug_traps(void);
|
||||
extern irq_cpustat_t irq_stat [NR_CPUS];
|
||||
extern void mips_timer_interrupt(struct pt_regs *regs);
|
||||
|
||||
static void setup_local_irq(unsigned int irq, int type, int int_req);
|
||||
static unsigned int startup_irq(unsigned int irq);
|
||||
|
|
|
@ -1,10 +1,9 @@
|
|||
/*
|
||||
*
|
||||
* BRIEF MODULE DESCRIPTION
|
||||
* PROM library initialisation code, assuming a version of
|
||||
* pmon is the boot code.
|
||||
* PROM library initialisation code, assuming YAMON is the boot loader.
|
||||
*
|
||||
* Copyright 2000,2001 MontaVista Software Inc.
|
||||
* Copyright 2000, 2001, 2006 MontaVista Software Inc.
|
||||
* Author: MontaVista Software, Inc.
|
||||
* ppopov@mvista.com or source@mvista.com
|
||||
*
|
||||
|
@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp;
|
|||
|
||||
typedef struct
|
||||
{
|
||||
char *name;
|
||||
/* char *val; */
|
||||
}t_env_var;
|
||||
char *name;
|
||||
char *val;
|
||||
} t_env_var;
|
||||
|
||||
|
||||
char * prom_getcmdline(void)
|
||||
|
@ -85,21 +84,16 @@ char *prom_getenv(char *envname)
|
|||
{
|
||||
/*
|
||||
* Return a pointer to the given environment variable.
|
||||
* Environment variables are stored in the form of "memsize=64".
|
||||
*/
|
||||
|
||||
t_env_var *env = (t_env_var *)prom_envp;
|
||||
int i;
|
||||
|
||||
i = strlen(envname);
|
||||
|
||||
while(env->name) {
|
||||
if(strncmp(envname, env->name, i) == 0) {
|
||||
return(env->name + strlen(envname) + 1);
|
||||
}
|
||||
while (env->name) {
|
||||
if (strcmp(envname, env->name) == 0)
|
||||
return env->val;
|
||||
env++;
|
||||
}
|
||||
return(NULL);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
inline unsigned char str2hexnum(unsigned char c)
|
||||
|
|
|
@ -112,6 +112,11 @@ sdsleep:
|
|||
mtc0 k0, CP0_PAGEMASK
|
||||
lw k0, 0x14(sp)
|
||||
mtc0 k0, CP0_CONFIG
|
||||
|
||||
/* We need to catch the ealry Alchemy SOCs with
|
||||
* the write-only Config[OD] bit and set it back to one...
|
||||
*/
|
||||
jal au1x00_fixup_config_od
|
||||
lw $1, PT_R1(sp)
|
||||
lw $2, PT_R2(sp)
|
||||
lw $3, PT_R3(sp)
|
||||
|
|
|
@ -116,6 +116,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
|
|||
|
||||
null:
|
||||
ack_r4ktimer(0);
|
||||
irq_exit();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
|
|
@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud)
|
|||
#else
|
||||
/*
|
||||
* Note: Set baud rate, hardcoded here for rate of 115200
|
||||
* since became unsure of above "buad rate" algorithm (??).
|
||||
* since became unsure of above "baud rate" algorithm (??).
|
||||
*/
|
||||
outreg(channel, LCR, 0x83);
|
||||
outreg(channel, DLM, 0x00); // See note above
|
||||
|
|
|
@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -272,8 +272,8 @@ void output_sc_defines(void)
|
|||
text("/* Linux sigcontext offsets. */");
|
||||
offset("#define SC_REGS ", struct sigcontext, sc_regs);
|
||||
offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
|
||||
offset("#define SC_MDHI ", struct sigcontext, sc_hi);
|
||||
offset("#define SC_MDLO ", struct sigcontext, sc_lo);
|
||||
offset("#define SC_MDHI ", struct sigcontext, sc_mdhi);
|
||||
offset("#define SC_MDLO ", struct sigcontext, sc_mdlo);
|
||||
offset("#define SC_PC ", struct sigcontext, sc_pc);
|
||||
offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
|
||||
linefeed;
|
||||
|
|
|
@ -206,7 +206,7 @@ static inline void check_daddi(void)
|
|||
"daddi %0, %1, %3\n\t"
|
||||
".set pop"
|
||||
: "=r" (v), "=&r" (tmp)
|
||||
: "I" (0xffffffffffffdb9a), "I" (0x1234));
|
||||
: "I" (0xffffffffffffdb9aUL), "I" (0x1234));
|
||||
set_except_vector(12, handler);
|
||||
local_irq_restore(flags);
|
||||
|
||||
|
@ -224,7 +224,7 @@ static inline void check_daddi(void)
|
|||
"dsrl %1, %1, 1\n\t"
|
||||
"daddi %0, %1, %3"
|
||||
: "=r" (v), "=&r" (tmp)
|
||||
: "I" (0xffffffffffffdb9a), "I" (0x1234));
|
||||
: "I" (0xffffffffffffdb9aUL), "I" (0x1234));
|
||||
set_except_vector(12, handler);
|
||||
local_irq_restore(flags);
|
||||
|
||||
|
@ -280,7 +280,7 @@ static inline void check_daddiu(void)
|
|||
"daddu %1, %2\n\t"
|
||||
".set pop"
|
||||
: "=&r" (v), "=&r" (w), "=&r" (tmp)
|
||||
: "I" (0xffffffffffffdb9a), "I" (0x1234));
|
||||
: "I" (0xffffffffffffdb9aUL), "I" (0x1234));
|
||||
|
||||
if (v == w) {
|
||||
printk("no.\n");
|
||||
|
@ -296,7 +296,7 @@ static inline void check_daddiu(void)
|
|||
"addiu %1, $0, %4\n\t"
|
||||
"daddu %1, %2"
|
||||
: "=&r" (v), "=&r" (w), "=&r" (tmp)
|
||||
: "I" (0xffffffffffffdb9a), "I" (0x1234));
|
||||
: "I" (0xffffffffffffdb9aUL), "I" (0x1234));
|
||||
|
||||
if (v == w) {
|
||||
printk("yes.\n");
|
||||
|
|
|
@ -121,6 +121,7 @@ static inline void check_wait(void)
|
|||
case CPU_24K:
|
||||
case CPU_25KF:
|
||||
case CPU_34K:
|
||||
case CPU_74K:
|
||||
case CPU_PR4450:
|
||||
cpu_wait = r4k_wait;
|
||||
printk(" available.\n");
|
||||
|
@ -432,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
|
|||
MIPS_CPU_LLSC;
|
||||
c->tlbsize = 64;
|
||||
break;
|
||||
case PRID_IMP_R14000:
|
||||
c->cputype = CPU_R14000;
|
||||
c->isa_level = MIPS_CPU_ISA_IV;
|
||||
c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
|
||||
MIPS_CPU_FPU | MIPS_CPU_32FPR |
|
||||
MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
|
||||
MIPS_CPU_LLSC;
|
||||
c->tlbsize = 64;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -593,6 +603,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
|
|||
case PRID_IMP_34K:
|
||||
c->cputype = CPU_34K;
|
||||
break;
|
||||
case PRID_IMP_74K:
|
||||
c->cputype = CPU_74K;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -642,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
|
|||
case PRID_IMP_SB1:
|
||||
c->cputype = CPU_SB1;
|
||||
/* FPU in pass1 is known to have issues. */
|
||||
if ((c->processor_id & 0xff) < 0x20)
|
||||
if ((c->processor_id & 0xff) < 0x02)
|
||||
c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
|
||||
break;
|
||||
case PRID_IMP_SB1A:
|
||||
|
|
|
@ -101,7 +101,7 @@ FEXPORT(restore_all) # restore full frame
|
|||
EMT
|
||||
1:
|
||||
mfc0 v1, CP0_TCSTATUS
|
||||
/* We set IXMT above, XOR should cler it here */
|
||||
/* We set IXMT above, XOR should clear it here */
|
||||
xori v1, v1, TCSTATUS_IXMT
|
||||
or v1, v0, v1
|
||||
mtc0 v1, CP0_TCSTATUS
|
||||
|
|
|
@ -54,9 +54,11 @@
|
|||
*/
|
||||
mfc0 k0, CP0_CAUSE
|
||||
andi k0, k0, 0x7c
|
||||
add k1, k1, k0
|
||||
PTR_L k0, saved_vectors(k1)
|
||||
jr k0
|
||||
#ifdef CONFIG_64BIT
|
||||
dsll k0, k0, 1
|
||||
#endif
|
||||
PTR_L k1, saved_vectors(k0)
|
||||
jr k1
|
||||
nop
|
||||
1:
|
||||
move k0, sp
|
||||
|
|
|
@ -288,6 +288,9 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
|
|||
sym = (Elf_Sym *)sechdrs[symindex].sh_addr
|
||||
+ ELF_MIPS_R_SYM(rel[i]);
|
||||
if (!sym->st_value) {
|
||||
/* Ignore unresolved weak symbol */
|
||||
if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
|
||||
continue;
|
||||
printk(KERN_WARNING "%s: Unknown symbol %s\n",
|
||||
me->name, strtab + sym->st_name);
|
||||
return -ENOENT;
|
||||
|
@ -325,6 +328,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
|
|||
sym = (Elf_Sym *)sechdrs[symindex].sh_addr
|
||||
+ ELF_MIPS_R_SYM(rel[i]);
|
||||
if (!sym->st_value) {
|
||||
/* Ignore unresolved weak symbol */
|
||||
if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
|
||||
continue;
|
||||
printk(KERN_WARNING "%s: Unknown symbol %s\n",
|
||||
me->name, strtab + sym->st_name);
|
||||
return -ENOENT;
|
||||
|
|
|
@ -42,6 +42,7 @@ static const char *cpu_name[] = {
|
|||
[CPU_R8000] = "R8000",
|
||||
[CPU_R10000] = "R10000",
|
||||
[CPU_R12000] = "R12000",
|
||||
[CPU_R14000] = "R14000",
|
||||
[CPU_R4300] = "R4300",
|
||||
[CPU_R4650] = "R4650",
|
||||
[CPU_R4700] = "R4700",
|
||||
|
@ -74,6 +75,7 @@ static const char *cpu_name[] = {
|
|||
[CPU_24K] = "MIPS 24K",
|
||||
[CPU_25KF] = "MIPS 25Kf",
|
||||
[CPU_34K] = "MIPS 34K",
|
||||
[CPU_74K] = "MIPS 74K",
|
||||
[CPU_VR4111] = "NEC VR4111",
|
||||
[CPU_VR4121] = "NEC VR4121",
|
||||
[CPU_VR4122] = "NEC VR4122",
|
||||
|
|
|
@ -209,7 +209,7 @@ sys_call_table:
|
|||
PTR sys_fork
|
||||
PTR sys_read
|
||||
PTR sys_write
|
||||
PTR sys_open /* 4005 */
|
||||
PTR compat_sys_open /* 4005 */
|
||||
PTR sys_close
|
||||
PTR sys_waitpid
|
||||
PTR sys_creat
|
||||
|
|
|
@ -246,7 +246,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en
|
|||
#ifdef CONFIG_64BIT
|
||||
/* HACK: Guess if the sign extension was forgotten */
|
||||
if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
|
||||
start |= 0xffffffff00000000;
|
||||
start |= 0xffffffff00000000UL;
|
||||
#endif
|
||||
|
||||
end = start + size;
|
||||
|
@ -355,8 +355,6 @@ static inline void bootmem_init(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
memory_present(0, first_usable_pfn, max_low_pfn);
|
||||
|
||||
/* Initialize the boot-time allocator with low memory only. */
|
||||
bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn);
|
||||
|
||||
|
@ -410,6 +408,7 @@ static inline void bootmem_init(void)
|
|||
|
||||
/* Register lowmem ranges */
|
||||
free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
|
||||
memory_present(0, curr_pfn, curr_pfn + size - 1);
|
||||
}
|
||||
|
||||
/* Reserve the bootmap memory. */
|
||||
|
@ -419,17 +418,20 @@ static inline void bootmem_init(void)
|
|||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
initrd_below_start_ok = 1;
|
||||
if (initrd_start) {
|
||||
unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
|
||||
unsigned long initrd_size = ((unsigned char *)initrd_end) -
|
||||
((unsigned char *)initrd_start);
|
||||
const int width = sizeof(long) * 2;
|
||||
|
||||
printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
|
||||
(void *)initrd_start, initrd_size);
|
||||
|
||||
if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
|
||||
printk("initrd extends beyond end of memory "
|
||||
"(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
|
||||
sizeof(long) * 2,
|
||||
(unsigned long long)CPHYSADDR(initrd_end),
|
||||
sizeof(long) * 2,
|
||||
(unsigned long long)PFN_PHYS(max_low_pfn));
|
||||
width,
|
||||
(unsigned long long) CPHYSADDR(initrd_end),
|
||||
width,
|
||||
(unsigned long long) PFN_PHYS(max_low_pfn));
|
||||
initrd_start = initrd_end = 0;
|
||||
initrd_reserve_bootmem = 0;
|
||||
}
|
||||
|
|
|
@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
|
|||
save_gp_reg(31);
|
||||
#undef save_gp_reg
|
||||
|
||||
#ifdef CONFIG_32BIT
|
||||
err |= __put_user(regs->hi, &sc->sc_mdhi);
|
||||
err |= __put_user(regs->lo, &sc->sc_mdlo);
|
||||
if (cpu_has_dsp) {
|
||||
|
@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
|
|||
err |= __put_user(mflo3(), &sc->sc_lo3);
|
||||
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
err |= __put_user(regs->hi, &sc->sc_hi[0]);
|
||||
err |= __put_user(regs->lo, &sc->sc_lo[0]);
|
||||
if (cpu_has_dsp) {
|
||||
err |= __put_user(mfhi1(), &sc->sc_hi[1]);
|
||||
err |= __put_user(mflo1(), &sc->sc_lo[1]);
|
||||
err |= __put_user(mfhi2(), &sc->sc_hi[2]);
|
||||
err |= __put_user(mflo2(), &sc->sc_lo[2]);
|
||||
err |= __put_user(mfhi3(), &sc->sc_hi[3]);
|
||||
err |= __put_user(mflo3(), &sc->sc_lo[3]);
|
||||
err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
|
||||
}
|
||||
#endif
|
||||
|
||||
err |= __put_user(!!used_math(), &sc->sc_used_math);
|
||||
|
||||
|
@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
|
|||
current_thread_info()->restart_block.fn = do_no_restart_syscall;
|
||||
|
||||
err |= __get_user(regs->cp0_epc, &sc->sc_pc);
|
||||
#ifdef CONFIG_32BIT
|
||||
err |= __get_user(regs->hi, &sc->sc_mdhi);
|
||||
err |= __get_user(regs->lo, &sc->sc_mdlo);
|
||||
if (cpu_has_dsp) {
|
||||
|
@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
|
|||
err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
|
||||
err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_64BIT
|
||||
err |= __get_user(regs->hi, &sc->sc_hi[0]);
|
||||
err |= __get_user(regs->lo, &sc->sc_lo[0]);
|
||||
if (cpu_has_dsp) {
|
||||
err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
|
||||
err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
|
||||
err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
|
||||
err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
|
||||
err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
|
||||
err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
|
||||
err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define restore_gp_reg(i) do { \
|
||||
err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
|
||||
|
|
|
@ -247,6 +247,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
|
|||
current_thread_info()->cpu = 0;
|
||||
smp_tune_scheduling();
|
||||
plat_prepare_cpus(max_cpus);
|
||||
#ifndef CONFIG_HOTPLUG_CPU
|
||||
cpu_present_map = cpu_possible_map;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* preload SMP state for boot cpu */
|
||||
|
@ -442,7 +445,7 @@ static int __init topology_init(void)
|
|||
int cpu;
|
||||
int ret;
|
||||
|
||||
for_each_cpu(cpu) {
|
||||
for_each_present_cpu(cpu) {
|
||||
ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
|
||||
if (ret)
|
||||
printk(KERN_WARNING "topology_init: register_cpu %d "
|
||||
|
|
|
@ -276,31 +276,9 @@ void sys_set_thread_area(unsigned long addr)
|
|||
|
||||
asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
|
||||
{
|
||||
int tmp, len;
|
||||
char __user *name;
|
||||
int tmp;
|
||||
|
||||
switch(cmd) {
|
||||
case SETNAME: {
|
||||
char nodename[__NEW_UTS_LEN + 1];
|
||||
|
||||
if (!capable(CAP_SYS_ADMIN))
|
||||
return -EPERM;
|
||||
|
||||
name = (char __user *) arg1;
|
||||
|
||||
len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
|
||||
if (len < 0)
|
||||
return -EFAULT;
|
||||
|
||||
down_write(&uts_sem);
|
||||
strncpy(system_utsname.nodename, nodename, len);
|
||||
nodename[__NEW_UTS_LEN] = '\0';
|
||||
strlcpy(system_utsname.nodename, nodename,
|
||||
sizeof(system_utsname.nodename));
|
||||
up_write(&uts_sem);
|
||||
return 0;
|
||||
}
|
||||
|
||||
case MIPS_ATOMIC_SET:
|
||||
printk(KERN_CRIT "How did I get here?\n");
|
||||
return -EINVAL;
|
||||
|
@ -313,9 +291,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
|
|||
case FLUSH_CACHE:
|
||||
__flush_cache_all();
|
||||
return 0;
|
||||
|
||||
case MIPS_RDNVRAM:
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
|
|
|
@ -819,15 +819,30 @@ asmlinkage void do_watch(struct pt_regs *regs)
|
|||
|
||||
asmlinkage void do_mcheck(struct pt_regs *regs)
|
||||
{
|
||||
const int field = 2 * sizeof(unsigned long);
|
||||
int multi_match = regs->cp0_status & ST0_TS;
|
||||
|
||||
show_regs(regs);
|
||||
dump_tlb_all();
|
||||
|
||||
if (multi_match) {
|
||||
printk("Index : %0x\n", read_c0_index());
|
||||
printk("Pagemask: %0x\n", read_c0_pagemask());
|
||||
printk("EntryHi : %0*lx\n", field, read_c0_entryhi());
|
||||
printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
|
||||
printk("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
|
||||
printk("\n");
|
||||
dump_tlb_all();
|
||||
}
|
||||
|
||||
show_code((unsigned int *) regs->cp0_epc);
|
||||
|
||||
/*
|
||||
* Some chips may have other causes of machine check (e.g. SB1
|
||||
* graduation timer)
|
||||
*/
|
||||
panic("Caught Machine Check exception - %scaused by multiple "
|
||||
"matching entries in the TLB.",
|
||||
(regs->cp0_status & ST0_TS) ? "" : "not ");
|
||||
(multi_match) ? "" : "not ");
|
||||
}
|
||||
|
||||
asmlinkage void do_mt(struct pt_regs *regs)
|
||||
|
@ -902,6 +917,7 @@ static inline void parity_protection_init(void)
|
|||
{
|
||||
switch (current_cpu_data.cputype) {
|
||||
case CPU_24K:
|
||||
case CPU_34K:
|
||||
case CPU_5KC:
|
||||
write_c0_ecc(0x80000000);
|
||||
back_to_back_c0_hazard();
|
||||
|
|
|
@ -151,23 +151,13 @@ SECTIONS
|
|||
|
||||
/* This is the MIPS specific mdebug section. */
|
||||
.mdebug : { *(.mdebug) }
|
||||
/* These are needed for ELF backends which have not yet been
|
||||
converted to the new style linker. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the .debug DWARF section are relative to the beginning of the
|
||||
section so we begin .debug at 0. It's not clear yet what needs to happen
|
||||
for the others. */
|
||||
.debug 0 : { *(.debug) }
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
STABS_DEBUG
|
||||
|
||||
DWARF_DEBUG
|
||||
|
||||
/* These must appear regardless of . */
|
||||
.gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
|
||||
.gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
|
||||
.comment : { *(.comment) }
|
||||
.note : { *(.note) }
|
||||
}
|
||||
|
|
|
@ -29,7 +29,9 @@
|
|||
|
||||
ieee754dp ieee754dp_fint(int x)
|
||||
{
|
||||
COMPXDP;
|
||||
u64 xm;
|
||||
int xe;
|
||||
int xs;
|
||||
|
||||
CLEARCX;
|
||||
|
||||
|
|
|
@ -29,7 +29,9 @@
|
|||
|
||||
ieee754dp ieee754dp_flong(s64 x)
|
||||
{
|
||||
COMPXDP;
|
||||
u64 xm;
|
||||
int xe;
|
||||
int xs;
|
||||
|
||||
CLEARCX;
|
||||
|
||||
|
|
|
@ -29,7 +29,9 @@
|
|||
|
||||
ieee754sp ieee754sp_fint(int x)
|
||||
{
|
||||
COMPXSP;
|
||||
unsigned xm;
|
||||
int xe;
|
||||
int xs;
|
||||
|
||||
CLEARCX;
|
||||
|
||||
|
|
|
@ -29,7 +29,9 @@
|
|||
|
||||
ieee754sp ieee754sp_flong(s64 x)
|
||||
{
|
||||
COMPXDP; /* <--- need 64-bit mantissa temp */
|
||||
u64 xm; /* <--- need 64-bit mantissa temp */
|
||||
int xe;
|
||||
int xs;
|
||||
|
||||
CLEARCX;
|
||||
|
||||
|
|
|
@ -29,6 +29,27 @@
|
|||
#include <asm/war.h>
|
||||
#include <asm/cacheflush.h> /* for run_uncached() */
|
||||
|
||||
|
||||
/*
|
||||
* Special Variant of smp_call_function for use by cache functions:
|
||||
*
|
||||
* o No return value
|
||||
* o collapses to normal function call on UP kernels
|
||||
* o collapses to normal function call on systems with a single shared
|
||||
* primary cache.
|
||||
*/
|
||||
static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
|
||||
int retry, int wait)
|
||||
{
|
||||
preempt_disable();
|
||||
|
||||
#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
|
||||
smp_call_function(func, info, retry, wait);
|
||||
#endif
|
||||
func(info);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
/*
|
||||
* Must die.
|
||||
*/
|
||||
|
@ -299,7 +320,7 @@ static void r4k_flush_cache_all(void)
|
|||
if (!cpu_has_dc_aliases)
|
||||
return;
|
||||
|
||||
on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
|
||||
}
|
||||
|
||||
static inline void local_r4k___flush_cache_all(void * args)
|
||||
|
@ -314,13 +335,14 @@ static inline void local_r4k___flush_cache_all(void * args)
|
|||
case CPU_R4400MC:
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
r4k_blast_scache();
|
||||
}
|
||||
}
|
||||
|
||||
static void r4k___flush_cache_all(void)
|
||||
{
|
||||
on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
|
||||
}
|
||||
|
||||
static inline void local_r4k_flush_cache_range(void * args)
|
||||
|
@ -341,7 +363,7 @@ static inline void local_r4k_flush_cache_range(void * args)
|
|||
static void r4k_flush_cache_range(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
|
||||
}
|
||||
|
||||
static inline void local_r4k_flush_cache_mm(void * args)
|
||||
|
@ -370,7 +392,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
|
|||
if (!cpu_has_dc_aliases)
|
||||
return;
|
||||
|
||||
on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
|
||||
}
|
||||
|
||||
struct flush_cache_page_args {
|
||||
|
@ -461,7 +483,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
|
|||
args.addr = addr;
|
||||
args.pfn = pfn;
|
||||
|
||||
on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
|
||||
}
|
||||
|
||||
static inline void local_r4k_flush_data_cache_page(void * addr)
|
||||
|
@ -471,7 +493,7 @@ static inline void local_r4k_flush_data_cache_page(void * addr)
|
|||
|
||||
static void r4k_flush_data_cache_page(unsigned long addr)
|
||||
{
|
||||
on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
|
||||
}
|
||||
|
||||
struct flush_icache_range_args {
|
||||
|
@ -514,7 +536,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
|
|||
args.start = start;
|
||||
args.end = end;
|
||||
|
||||
on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
|
||||
instruction_hazard();
|
||||
}
|
||||
|
||||
|
@ -590,7 +612,7 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma,
|
|||
args.vma = vma;
|
||||
args.page = page;
|
||||
|
||||
on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
|
||||
}
|
||||
|
||||
|
||||
|
@ -689,7 +711,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
|
|||
|
||||
static void r4k_flush_cache_sigtramp(unsigned long addr)
|
||||
{
|
||||
on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
|
||||
r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
|
||||
}
|
||||
|
||||
static void r4k_flush_icache_all(void)
|
||||
|
@ -812,6 +834,7 @@ static void __init probe_pcache(void)
|
|||
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
|
||||
c->icache.linesz = 64;
|
||||
c->icache.ways = 2;
|
||||
|
@ -965,9 +988,11 @@ static void __init probe_pcache(void)
|
|||
c->dcache.flags |= MIPS_CACHE_PINDEX;
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
case CPU_SB1:
|
||||
break;
|
||||
case CPU_24K:
|
||||
case CPU_34K:
|
||||
if (!(read_c0_config7() & (1 << 16)))
|
||||
default:
|
||||
if (c->dcache.waysize > PAGE_SIZE)
|
||||
|
@ -1091,6 +1116,7 @@ static void __init setup_scache(void)
|
|||
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
|
||||
c->scache.linesz = 64 << ((config >> 13) & 1);
|
||||
c->scache.ways = 2;
|
||||
|
@ -1135,6 +1161,31 @@ static void __init setup_scache(void)
|
|||
c->options |= MIPS_CPU_SUBSET_CACHES;
|
||||
}
|
||||
|
||||
void au1x00_fixup_config_od(void)
|
||||
{
|
||||
/*
|
||||
* c0_config.od (bit 19) was write only (and read as 0)
|
||||
* on the early revisions of Alchemy SOCs. It disables the bus
|
||||
* transaction overlapping and needs to be set to fix various errata.
|
||||
*/
|
||||
switch (read_c0_prid()) {
|
||||
case 0x00030100: /* Au1000 DA */
|
||||
case 0x00030201: /* Au1000 HA */
|
||||
case 0x00030202: /* Au1000 HB */
|
||||
case 0x01030200: /* Au1500 AB */
|
||||
/*
|
||||
* Au1100 errata actually keeps silence about this bit, so we set it
|
||||
* just in case for those revisions that require it to be set according
|
||||
* to arch/mips/au1000/common/cputable.c
|
||||
*/
|
||||
case 0x02030200: /* Au1100 AB */
|
||||
case 0x02030201: /* Au1100 BA */
|
||||
case 0x02030202: /* Au1100 BC */
|
||||
set_c0_config(1 << 19);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void coherency_setup(void)
|
||||
{
|
||||
change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
|
||||
|
@ -1155,6 +1206,15 @@ static inline void coherency_setup(void)
|
|||
case CPU_R4400MC:
|
||||
clear_c0_config(CONF_CU);
|
||||
break;
|
||||
/*
|
||||
* We need to catch the ealry Alchemy SOCs with
|
||||
* the write-only co_config.od bit and set it back to one...
|
||||
*/
|
||||
case CPU_AU1000: /* rev. DA, HA, HB */
|
||||
case CPU_AU1100: /* rev. AB, BA, BC ?? */
|
||||
case CPU_AU1500: /* rev. AB */
|
||||
au1x00_fixup_config_od();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -227,7 +227,7 @@ void __init mem_init(void)
|
|||
for (tmp = 0; tmp < max_low_pfn; tmp++)
|
||||
if (page_is_ram(tmp)) {
|
||||
ram++;
|
||||
if (PageReserved(mem_map+tmp))
|
||||
if (PageReserved(pfn_to_page(tmp)))
|
||||
reservedpages++;
|
||||
}
|
||||
|
||||
|
|
|
@ -357,6 +357,7 @@ void __init build_clear_page(void)
|
|||
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
pref_src_mode = Pref_LoadStreamed;
|
||||
pref_dst_mode = Pref_StoreStreamed;
|
||||
break;
|
||||
|
|
|
@ -875,6 +875,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
|
|||
|
||||
case CPU_R10000:
|
||||
case CPU_R12000:
|
||||
case CPU_R14000:
|
||||
case CPU_4KC:
|
||||
case CPU_SB1:
|
||||
case CPU_SB1A:
|
||||
|
@ -906,6 +907,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
|
|||
case CPU_4KEC:
|
||||
case CPU_24K:
|
||||
case CPU_34K:
|
||||
case CPU_74K:
|
||||
i_ehb(p);
|
||||
tlbw(p);
|
||||
break;
|
||||
|
|
|
@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
|
|||
/* disable interrupts */
|
||||
UART16550_WRITE(OFS_INTR_ENABLE, 0);
|
||||
|
||||
/* set up buad rate */
|
||||
/* set up baud rate */
|
||||
{
|
||||
uint32 divisor;
|
||||
|
||||
|
|
|
@ -14,8 +14,8 @@
|
|||
|
||||
#include "op_impl.h"
|
||||
|
||||
extern struct op_mips_model op_model_mipsxx __attribute__((weak));
|
||||
extern struct op_mips_model op_model_rm9000 __attribute__((weak));
|
||||
extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
|
||||
extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
|
||||
|
||||
static struct op_mips_model *model;
|
||||
|
||||
|
@ -80,13 +80,14 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
|
|||
case CPU_24K:
|
||||
case CPU_25KF:
|
||||
case CPU_34K:
|
||||
case CPU_74K:
|
||||
case CPU_SB1:
|
||||
case CPU_SB1A:
|
||||
lmodel = &op_model_mipsxx;
|
||||
lmodel = &op_model_mipsxx_ops;
|
||||
break;
|
||||
|
||||
case CPU_RM9000:
|
||||
lmodel = &op_model_rm9000;
|
||||
lmodel = &op_model_rm9000_ops;
|
||||
break;
|
||||
};
|
||||
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
|
||||
#define M_COUNTER_OVERFLOW (1UL << 31)
|
||||
|
||||
struct op_mips_model op_model_mipsxx;
|
||||
struct op_mips_model op_model_mipsxx_ops;
|
||||
|
||||
static struct mipsxx_register_config {
|
||||
unsigned int control[4];
|
||||
|
@ -34,7 +34,7 @@ static struct mipsxx_register_config {
|
|||
|
||||
static void mipsxx_reg_setup(struct op_counter_config *ctr)
|
||||
{
|
||||
unsigned int counters = op_model_mipsxx.num_counters;
|
||||
unsigned int counters = op_model_mipsxx_ops.num_counters;
|
||||
int i;
|
||||
|
||||
/* Compute the performance counter control word. */
|
||||
|
@ -62,7 +62,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
|
|||
|
||||
static void mipsxx_cpu_setup (void *args)
|
||||
{
|
||||
unsigned int counters = op_model_mipsxx.num_counters;
|
||||
unsigned int counters = op_model_mipsxx_ops.num_counters;
|
||||
|
||||
switch (counters) {
|
||||
case 4:
|
||||
|
@ -83,7 +83,7 @@ static void mipsxx_cpu_setup (void *args)
|
|||
/* Start all counters on current CPU */
|
||||
static void mipsxx_cpu_start(void *args)
|
||||
{
|
||||
unsigned int counters = op_model_mipsxx.num_counters;
|
||||
unsigned int counters = op_model_mipsxx_ops.num_counters;
|
||||
|
||||
switch (counters) {
|
||||
case 4:
|
||||
|
@ -100,7 +100,7 @@ static void mipsxx_cpu_start(void *args)
|
|||
/* Stop all counters on current CPU */
|
||||
static void mipsxx_cpu_stop(void *args)
|
||||
{
|
||||
unsigned int counters = op_model_mipsxx.num_counters;
|
||||
unsigned int counters = op_model_mipsxx_ops.num_counters;
|
||||
|
||||
switch (counters) {
|
||||
case 4:
|
||||
|
@ -116,7 +116,7 @@ static void mipsxx_cpu_stop(void *args)
|
|||
|
||||
static int mipsxx_perfcount_handler(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int counters = op_model_mipsxx.num_counters;
|
||||
unsigned int counters = op_model_mipsxx_ops.num_counters;
|
||||
unsigned int control;
|
||||
unsigned int counter;
|
||||
int handled = 0;
|
||||
|
@ -187,33 +187,37 @@ static int __init mipsxx_init(void)
|
|||
|
||||
reset_counters(counters);
|
||||
|
||||
op_model_mipsxx.num_counters = counters;
|
||||
op_model_mipsxx_ops.num_counters = counters;
|
||||
switch (current_cpu_data.cputype) {
|
||||
case CPU_20KC:
|
||||
op_model_mipsxx.cpu_type = "mips/20K";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/20K";
|
||||
break;
|
||||
|
||||
case CPU_24K:
|
||||
op_model_mipsxx.cpu_type = "mips/24K";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/24K";
|
||||
break;
|
||||
|
||||
case CPU_25KF:
|
||||
op_model_mipsxx.cpu_type = "mips/25K";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/25K";
|
||||
break;
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
case CPU_34K:
|
||||
op_model_mipsxx.cpu_type = "mips/34K";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/34K";
|
||||
break;
|
||||
|
||||
case CPU_74K:
|
||||
op_model_mipsxx_ops.cpu_type = "mips/74K";
|
||||
break;
|
||||
#endif
|
||||
|
||||
case CPU_5KC:
|
||||
op_model_mipsxx.cpu_type = "mips/5K";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/5K";
|
||||
break;
|
||||
|
||||
case CPU_SB1:
|
||||
case CPU_SB1A:
|
||||
op_model_mipsxx.cpu_type = "mips/sb1";
|
||||
op_model_mipsxx_ops.cpu_type = "mips/sb1";
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -229,12 +233,12 @@ static int __init mipsxx_init(void)
|
|||
|
||||
static void mipsxx_exit(void)
|
||||
{
|
||||
reset_counters(op_model_mipsxx.num_counters);
|
||||
reset_counters(op_model_mipsxx_ops.num_counters);
|
||||
|
||||
perf_irq = null_perf_irq;
|
||||
}
|
||||
|
||||
struct op_mips_model op_model_mipsxx = {
|
||||
struct op_mips_model op_model_mipsxx_ops = {
|
||||
.reg_setup = mipsxx_reg_setup,
|
||||
.cpu_setup = mipsxx_cpu_setup,
|
||||
.init = mipsxx_init,
|
||||
|
|
|
@ -126,7 +126,7 @@ static void rm9000_exit(void)
|
|||
free_irq(rm9000_perfcount_irq, NULL);
|
||||
}
|
||||
|
||||
struct op_mips_model op_model_rm9000 = {
|
||||
struct op_mips_model op_model_rm9000_ops = {
|
||||
.reg_setup = rm9000_reg_setup,
|
||||
.cpu_setup = rm9000_cpu_setup,
|
||||
.init = rm9000_init,
|
||||
|
|
|
@ -31,12 +31,12 @@
|
|||
/* issue a PIO read to make sure no PIO writes are pending */
|
||||
static void inline flush_crime_bus(void)
|
||||
{
|
||||
volatile unsigned long junk = crime->control;
|
||||
crime->control;
|
||||
}
|
||||
|
||||
static void inline flush_mace_bus(void)
|
||||
{
|
||||
volatile unsigned long junk = mace->perif.ctrl.misc;
|
||||
mace->perif.ctrl.misc;
|
||||
}
|
||||
|
||||
#undef DEBUG_IRQ
|
||||
|
|
|
@ -1157,6 +1157,7 @@ EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
|
|||
/* some quirks for platform function decoding */
|
||||
enum {
|
||||
pmac_i2c_quirk_invmask = 0x00000001u,
|
||||
pmac_i2c_quirk_skip = 0x00000002u,
|
||||
};
|
||||
|
||||
static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
|
||||
|
@ -1172,6 +1173,15 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
|
|||
/* XXX Study device-tree's & apple drivers are get the quirks
|
||||
* right !
|
||||
*/
|
||||
/* Workaround: It seems that running the clockspreading
|
||||
* properties on the eMac will cause lockups during boot.
|
||||
* The machine seems to work fine without that. So for now,
|
||||
* let's make sure i2c-hwclock doesn't match about "imic"
|
||||
* clocks and we'll figure out if we really need to do
|
||||
* something special about those later.
|
||||
*/
|
||||
{ "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
|
||||
{ "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
|
||||
{ "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
|
||||
{ "i2c-cpu-voltage", NULL, 0},
|
||||
{ "temp-monitor", NULL, 0 },
|
||||
|
@ -1198,6 +1208,8 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
|
|||
if (p->compatible &&
|
||||
!device_is_compatible(np, p->compatible))
|
||||
continue;
|
||||
if (p->quirks & pmac_i2c_quirk_skip)
|
||||
break;
|
||||
callback(np, p->quirks);
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
|
||||
#include <asm/semaphore.h>
|
||||
#include <asm/prom.h>
|
||||
|
@ -546,6 +547,7 @@ struct pmf_device {
|
|||
|
||||
static LIST_HEAD(pmf_devices);
|
||||
static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED;
|
||||
static DEFINE_MUTEX(pmf_irq_mutex);
|
||||
|
||||
static void pmf_release_device(struct kref *kref)
|
||||
{
|
||||
|
@ -864,15 +866,17 @@ int pmf_register_irq_client(struct device_node *target,
|
|||
|
||||
spin_lock_irqsave(&pmf_lock, flags);
|
||||
func = __pmf_find_function(target, name, PMF_FLAGS_INT_GEN);
|
||||
if (func == NULL) {
|
||||
spin_unlock_irqrestore(&pmf_lock, flags);
|
||||
if (func)
|
||||
func = pmf_get_function(func);
|
||||
spin_unlock_irqrestore(&pmf_lock, flags);
|
||||
if (func == NULL)
|
||||
return -ENODEV;
|
||||
}
|
||||
mutex_lock(&pmf_irq_mutex);
|
||||
if (list_empty(&func->irq_clients))
|
||||
func->dev->handlers->irq_enable(func);
|
||||
list_add(&client->link, &func->irq_clients);
|
||||
client->func = func;
|
||||
spin_unlock_irqrestore(&pmf_lock, flags);
|
||||
mutex_unlock(&pmf_irq_mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -881,16 +885,16 @@ EXPORT_SYMBOL_GPL(pmf_register_irq_client);
|
|||
void pmf_unregister_irq_client(struct pmf_irq_client *client)
|
||||
{
|
||||
struct pmf_function *func = client->func;
|
||||
unsigned long flags;
|
||||
|
||||
BUG_ON(func == NULL);
|
||||
|
||||
spin_lock_irqsave(&pmf_lock, flags);
|
||||
mutex_lock(&pmf_irq_mutex);
|
||||
client->func = NULL;
|
||||
list_del(&client->link);
|
||||
if (list_empty(&func->irq_clients))
|
||||
func->dev->handlers->irq_disable(func);
|
||||
spin_unlock_irqrestore(&pmf_lock, flags);
|
||||
mutex_unlock(&pmf_irq_mutex);
|
||||
pmf_put_function(func);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pmf_unregister_irq_client);
|
||||
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <linux/config.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/threads.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/asi.h>
|
||||
#include <asm/pstate.h>
|
||||
|
@ -493,6 +494,35 @@ tlb_fixup_done:
|
|||
call prom_init
|
||||
mov %l7, %o0 ! OpenPROM cif handler
|
||||
|
||||
/* Initialize current_thread_info()->cpu as early as possible.
|
||||
* In order to do that accurately we have to patch up the get_cpuid()
|
||||
* assembler sequences. And that, in turn, requires that we know
|
||||
* if we are on a Starfire box or not. While we're here, patch up
|
||||
* the sun4v sequences as well.
|
||||
*/
|
||||
call check_if_starfire
|
||||
nop
|
||||
call per_cpu_patch
|
||||
nop
|
||||
call sun4v_patch
|
||||
nop
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
call hard_smp_processor_id
|
||||
nop
|
||||
cmp %o0, NR_CPUS
|
||||
blu,pt %xcc, 1f
|
||||
nop
|
||||
call boot_cpu_id_too_large
|
||||
nop
|
||||
/* Not reached... */
|
||||
|
||||
1:
|
||||
#else
|
||||
mov 0, %o0
|
||||
#endif
|
||||
stb %o0, [%g6 + TI_CPU]
|
||||
|
||||
/* Off we go.... */
|
||||
call start_kernel
|
||||
nop
|
||||
|
|
|
@ -220,7 +220,7 @@ char reboot_command[COMMAND_LINE_SIZE];
|
|||
|
||||
static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
|
||||
|
||||
static void __init per_cpu_patch(void)
|
||||
void __init per_cpu_patch(void)
|
||||
{
|
||||
struct cpuid_patch_entry *p;
|
||||
unsigned long ver;
|
||||
|
@ -280,7 +280,7 @@ static void __init per_cpu_patch(void)
|
|||
}
|
||||
}
|
||||
|
||||
static void __init sun4v_patch(void)
|
||||
void __init sun4v_patch(void)
|
||||
{
|
||||
struct sun4v_1insn_patch_entry *p1;
|
||||
struct sun4v_2insn_patch_entry *p2;
|
||||
|
@ -315,6 +315,15 @@ static void __init sun4v_patch(void)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void __init boot_cpu_id_too_large(int cpu)
|
||||
{
|
||||
prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
|
||||
cpu, NR_CPUS);
|
||||
prom_halt();
|
||||
}
|
||||
#endif
|
||||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
/* Initialize PROM console and command line. */
|
||||
|
@ -332,16 +341,6 @@ void __init setup_arch(char **cmdline_p)
|
|||
conswitchp = &prom_con;
|
||||
#endif
|
||||
|
||||
/* Work out if we are starfire early on */
|
||||
check_if_starfire();
|
||||
|
||||
/* Now we know enough to patch the get_cpuid sequences
|
||||
* used by trap code.
|
||||
*/
|
||||
per_cpu_patch();
|
||||
|
||||
sun4v_patch();
|
||||
|
||||
boot_flags_init(*cmdline_p);
|
||||
|
||||
idprom_init();
|
||||
|
|
|
@ -1264,7 +1264,6 @@ void __init smp_tick_init(void)
|
|||
boot_cpu_id = hard_smp_processor_id();
|
||||
current_tick_offset = timer_tick_offset;
|
||||
|
||||
cpu_set(boot_cpu_id, cpu_online_map);
|
||||
prof_counter(boot_cpu_id) = prof_multiplier(boot_cpu_id) = 1;
|
||||
}
|
||||
|
||||
|
@ -1345,18 +1344,6 @@ void __init smp_setup_cpu_possible_map(void)
|
|||
|
||||
void __devinit smp_prepare_boot_cpu(void)
|
||||
{
|
||||
int cpu = hard_smp_processor_id();
|
||||
|
||||
if (cpu >= NR_CPUS) {
|
||||
prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
|
||||
prom_halt();
|
||||
}
|
||||
|
||||
current_thread_info()->cpu = cpu;
|
||||
__local_per_cpu_offset = __per_cpu_offset(cpu);
|
||||
|
||||
cpu_set(smp_processor_id(), cpu_online_map);
|
||||
cpu_set(smp_processor_id(), phys_cpu_present_map);
|
||||
}
|
||||
|
||||
int __devinit __cpu_up(unsigned int cpu)
|
||||
|
@ -1433,4 +1420,7 @@ void __init setup_per_cpu_areas(void)
|
|||
|
||||
for (i = 0; i < NR_CPUS; i++, ptr += size)
|
||||
memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
|
||||
|
||||
/* Setup %g5 for the boot cpu. */
|
||||
__local_per_cpu_offset = __per_cpu_offset(smp_processor_id());
|
||||
}
|
||||
|
|
|
@ -165,8 +165,9 @@ csum_partial_end_cruft:
|
|||
sll %g1, 8, %g1
|
||||
or %o5, %g1, %o4
|
||||
|
||||
1: add %o2, %o4, %o2
|
||||
1: addcc %o2, %o4, %o2
|
||||
addc %g0, %o2, %o2
|
||||
|
||||
csum_partial_finish:
|
||||
retl
|
||||
mov %o2, %o0
|
||||
srl %o2, 0, %o0
|
||||
|
|
|
@ -221,11 +221,12 @@ FUNC_NAME: /* %o0=src, %o1=dst, %o2=len, %o3=sum */
|
|||
sll %g1, 8, %g1
|
||||
or %o5, %g1, %o4
|
||||
|
||||
1: add %o3, %o4, %o3
|
||||
1: addcc %o3, %o4, %o3
|
||||
addc %g0, %o3, %o3
|
||||
|
||||
70:
|
||||
retl
|
||||
mov %o3, %o0
|
||||
srl %o3, 0, %o0
|
||||
|
||||
95: mov 0, GLOBAL_SPARE
|
||||
brlez,pn %o2, 4f
|
||||
|
|
|
@ -33,5 +33,9 @@ include $(srctree)/arch/i386/Makefile.cpu
|
|||
# prevent gcc from keeping the stack 16 byte aligned. Taken from i386.
|
||||
cflags-y += $(call cc-option,-mpreferred-stack-boundary=2)
|
||||
|
||||
# Prevent sprintf in nfsd from being converted to strcpy and resulting in
|
||||
# an unresolved reference.
|
||||
cflags-y += -ffreestanding
|
||||
|
||||
CFLAGS += $(cflags-y)
|
||||
USER_CFLAGS += $(cflags-y)
|
||||
|
|
|
@ -120,20 +120,11 @@ extern int is_syscall(unsigned long addr);
|
|||
extern void free_irq(unsigned int, void *);
|
||||
extern int cpu(void);
|
||||
|
||||
extern void time_init_kern(void);
|
||||
|
||||
/* Are we disallowed to sleep? Used to choose between GFP_KERNEL and GFP_ATOMIC. */
|
||||
extern int __cant_sleep(void);
|
||||
extern void segv_handler(int sig, union uml_pt_regs *regs);
|
||||
extern void sigio_handler(int sig, union uml_pt_regs *regs);
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-file-style: "linux"
|
||||
* End:
|
||||
*/
|
||||
|
|
|
@ -84,6 +84,16 @@ void timer_irq(union uml_pt_regs *regs)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
void time_init_kern(void)
|
||||
{
|
||||
unsigned long long nsecs;
|
||||
|
||||
nsecs = os_nsecs();
|
||||
set_normalized_timespec(&wall_to_monotonic, -nsecs / BILLION,
|
||||
-nsecs % BILLION);
|
||||
}
|
||||
|
||||
void do_boot_timer_handler(struct sigcontext * sc)
|
||||
{
|
||||
struct pt_regs regs;
|
||||
|
|
|
@ -59,7 +59,7 @@ static __init void do_uml_initcalls(void)
|
|||
initcall_t *call;
|
||||
|
||||
call = &__uml_initcall_start;
|
||||
while (call < &__uml_initcall_end){;
|
||||
while (call < &__uml_initcall_end){
|
||||
(*call)();
|
||||
call++;
|
||||
}
|
||||
|
|
|
@ -81,20 +81,12 @@ void uml_idle_timer(void)
|
|||
set_interval(ITIMER_REAL);
|
||||
}
|
||||
|
||||
extern void ktime_get_ts(struct timespec *ts);
|
||||
#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
|
||||
|
||||
void time_init(void)
|
||||
{
|
||||
struct timespec now;
|
||||
|
||||
if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR)
|
||||
panic("Couldn't set SIGVTALRM handler");
|
||||
set_interval(ITIMER_VIRTUAL);
|
||||
|
||||
do_posix_clock_monotonic_gettime(&now);
|
||||
wall_to_monotonic.tv_sec = -now.tv_sec;
|
||||
wall_to_monotonic.tv_nsec = -now.tv_nsec;
|
||||
time_init_kern();
|
||||
}
|
||||
|
||||
unsigned long long os_nsecs(void)
|
||||
|
|
|
@ -99,11 +99,12 @@ long sys_ipc (uint call, int first, int second,
|
|||
|
||||
switch (call) {
|
||||
case SEMOP:
|
||||
return sys_semtimedop(first, (struct sembuf *) ptr, second,
|
||||
NULL);
|
||||
return sys_semtimedop(first, (struct sembuf __user *) ptr,
|
||||
second, NULL);
|
||||
case SEMTIMEDOP:
|
||||
return sys_semtimedop(first, (struct sembuf *) ptr, second,
|
||||
(const struct timespec *) fifth);
|
||||
return sys_semtimedop(first, (struct sembuf __user *) ptr,
|
||||
second,
|
||||
(const struct timespec __user *) fifth);
|
||||
case SEMGET:
|
||||
return sys_semget (first, second, third);
|
||||
case SEMCTL: {
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
#include "skas.h"
|
||||
|
||||
static int copy_sc_from_user_skas(struct pt_regs *regs,
|
||||
struct sigcontext *from)
|
||||
struct sigcontext __user *from)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
|
@ -54,7 +54,8 @@ static int copy_sc_from_user_skas(struct pt_regs *regs,
|
|||
return(err);
|
||||
}
|
||||
|
||||
int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp,
|
||||
int copy_sc_to_user_skas(struct sigcontext __user *to,
|
||||
struct _fpstate __user *to_fp,
|
||||
struct pt_regs *regs, unsigned long mask,
|
||||
unsigned long sp)
|
||||
{
|
||||
|
@ -106,10 +107,11 @@ int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp,
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_MODE_TT
|
||||
int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
|
||||
int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext __user *from,
|
||||
int fpsize)
|
||||
{
|
||||
struct _fpstate *to_fp, *from_fp;
|
||||
struct _fpstate *to_fp;
|
||||
struct _fpstate __user *from_fp;
|
||||
unsigned long sigs;
|
||||
int err;
|
||||
|
||||
|
@ -124,13 +126,14 @@ int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
|
|||
return(err);
|
||||
}
|
||||
|
||||
int copy_sc_to_user_tt(struct sigcontext *to, struct _fpstate *fp,
|
||||
int copy_sc_to_user_tt(struct sigcontext __user *to, struct _fpstate __user *fp,
|
||||
struct sigcontext *from, int fpsize, unsigned long sp)
|
||||
{
|
||||
struct _fpstate *to_fp, *from_fp;
|
||||
struct _fpstate __user *to_fp;
|
||||
struct _fpstate *from_fp;
|
||||
int err;
|
||||
|
||||
to_fp = (fp ? fp : (struct _fpstate *) (to + 1));
|
||||
to_fp = (fp ? fp : (struct _fpstate __user *) (to + 1));
|
||||
from_fp = from->fpstate;
|
||||
err = copy_to_user(to, from, sizeof(*to));
|
||||
/* The SP in the sigcontext is the updated one for the signal
|
||||
|
@ -158,7 +161,8 @@ static int copy_sc_from_user(struct pt_regs *to, void __user *from)
|
|||
return(ret);
|
||||
}
|
||||
|
||||
static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp,
|
||||
static int copy_sc_to_user(struct sigcontext __user *to,
|
||||
struct _fpstate __user *fp,
|
||||
struct pt_regs *from, unsigned long mask,
|
||||
unsigned long sp)
|
||||
{
|
||||
|
@ -169,7 +173,7 @@ static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp,
|
|||
|
||||
struct rt_sigframe
|
||||
{
|
||||
char *pretcode;
|
||||
char __user *pretcode;
|
||||
struct ucontext uc;
|
||||
struct siginfo info;
|
||||
};
|
||||
|
@ -188,7 +192,7 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,
|
|||
|
||||
frame = (struct rt_sigframe __user *)
|
||||
round_down(stack_top - sizeof(struct rt_sigframe), 16) - 8;
|
||||
frame = (struct rt_sigframe *) ((unsigned long) frame - 128);
|
||||
frame = (struct rt_sigframe __user *) ((unsigned long) frame - 128);
|
||||
|
||||
if (!access_ok(VERIFY_WRITE, fp, sizeof(struct _fpstate)))
|
||||
goto out;
|
||||
|
|
|
@ -45,7 +45,7 @@ static long arch_prctl_tt(int code, unsigned long addr)
|
|||
case ARCH_GET_GS:
|
||||
ret = arch_prctl(code, (unsigned long) &tmp);
|
||||
if(!ret)
|
||||
ret = put_user(tmp, &addr);
|
||||
ret = put_user(tmp, (long __user *)addr);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
|
|
@ -133,6 +133,7 @@ struct cfq_data {
|
|||
mempool_t *crq_pool;
|
||||
|
||||
int rq_in_driver;
|
||||
int hw_tag;
|
||||
|
||||
/*
|
||||
* schedule slice state info
|
||||
|
@ -500,10 +501,13 @@ static void cfq_resort_rr_list(struct cfq_queue *cfqq, int preempted)
|
|||
|
||||
/*
|
||||
* if queue was preempted, just add to front to be fair. busy_rr
|
||||
* isn't sorted.
|
||||
* isn't sorted, but insert at the back for fairness.
|
||||
*/
|
||||
if (preempted || list == &cfqd->busy_rr) {
|
||||
list_add(&cfqq->cfq_list, list);
|
||||
if (preempted)
|
||||
list = list->prev;
|
||||
|
||||
list_add_tail(&cfqq->cfq_list, list);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -664,6 +668,15 @@ static void cfq_activate_request(request_queue_t *q, struct request *rq)
|
|||
struct cfq_data *cfqd = q->elevator->elevator_data;
|
||||
|
||||
cfqd->rq_in_driver++;
|
||||
|
||||
/*
|
||||
* If the depth is larger 1, it really could be queueing. But lets
|
||||
* make the mark a little higher - idling could still be good for
|
||||
* low queueing, and a low queueing number could also just indicate
|
||||
* a SCSI mid layer like behaviour where limit+1 is often seen.
|
||||
*/
|
||||
if (!cfqd->hw_tag && cfqd->rq_in_driver > 4)
|
||||
cfqd->hw_tag = 1;
|
||||
}
|
||||
|
||||
static void cfq_deactivate_request(request_queue_t *q, struct request *rq)
|
||||
|
@ -878,6 +891,13 @@ static struct cfq_queue *cfq_set_active_queue(struct cfq_data *cfqd)
|
|||
if (!list_empty(&cfqd->cur_rr) || cfq_get_next_prio_level(cfqd) != -1)
|
||||
cfqq = list_entry_cfqq(cfqd->cur_rr.next);
|
||||
|
||||
/*
|
||||
* If no new queues are available, check if the busy list has some
|
||||
* before falling back to idle io.
|
||||
*/
|
||||
if (!cfqq && !list_empty(&cfqd->busy_rr))
|
||||
cfqq = list_entry_cfqq(cfqd->busy_rr.next);
|
||||
|
||||
/*
|
||||
* if we have idle queues and no rt or be queues had pending
|
||||
* requests, either allow immediate service if the grace period
|
||||
|
@ -1458,7 +1478,8 @@ retry:
|
|||
* set ->slice_left to allow preemption for a new process
|
||||
*/
|
||||
cfqq->slice_left = 2 * cfqd->cfq_slice_idle;
|
||||
cfq_mark_cfqq_idle_window(cfqq);
|
||||
if (!cfqd->hw_tag)
|
||||
cfq_mark_cfqq_idle_window(cfqq);
|
||||
cfq_mark_cfqq_prio_changed(cfqq);
|
||||
cfq_init_prio_data(cfqq);
|
||||
}
|
||||
|
@ -1649,7 +1670,7 @@ cfq_update_idle_window(struct cfq_data *cfqd, struct cfq_queue *cfqq,
|
|||
{
|
||||
int enable_idle = cfq_cfqq_idle_window(cfqq);
|
||||
|
||||
if (!cic->ioc->task || !cfqd->cfq_slice_idle)
|
||||
if (!cic->ioc->task || !cfqd->cfq_slice_idle || cfqd->hw_tag)
|
||||
enable_idle = 0;
|
||||
else if (sample_valid(cic->ttime_samples)) {
|
||||
if (cic->ttime_mean > cfqd->cfq_slice_idle)
|
||||
|
@ -1740,14 +1761,24 @@ cfq_crq_enqueued(struct cfq_data *cfqd, struct cfq_queue *cfqq,
|
|||
|
||||
cfqq->next_crq = cfq_choose_req(cfqd, cfqq->next_crq, crq);
|
||||
|
||||
cic = crq->io_context;
|
||||
|
||||
/*
|
||||
* we never wait for an async request and we don't allow preemption
|
||||
* of an async request. so just return early
|
||||
*/
|
||||
if (!cfq_crq_is_sync(crq))
|
||||
if (!cfq_crq_is_sync(crq)) {
|
||||
/*
|
||||
* sync process issued an async request, if it's waiting
|
||||
* then expire it and kick rq handling.
|
||||
*/
|
||||
if (cic == cfqd->active_cic &&
|
||||
del_timer(&cfqd->idle_slice_timer)) {
|
||||
cfq_slice_expired(cfqd, 0);
|
||||
cfq_start_queueing(cfqd, cfqq);
|
||||
}
|
||||
return;
|
||||
|
||||
cic = crq->io_context;
|
||||
}
|
||||
|
||||
cfq_update_io_thinktime(cfqd, cic);
|
||||
cfq_update_io_seektime(cfqd, cic, crq);
|
||||
|
@ -2165,10 +2196,9 @@ static void cfq_idle_class_timer(unsigned long data)
|
|||
* race with a non-idle queue, reset timer
|
||||
*/
|
||||
end = cfqd->last_end_request + CFQ_IDLE_GRACE;
|
||||
if (!time_after_eq(jiffies, end)) {
|
||||
cfqd->idle_class_timer.expires = end;
|
||||
add_timer(&cfqd->idle_class_timer);
|
||||
} else
|
||||
if (!time_after_eq(jiffies, end))
|
||||
mod_timer(&cfqd->idle_class_timer, end);
|
||||
else
|
||||
cfq_schedule_dispatch(cfqd);
|
||||
|
||||
spin_unlock_irqrestore(cfqd->queue->queue_lock, flags);
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/vt_kern.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/kallsyms.h>
|
||||
#include <linux/pm.h>
|
||||
|
@ -66,6 +65,7 @@ int suspend_device(struct device * dev, pm_message_t state)
|
|||
return error;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* device_suspend - Save state and stop all devices in system.
|
||||
* @state: Power state to put each device in.
|
||||
|
@ -85,9 +85,6 @@ int device_suspend(pm_message_t state)
|
|||
{
|
||||
int error = 0;
|
||||
|
||||
if (!is_console_suspend_safe())
|
||||
return -EINVAL;
|
||||
|
||||
down(&dpm_sem);
|
||||
down(&dpm_list_sem);
|
||||
while (!list_empty(&dpm_active) && error == 0) {
|
||||
|
|
|
@ -1184,20 +1184,20 @@ static void port_outl(struct si_sm_io *io, unsigned int offset,
|
|||
static void port_cleanup(struct smi_info *info)
|
||||
{
|
||||
unsigned int addr = info->io.addr_data;
|
||||
int mapsize;
|
||||
int idx;
|
||||
|
||||
if (addr) {
|
||||
mapsize = ((info->io_size * info->io.regspacing)
|
||||
- (info->io.regspacing - info->io.regsize));
|
||||
|
||||
release_region (addr, mapsize);
|
||||
for (idx = 0; idx < info->io_size; idx++) {
|
||||
release_region(addr + idx * info->io.regspacing,
|
||||
info->io.regsize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int port_setup(struct smi_info *info)
|
||||
{
|
||||
unsigned int addr = info->io.addr_data;
|
||||
int mapsize;
|
||||
int idx;
|
||||
|
||||
if (!addr)
|
||||
return -ENODEV;
|
||||
|
@ -1225,16 +1225,22 @@ static int port_setup(struct smi_info *info)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Calculate the total amount of memory to claim. This is an
|
||||
* unusual looking calculation, but it avoids claiming any
|
||||
* more memory than it has to. It will claim everything
|
||||
* between the first address to the end of the last full
|
||||
* register. */
|
||||
mapsize = ((info->io_size * info->io.regspacing)
|
||||
- (info->io.regspacing - info->io.regsize));
|
||||
|
||||
if (request_region(addr, mapsize, DEVICE_NAME) == NULL)
|
||||
return -EIO;
|
||||
/* Some BIOSes reserve disjoint I/O regions in their ACPI
|
||||
* tables. This causes problems when trying to register the
|
||||
* entire I/O region. Therefore we must register each I/O
|
||||
* port separately.
|
||||
*/
|
||||
for (idx = 0; idx < info->io_size; idx++) {
|
||||
if (request_region(addr + idx * info->io.regspacing,
|
||||
info->io.regsize, DEVICE_NAME) == NULL) {
|
||||
/* Undo allocations */
|
||||
while (idx--) {
|
||||
release_region(addr + idx * info->io.regspacing,
|
||||
info->io.regsize);
|
||||
}
|
||||
return -EIO;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -149,7 +149,7 @@ struct cm4000_dev {
|
|||
#define ZERO_DEV(dev) \
|
||||
memset(&dev->atr_csum,0, \
|
||||
sizeof(struct cm4000_dev) - \
|
||||
/*link*/ sizeof(struct pcmcia_device) - \
|
||||
/*link*/ sizeof(struct pcmcia_device *) - \
|
||||
/*node*/ sizeof(dev_node_t) - \
|
||||
/*atr*/ MAX_ATR*sizeof(char) - \
|
||||
/*rbuf*/ 512*sizeof(char) - \
|
||||
|
|
|
@ -105,6 +105,12 @@ static const char* tcpa_event_type_strings[] = {
|
|||
"Non-Host Info"
|
||||
};
|
||||
|
||||
struct tcpa_pc_event {
|
||||
u32 event_id;
|
||||
u32 event_size;
|
||||
u8 event_data[0];
|
||||
};
|
||||
|
||||
enum tcpa_pc_event_ids {
|
||||
SMBIOS = 1,
|
||||
BIS_CERT,
|
||||
|
@ -114,14 +120,15 @@ enum tcpa_pc_event_ids {
|
|||
NVRAM,
|
||||
OPTION_ROM_EXEC,
|
||||
OPTION_ROM_CONFIG,
|
||||
OPTION_ROM_MICROCODE,
|
||||
OPTION_ROM_MICROCODE = 10,
|
||||
S_CRTM_VERSION,
|
||||
S_CRTM_CONTENTS,
|
||||
POST_CONTENTS,
|
||||
HOST_TABLE_OF_DEVICES,
|
||||
};
|
||||
|
||||
static const char* tcpa_pc_event_id_strings[] = {
|
||||
""
|
||||
"",
|
||||
"SMBIOS",
|
||||
"BIS Certificate",
|
||||
"POST BIOS ",
|
||||
|
@ -130,11 +137,12 @@ static const char* tcpa_pc_event_id_strings[] = {
|
|||
"NVRAM",
|
||||
"Option ROM",
|
||||
"Option ROM config",
|
||||
"Option ROM microcode",
|
||||
"",
|
||||
"Option ROM microcode ",
|
||||
"S-CRTM Version",
|
||||
"S-CRTM Contents",
|
||||
"S-CRTM POST Contents",
|
||||
"POST Contents",
|
||||
"S-CRTM Contents ",
|
||||
"POST Contents ",
|
||||
"Table of Devices",
|
||||
};
|
||||
|
||||
/* returns pointer to start of pos. entry of tcg log */
|
||||
|
@ -206,7 +214,7 @@ static int get_event_name(char *dest, struct tcpa_event *event,
|
|||
const char *name = "";
|
||||
char data[40] = "";
|
||||
int i, n_len = 0, d_len = 0;
|
||||
u32 event_id;
|
||||
struct tcpa_pc_event *pc_event;
|
||||
|
||||
switch(event->event_type) {
|
||||
case PREBOOT:
|
||||
|
@ -235,31 +243,32 @@ static int get_event_name(char *dest, struct tcpa_event *event,
|
|||
}
|
||||
break;
|
||||
case EVENT_TAG:
|
||||
event_id = be32_to_cpu(*((u32 *)event_entry));
|
||||
pc_event = (struct tcpa_pc_event *)event_entry;
|
||||
|
||||
/* ToDo Row data -> Base64 */
|
||||
|
||||
switch (event_id) {
|
||||
switch (pc_event->event_id) {
|
||||
case SMBIOS:
|
||||
case BIS_CERT:
|
||||
case CMOS:
|
||||
case NVRAM:
|
||||
case OPTION_ROM_EXEC:
|
||||
case OPTION_ROM_CONFIG:
|
||||
case OPTION_ROM_MICROCODE:
|
||||
case S_CRTM_VERSION:
|
||||
case S_CRTM_CONTENTS:
|
||||
case POST_CONTENTS:
|
||||
name = tcpa_pc_event_id_strings[event_id];
|
||||
name = tcpa_pc_event_id_strings[pc_event->event_id];
|
||||
n_len = strlen(name);
|
||||
break;
|
||||
/* hash data */
|
||||
case POST_BIOS_ROM:
|
||||
case ESCD:
|
||||
name = tcpa_pc_event_id_strings[event_id];
|
||||
case OPTION_ROM_MICROCODE:
|
||||
case S_CRTM_CONTENTS:
|
||||
case POST_CONTENTS:
|
||||
name = tcpa_pc_event_id_strings[pc_event->event_id];
|
||||
n_len = strlen(name);
|
||||
for (i = 0; i < 20; i++)
|
||||
d_len += sprintf(data, "%02x",
|
||||
event_entry[8 + i]);
|
||||
d_len += sprintf(&data[2*i], "%02x",
|
||||
pc_event->event_data[i]);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -275,53 +284,13 @@ static int get_event_name(char *dest, struct tcpa_event *event,
|
|||
|
||||
static int tpm_binary_bios_measurements_show(struct seq_file *m, void *v)
|
||||
{
|
||||
struct tcpa_event *event = v;
|
||||
char *data = v;
|
||||
int i;
|
||||
|
||||
char *eventname;
|
||||
char data[4];
|
||||
u32 help;
|
||||
int i, len;
|
||||
struct tcpa_event *event = (struct tcpa_event *) v;
|
||||
unsigned char *event_entry =
|
||||
(unsigned char *) (v + sizeof(struct tcpa_event));
|
||||
|
||||
eventname = kmalloc(MAX_TEXT_EVENT, GFP_KERNEL);
|
||||
if (!eventname) {
|
||||
printk(KERN_ERR "%s: ERROR - No Memory for event name\n ",
|
||||
__func__);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* 1st: PCR used is in little-endian format (4 bytes) */
|
||||
help = le32_to_cpu(event->pcr_index);
|
||||
memcpy(data, &help, 4);
|
||||
for (i = 0; i < 4; i++)
|
||||
for (i = 0; i < sizeof(struct tcpa_event) + event->event_size; i++)
|
||||
seq_putc(m, data[i]);
|
||||
|
||||
/* 2nd: SHA1 (20 bytes) */
|
||||
for (i = 0; i < 20; i++)
|
||||
seq_putc(m, event->pcr_value[i]);
|
||||
|
||||
/* 3rd: event type identifier (4 bytes) */
|
||||
help = le32_to_cpu(event->event_type);
|
||||
memcpy(data, &help, 4);
|
||||
for (i = 0; i < 4; i++)
|
||||
seq_putc(m, data[i]);
|
||||
|
||||
len = 0;
|
||||
|
||||
len += get_event_name(eventname, event, event_entry);
|
||||
|
||||
/* 4th: filename <= 255 + \'0' delimiter */
|
||||
if (len > TCG_EVENT_NAME_LEN_MAX)
|
||||
len = TCG_EVENT_NAME_LEN_MAX;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
seq_putc(m, eventname[i]);
|
||||
|
||||
/* 5th: delimiter */
|
||||
seq_putc(m, '\0');
|
||||
|
||||
kfree(eventname);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -3238,14 +3238,6 @@ void vcs_scr_writew(struct vc_data *vc, u16 val, u16 *org)
|
|||
}
|
||||
}
|
||||
|
||||
int is_console_suspend_safe(void)
|
||||
{
|
||||
/* It is unsafe to suspend devices while X has control of the
|
||||
* hardware. Make sure we are running on a kernel-controlled console.
|
||||
*/
|
||||
return vc_cons[fg_console].d->vc_mode == KD_TEXT;
|
||||
}
|
||||
|
||||
/*
|
||||
* Visible symbols for modules
|
||||
*/
|
||||
|
|
|
@ -345,17 +345,17 @@ sgiioc4_resetproc(ide_drive_t * drive)
|
|||
static u8
|
||||
sgiioc4_INB(unsigned long port)
|
||||
{
|
||||
u8 reg = (u8) inb(port);
|
||||
u8 reg = (u8) readb((void __iomem *) port);
|
||||
|
||||
if ((port & 0xFFF) == 0x11C) { /* Status register of IOC4 */
|
||||
if (reg & 0x51) { /* Not busy...check for interrupt */
|
||||
unsigned long other_ir = port - 0x110;
|
||||
unsigned int intr_reg = (u32) inl(other_ir);
|
||||
unsigned int intr_reg = (u32) readl((void __iomem *) other_ir);
|
||||
|
||||
/* Clear the Interrupt, Error bits on the IOC4 */
|
||||
if (intr_reg & 0x03) {
|
||||
outl(0x03, other_ir);
|
||||
intr_reg = (u32) inl(other_ir);
|
||||
writel(0x03, (void __iomem *) other_ir);
|
||||
intr_reg = (u32) readl((void __iomem *) other_ir);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -606,6 +606,12 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
|
|||
hwif->ide_dma_host_off = &sgiioc4_ide_dma_host_off;
|
||||
hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq;
|
||||
hwif->ide_dma_timeout = &__ide_dma_timeout;
|
||||
|
||||
/*
|
||||
* The IOC4 uses MMIO rather than Port IO.
|
||||
* It also needs special workarounds for INB.
|
||||
*/
|
||||
default_hwif_mmiops(hwif);
|
||||
hwif->INB = &sgiioc4_INB;
|
||||
}
|
||||
|
||||
|
@ -743,6 +749,6 @@ ioc4_ide_exit(void)
|
|||
module_init(ioc4_ide_init);
|
||||
module_exit(ioc4_ide_exit);
|
||||
|
||||
MODULE_AUTHOR("Aniket Malatpure - Silicon Graphics Inc. (SGI)");
|
||||
MODULE_AUTHOR("Aniket Malatpure/Jeremy Higdon");
|
||||
MODULE_DESCRIPTION("IDE PCI driver module for SGI IOC4 Base-IO Card");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
@ -845,7 +845,7 @@ static struct scsi_id_instance_data *sbp2_alloc_device(struct unit_directory *ud
|
|||
&sbp2_highlevel, ud->ne->host, &sbp2_ops,
|
||||
sizeof(struct sbp2_status_block), sizeof(quadlet_t),
|
||||
0x010000000000ULL, CSR1212_ALL_SPACE_END);
|
||||
if (!scsi_id->status_fifo_addr) {
|
||||
if (scsi_id->status_fifo_addr == ~0ULL) {
|
||||
SBP2_ERR("failed to allocate status FIFO address range");
|
||||
goto failed_alloc;
|
||||
}
|
||||
|
|
|
@ -275,6 +275,7 @@ static void ipoib_ib_handle_wc(struct net_device *dev,
|
|||
spin_lock_irqsave(&priv->tx_lock, flags);
|
||||
++priv->tx_tail;
|
||||
if (netif_queue_stopped(dev) &&
|
||||
test_bit(IPOIB_FLAG_ADMIN_UP, &priv->flags) &&
|
||||
priv->tx_head - priv->tx_tail <= ipoib_sendq_size >> 1)
|
||||
netif_wake_queue(dev);
|
||||
spin_unlock_irqrestore(&priv->tx_lock, flags);
|
||||
|
|
|
@ -167,6 +167,15 @@ void md_new_event(mddev_t *mddev)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(md_new_event);
|
||||
|
||||
/* Alternate version that can be called from interrupts
|
||||
* when calling sysfs_notify isn't needed.
|
||||
*/
|
||||
void md_new_event_inintr(mddev_t *mddev)
|
||||
{
|
||||
atomic_inc(&md_event_count);
|
||||
wake_up(&md_event_waiters);
|
||||
}
|
||||
|
||||
/*
|
||||
* Enables to iterate over all existing md arrays
|
||||
* all_mddevs_lock protects this list.
|
||||
|
@ -4149,7 +4158,7 @@ void md_error(mddev_t *mddev, mdk_rdev_t *rdev)
|
|||
set_bit(MD_RECOVERY_INTR, &mddev->recovery);
|
||||
set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
|
||||
md_wakeup_thread(mddev->thread);
|
||||
md_new_event(mddev);
|
||||
md_new_event_inintr(mddev);
|
||||
}
|
||||
|
||||
/* seq_file implementation /proc/mdstat */
|
||||
|
|
|
@ -1605,6 +1605,21 @@ mpt_resume(struct pci_dev *pdev)
|
|||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
mpt_signal_reset(int index, MPT_ADAPTER *ioc, int reset_phase)
|
||||
{
|
||||
if ((MptDriverClass[index] == MPTSPI_DRIVER &&
|
||||
ioc->bus_type != SPI) ||
|
||||
(MptDriverClass[index] == MPTFC_DRIVER &&
|
||||
ioc->bus_type != FC) ||
|
||||
(MptDriverClass[index] == MPTSAS_DRIVER &&
|
||||
ioc->bus_type != SAS))
|
||||
/* make sure we only call the relevant reset handler
|
||||
* for the bus */
|
||||
return 0;
|
||||
return (MptResetHandlers[index])(ioc, reset_phase);
|
||||
}
|
||||
|
||||
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
|
||||
/*
|
||||
* mpt_do_ioc_recovery - Initialize or recover MPT adapter.
|
||||
|
@ -1885,14 +1900,14 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
|
|||
if ((ret == 0) && MptResetHandlers[ii]) {
|
||||
dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
|
||||
ioc->name, ii));
|
||||
rc += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_POST_RESET);
|
||||
rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET);
|
||||
handlers++;
|
||||
}
|
||||
|
||||
if (alt_ioc_ready && MptResetHandlers[ii]) {
|
||||
drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
|
||||
ioc->name, ioc->alt_ioc->name, ii));
|
||||
rc += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_POST_RESET);
|
||||
rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET);
|
||||
handlers++;
|
||||
}
|
||||
}
|
||||
|
@ -3267,11 +3282,11 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
|
|||
if (MptResetHandlers[ii]) {
|
||||
dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n",
|
||||
ioc->name, ii));
|
||||
r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_PRE_RESET);
|
||||
r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET);
|
||||
if (ioc->alt_ioc) {
|
||||
dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n",
|
||||
ioc->name, ioc->alt_ioc->name, ii));
|
||||
r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_PRE_RESET);
|
||||
r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -5706,11 +5721,11 @@ mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
|
|||
if (MptResetHandlers[ii]) {
|
||||
dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n",
|
||||
ioc->name, ii));
|
||||
r += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_SETUP_RESET);
|
||||
r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET);
|
||||
if (ioc->alt_ioc) {
|
||||
dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n",
|
||||
ioc->name, ioc->alt_ioc->name, ii));
|
||||
r += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_SETUP_RESET);
|
||||
r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -84,7 +84,7 @@ config MMC_WBSD
|
|||
|
||||
config MMC_AU1X
|
||||
tristate "Alchemy AU1XX0 MMC Card Interface support"
|
||||
depends on SOC_AU1X00 && MMC
|
||||
depends on MMC && SOC_AU1200
|
||||
help
|
||||
This selects the AMD Alchemy(R) Multimedia card interface.
|
||||
If you have a Alchemy platform with a MMC slot, say Y or M here.
|
||||
|
|
|
@ -2615,6 +2615,18 @@ static int nv_nway_reset(struct net_device *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
#ifdef NETIF_F_TSO
|
||||
static int nv_set_tso(struct net_device *dev, u32 value)
|
||||
{
|
||||
struct fe_priv *np = netdev_priv(dev);
|
||||
|
||||
if ((np->driver_data & DEV_HAS_CHECKSUM))
|
||||
return ethtool_op_set_tso(dev, value);
|
||||
else
|
||||
return value ? -EOPNOTSUPP : 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct ethtool_ops ops = {
|
||||
.get_drvinfo = nv_get_drvinfo,
|
||||
.get_link = ethtool_op_get_link,
|
||||
|
@ -2626,6 +2638,10 @@ static struct ethtool_ops ops = {
|
|||
.get_regs = nv_get_regs,
|
||||
.nway_reset = nv_nway_reset,
|
||||
.get_perm_addr = ethtool_op_get_perm_addr,
|
||||
#ifdef NETIF_F_TSO
|
||||
.get_tso = ethtool_op_get_tso,
|
||||
.set_tso = nv_set_tso
|
||||
#endif
|
||||
};
|
||||
|
||||
static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
|
||||
|
|
|
@ -107,7 +107,7 @@ static int init_netconsole(void)
|
|||
|
||||
if(!configured) {
|
||||
printk("netconsole: not configured, aborting\n");
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if(netpoll_setup(&np))
|
||||
|
|
|
@ -1204,7 +1204,7 @@ static int mace_rx(struct net_device *dev, unsigned char RxCnt)
|
|||
|
||||
dev->last_rx = jiffies;
|
||||
lp->linux_stats.rx_packets++;
|
||||
lp->linux_stats.rx_bytes += skb->len;
|
||||
lp->linux_stats.rx_bytes += pkt_len;
|
||||
outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
|
||||
continue;
|
||||
} else {
|
||||
|
|
|
@ -861,6 +861,9 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb)
|
|||
* give dev_queue_xmit something it can free.
|
||||
*/
|
||||
skb2 = skb_clone(skb, GFP_ATOMIC);
|
||||
|
||||
if (skb2 == NULL)
|
||||
goto abort;
|
||||
}
|
||||
|
||||
ph = (struct pppoe_hdr *) skb_push(skb2, sizeof(struct pppoe_hdr));
|
||||
|
|
|
@ -1143,6 +1143,12 @@ static int ds_event(struct pcmcia_socket *skt, event_t event, int priority)
|
|||
{
|
||||
struct pcmcia_socket *s = pcmcia_get_socket(skt);
|
||||
|
||||
if (!s) {
|
||||
printk(KERN_ERR "PCMCIA obtaining reference to socket %p " \
|
||||
"failed, event 0x%x lost!\n", skt, event);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ds_dbg(1, "ds_event(0x%06x, %d, 0x%p)\n",
|
||||
event, priority, skt);
|
||||
|
||||
|
|
|
@ -48,33 +48,33 @@ static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
|
|||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct m48t86_ops *ops = pdev->dev.platform_data;
|
||||
|
||||
reg = ops->readb(M48T86_REG_B);
|
||||
reg = ops->readbyte(M48T86_REG_B);
|
||||
|
||||
if (reg & M48T86_REG_B_DM) {
|
||||
/* data (binary) mode */
|
||||
tm->tm_sec = ops->readb(M48T86_REG_SEC);
|
||||
tm->tm_min = ops->readb(M48T86_REG_MIN);
|
||||
tm->tm_hour = ops->readb(M48T86_REG_HOUR) & 0x3F;
|
||||
tm->tm_mday = ops->readb(M48T86_REG_DOM);
|
||||
tm->tm_sec = ops->readbyte(M48T86_REG_SEC);
|
||||
tm->tm_min = ops->readbyte(M48T86_REG_MIN);
|
||||
tm->tm_hour = ops->readbyte(M48T86_REG_HOUR) & 0x3F;
|
||||
tm->tm_mday = ops->readbyte(M48T86_REG_DOM);
|
||||
/* tm_mon is 0-11 */
|
||||
tm->tm_mon = ops->readb(M48T86_REG_MONTH) - 1;
|
||||
tm->tm_year = ops->readb(M48T86_REG_YEAR) + 100;
|
||||
tm->tm_wday = ops->readb(M48T86_REG_DOW);
|
||||
tm->tm_mon = ops->readbyte(M48T86_REG_MONTH) - 1;
|
||||
tm->tm_year = ops->readbyte(M48T86_REG_YEAR) + 100;
|
||||
tm->tm_wday = ops->readbyte(M48T86_REG_DOW);
|
||||
} else {
|
||||
/* bcd mode */
|
||||
tm->tm_sec = BCD2BIN(ops->readb(M48T86_REG_SEC));
|
||||
tm->tm_min = BCD2BIN(ops->readb(M48T86_REG_MIN));
|
||||
tm->tm_hour = BCD2BIN(ops->readb(M48T86_REG_HOUR) & 0x3F);
|
||||
tm->tm_mday = BCD2BIN(ops->readb(M48T86_REG_DOM));
|
||||
tm->tm_sec = BCD2BIN(ops->readbyte(M48T86_REG_SEC));
|
||||
tm->tm_min = BCD2BIN(ops->readbyte(M48T86_REG_MIN));
|
||||
tm->tm_hour = BCD2BIN(ops->readbyte(M48T86_REG_HOUR) & 0x3F);
|
||||
tm->tm_mday = BCD2BIN(ops->readbyte(M48T86_REG_DOM));
|
||||
/* tm_mon is 0-11 */
|
||||
tm->tm_mon = BCD2BIN(ops->readb(M48T86_REG_MONTH)) - 1;
|
||||
tm->tm_year = BCD2BIN(ops->readb(M48T86_REG_YEAR)) + 100;
|
||||
tm->tm_wday = BCD2BIN(ops->readb(M48T86_REG_DOW));
|
||||
tm->tm_mon = BCD2BIN(ops->readbyte(M48T86_REG_MONTH)) - 1;
|
||||
tm->tm_year = BCD2BIN(ops->readbyte(M48T86_REG_YEAR)) + 100;
|
||||
tm->tm_wday = BCD2BIN(ops->readbyte(M48T86_REG_DOW));
|
||||
}
|
||||
|
||||
/* correct the hour if the clock is in 12h mode */
|
||||
if (!(reg & M48T86_REG_B_H24))
|
||||
if (ops->readb(M48T86_REG_HOUR) & 0x80)
|
||||
if (ops->readbyte(M48T86_REG_HOUR) & 0x80)
|
||||
tm->tm_hour += 12;
|
||||
|
||||
return 0;
|
||||
|
@ -86,35 +86,35 @@ static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
|
|||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct m48t86_ops *ops = pdev->dev.platform_data;
|
||||
|
||||
reg = ops->readb(M48T86_REG_B);
|
||||
reg = ops->readbyte(M48T86_REG_B);
|
||||
|
||||
/* update flag and 24h mode */
|
||||
reg |= M48T86_REG_B_SET | M48T86_REG_B_H24;
|
||||
ops->writeb(reg, M48T86_REG_B);
|
||||
ops->writebyte(reg, M48T86_REG_B);
|
||||
|
||||
if (reg & M48T86_REG_B_DM) {
|
||||
/* data (binary) mode */
|
||||
ops->writeb(tm->tm_sec, M48T86_REG_SEC);
|
||||
ops->writeb(tm->tm_min, M48T86_REG_MIN);
|
||||
ops->writeb(tm->tm_hour, M48T86_REG_HOUR);
|
||||
ops->writeb(tm->tm_mday, M48T86_REG_DOM);
|
||||
ops->writeb(tm->tm_mon + 1, M48T86_REG_MONTH);
|
||||
ops->writeb(tm->tm_year % 100, M48T86_REG_YEAR);
|
||||
ops->writeb(tm->tm_wday, M48T86_REG_DOW);
|
||||
ops->writebyte(tm->tm_sec, M48T86_REG_SEC);
|
||||
ops->writebyte(tm->tm_min, M48T86_REG_MIN);
|
||||
ops->writebyte(tm->tm_hour, M48T86_REG_HOUR);
|
||||
ops->writebyte(tm->tm_mday, M48T86_REG_DOM);
|
||||
ops->writebyte(tm->tm_mon + 1, M48T86_REG_MONTH);
|
||||
ops->writebyte(tm->tm_year % 100, M48T86_REG_YEAR);
|
||||
ops->writebyte(tm->tm_wday, M48T86_REG_DOW);
|
||||
} else {
|
||||
/* bcd mode */
|
||||
ops->writeb(BIN2BCD(tm->tm_sec), M48T86_REG_SEC);
|
||||
ops->writeb(BIN2BCD(tm->tm_min), M48T86_REG_MIN);
|
||||
ops->writeb(BIN2BCD(tm->tm_hour), M48T86_REG_HOUR);
|
||||
ops->writeb(BIN2BCD(tm->tm_mday), M48T86_REG_DOM);
|
||||
ops->writeb(BIN2BCD(tm->tm_mon + 1), M48T86_REG_MONTH);
|
||||
ops->writeb(BIN2BCD(tm->tm_year % 100), M48T86_REG_YEAR);
|
||||
ops->writeb(BIN2BCD(tm->tm_wday), M48T86_REG_DOW);
|
||||
ops->writebyte(BIN2BCD(tm->tm_sec), M48T86_REG_SEC);
|
||||
ops->writebyte(BIN2BCD(tm->tm_min), M48T86_REG_MIN);
|
||||
ops->writebyte(BIN2BCD(tm->tm_hour), M48T86_REG_HOUR);
|
||||
ops->writebyte(BIN2BCD(tm->tm_mday), M48T86_REG_DOM);
|
||||
ops->writebyte(BIN2BCD(tm->tm_mon + 1), M48T86_REG_MONTH);
|
||||
ops->writebyte(BIN2BCD(tm->tm_year % 100), M48T86_REG_YEAR);
|
||||
ops->writebyte(BIN2BCD(tm->tm_wday), M48T86_REG_DOW);
|
||||
}
|
||||
|
||||
/* update ended */
|
||||
reg &= ~M48T86_REG_B_SET;
|
||||
ops->writeb(reg, M48T86_REG_B);
|
||||
ops->writebyte(reg, M48T86_REG_B);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -125,12 +125,12 @@ static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
|
|||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct m48t86_ops *ops = pdev->dev.platform_data;
|
||||
|
||||
reg = ops->readb(M48T86_REG_B);
|
||||
reg = ops->readbyte(M48T86_REG_B);
|
||||
|
||||
seq_printf(seq, "mode\t\t: %s\n",
|
||||
(reg & M48T86_REG_B_DM) ? "binary" : "bcd");
|
||||
|
||||
reg = ops->readb(M48T86_REG_D);
|
||||
reg = ops->readbyte(M48T86_REG_D);
|
||||
|
||||
seq_printf(seq, "battery\t\t: %s\n",
|
||||
(reg & M48T86_REG_D_VRT) ? "ok" : "exhausted");
|
||||
|
@ -157,7 +157,7 @@ static int __devinit m48t86_rtc_probe(struct platform_device *dev)
|
|||
platform_set_drvdata(dev, rtc);
|
||||
|
||||
/* read battery status */
|
||||
reg = ops->readb(M48T86_REG_D);
|
||||
reg = ops->readbyte(M48T86_REG_D);
|
||||
dev_info(&dev->dev, "battery %s\n",
|
||||
(reg & M48T86_REG_D_VRT) ? "ok" : "exhausted");
|
||||
|
||||
|
|
|
@ -45,11 +45,11 @@ struct pgid {
|
|||
union {
|
||||
__u8 fc; /* SPID function code */
|
||||
struct path_state ps; /* SNID path state */
|
||||
} inf;
|
||||
} __attribute__ ((packed)) inf;
|
||||
union {
|
||||
__u32 cpu_addr : 16; /* CPU address */
|
||||
struct extended_cssid ext_cssid;
|
||||
} pgid_high;
|
||||
} __attribute__ ((packed)) pgid_high;
|
||||
__u32 cpu_id : 24; /* CPU identification */
|
||||
__u32 cpu_model : 16; /* CPU model */
|
||||
__u32 tod_high; /* high word TOD clock */
|
||||
|
|
|
@ -749,7 +749,7 @@ ccw_device_irq(struct ccw_device *cdev, enum dev_event dev_event)
|
|||
/* Unit check but no sense data. Need basic sense. */
|
||||
if (ccw_device_do_sense(cdev, irb) != 0)
|
||||
goto call_handler_unsol;
|
||||
memcpy(irb, &cdev->private->irb, sizeof(struct irb));
|
||||
memcpy(&cdev->private->irb, irb, sizeof(struct irb));
|
||||
cdev->private->state = DEV_STATE_W4SENSE;
|
||||
cdev->private->intparm = 0;
|
||||
return;
|
||||
|
|
|
@ -982,6 +982,12 @@ static int device_check(ppa_struct *dev)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int ppa_adjust_queue(struct scsi_device *device)
|
||||
{
|
||||
blk_queue_bounce_limit(device->request_queue, BLK_BOUNCE_HIGH);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct scsi_host_template ppa_template = {
|
||||
.module = THIS_MODULE,
|
||||
.proc_name = "ppa",
|
||||
|
@ -997,6 +1003,7 @@ static struct scsi_host_template ppa_template = {
|
|||
.cmd_per_lun = 1,
|
||||
.use_clustering = ENABLE_CLUSTERING,
|
||||
.can_queue = 1,
|
||||
.slave_alloc = ppa_adjust_queue,
|
||||
};
|
||||
|
||||
/***************************************************************************
|
||||
|
|
|
@ -454,7 +454,7 @@ static int sil24_softreset(struct ata_port *ap, int verbose,
|
|||
*/
|
||||
msleep(10);
|
||||
|
||||
prb->ctrl = PRB_CTRL_SRST;
|
||||
prb->ctrl = cpu_to_le16(PRB_CTRL_SRST);
|
||||
prb->fis[1] = 0; /* no PM yet */
|
||||
|
||||
writel((u32)paddr, port + PORT_CMD_ACTIVATE);
|
||||
|
@ -551,9 +551,9 @@ static void sil24_qc_prep(struct ata_queued_cmd *qc)
|
|||
|
||||
if (qc->tf.protocol != ATA_PROT_ATAPI_NODATA) {
|
||||
if (qc->tf.flags & ATA_TFLAG_WRITE)
|
||||
prb->ctrl = PRB_CTRL_PACKET_WRITE;
|
||||
prb->ctrl = cpu_to_le16(PRB_CTRL_PACKET_WRITE);
|
||||
else
|
||||
prb->ctrl = PRB_CTRL_PACKET_READ;
|
||||
prb->ctrl = cpu_to_le16(PRB_CTRL_PACKET_READ);
|
||||
} else
|
||||
prb->ctrl = 0;
|
||||
|
||||
|
|
|
@ -165,6 +165,7 @@ static struct {
|
|||
{"HP", "HSV100", NULL, BLIST_REPORTLUN2 | BLIST_NOSTARTONADD},
|
||||
{"HP", "C1557A", NULL, BLIST_FORCELUN},
|
||||
{"HP", "C3323-300", "4269", BLIST_NOTQ},
|
||||
{"HP", "C5713A", NULL, BLIST_NOREPORTLUN},
|
||||
{"IBM", "AuSaV1S2", NULL, BLIST_FORCELUN},
|
||||
{"IBM", "ProFibre 4000R", "*", BLIST_SPARSELUN | BLIST_LARGELUN},
|
||||
{"IBM", "2105", NULL, BLIST_RETRY_HWERROR},
|
||||
|
|
|
@ -367,7 +367,7 @@ static int scsi_req_map_sg(struct request *rq, struct scatterlist *sgl,
|
|||
int nsegs, unsigned bufflen, gfp_t gfp)
|
||||
{
|
||||
struct request_queue *q = rq->q;
|
||||
int nr_pages = (bufflen + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
int nr_pages = (bufflen + sgl[0].offset + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
unsigned int data_len = 0, len, bytes, off;
|
||||
struct page *page;
|
||||
struct bio *bio = NULL;
|
||||
|
|
|
@ -955,7 +955,8 @@ static int sas_user_scan(struct Scsi_Host *shost, uint channel,
|
|||
list_for_each_entry(rphy, &sas_host->rphy_list, list) {
|
||||
struct sas_phy *parent = dev_to_phy(rphy->dev.parent);
|
||||
|
||||
if (rphy->scsi_target_id == -1)
|
||||
if (rphy->identify.device_type != SAS_END_DEVICE ||
|
||||
rphy->scsi_target_id == -1)
|
||||
continue;
|
||||
|
||||
if ((channel == SCAN_WILD_CARD || channel == parent->port_identifier) &&
|
||||
|
@ -977,7 +978,6 @@ static int sas_user_scan(struct Scsi_Host *shost, uint channel,
|
|||
#define SETUP_TEMPLATE(attrb, field, perm, test) \
|
||||
i->private_##attrb[count] = class_device_attr_##field; \
|
||||
i->private_##attrb[count].attr.mode = perm; \
|
||||
i->private_##attrb[count].store = NULL; \
|
||||
i->attrb[count] = &i->private_##attrb[count]; \
|
||||
if (test) \
|
||||
count++
|
||||
|
|
|
@ -214,10 +214,13 @@ int au1100fb_setmode(struct au1100fb_device *fbdev)
|
|||
*/
|
||||
int au1100fb_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *fbi)
|
||||
{
|
||||
struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
|
||||
u32 *palette = fbdev->regs->lcd_pallettebase;
|
||||
struct au1100fb_device *fbdev;
|
||||
u32 *palette;
|
||||
u32 value;
|
||||
|
||||
fbdev = to_au1100fb_device(fbi);
|
||||
palette = fbdev->regs->lcd_pallettebase;
|
||||
|
||||
if (regno > (AU1100_LCD_NBR_PALETTE_ENTRIES - 1))
|
||||
return -EINVAL;
|
||||
|
||||
|
@ -316,9 +319,11 @@ int au1100fb_fb_blank(int blank_mode, struct fb_info *fbi)
|
|||
*/
|
||||
int au1100fb_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *fbi)
|
||||
{
|
||||
struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
|
||||
struct au1100fb_device *fbdev;
|
||||
int dy;
|
||||
|
||||
fbdev = to_au1100fb_device(fbi);
|
||||
|
||||
print_dbg("fb_pan_display %p %p", var, fbi);
|
||||
|
||||
if (!var || !fbdev) {
|
||||
|
@ -382,10 +387,12 @@ void au1100fb_fb_rotate(struct fb_info *fbi, int angle)
|
|||
*/
|
||||
int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
|
||||
{
|
||||
struct au1100fb_device *fbdev = to_au1100fb_device(fbi);
|
||||
struct au1100fb_device *fbdev;
|
||||
unsigned int len;
|
||||
unsigned long start=0, off;
|
||||
|
||||
fbdev = to_au1100fb_device(fbi);
|
||||
|
||||
if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -467,7 +474,7 @@ int au1100fb_drv_probe(struct device *dev)
|
|||
|
||||
if (!request_mem_region(au1100fb_fix.mmio_start, au1100fb_fix.mmio_len,
|
||||
DRIVER_NAME)) {
|
||||
print_err("fail to lock memory region at 0x%08x",
|
||||
print_err("fail to lock memory region at 0x%08lx",
|
||||
au1100fb_fix.mmio_start);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
@ -595,13 +602,13 @@ int au1100fb_drv_remove(struct device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int au1100fb_drv_suspend(struct device *dev, u32 state, u32 level)
|
||||
int au1100fb_drv_suspend(struct device *dev, pm_message_t state)
|
||||
{
|
||||
/* TODO */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int au1100fb_drv_resume(struct device *dev, u32 level)
|
||||
int au1100fb_drv_resume(struct device *dev)
|
||||
{
|
||||
/* TODO */
|
||||
return 0;
|
||||
|
|
|
@ -2631,7 +2631,7 @@ static int fbcon_scrolldelta(struct vc_data *vc, int lines)
|
|||
scr_memcpyw((u16 *) q, (u16 *) p,
|
||||
vc->vc_size_row);
|
||||
}
|
||||
softback_in = p;
|
||||
softback_in = softback_curr = p;
|
||||
update_region(vc, vc->vc_origin,
|
||||
logo_lines * vc->vc_cols);
|
||||
}
|
||||
|
|
|
@ -55,7 +55,7 @@ static struct fb_var_screeninfo maxinefb_defined = {
|
|||
};
|
||||
|
||||
static struct fb_fix_screeninfo maxinefb_fix = {
|
||||
.id = "Maxine onboard graphics 1024x768x8",
|
||||
.id = "Maxine",
|
||||
.smem_len = (1024*768),
|
||||
.type = FB_TYPE_PACKED_PIXELS,
|
||||
.visual = FB_VISUAL_PSEUDOCOLOR,
|
||||
|
@ -107,8 +107,6 @@ static int maxinefb_setcolreg(unsigned regno, unsigned red, unsigned green,
|
|||
|
||||
static struct fb_ops maxinefb_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_get_fix = gen_get_fix,
|
||||
.fb_get_var = gen_get_var,
|
||||
.fb_setcolreg = maxinefb_setcolreg,
|
||||
.fb_fillrect = cfb_fillrect,
|
||||
.fb_copyarea = cfb_copyarea,
|
||||
|
|
|
@ -767,7 +767,6 @@ int ext3_group_add(struct super_block *sb, struct ext3_new_group_data *input)
|
|||
if (input->group != sbi->s_groups_count) {
|
||||
ext3_warning(sb, __FUNCTION__,
|
||||
"multiple resizers run on filesystem!");
|
||||
unlock_super(sb);
|
||||
err = -EBUSY;
|
||||
goto exit_journal;
|
||||
}
|
||||
|
|
19
fs/namei.c
19
fs/namei.c
|
@ -1080,8 +1080,8 @@ static int fastcall do_path_lookup(int dfd, const char *name,
|
|||
nd->flags = flags;
|
||||
nd->depth = 0;
|
||||
|
||||
read_lock(¤t->fs->lock);
|
||||
if (*name=='/') {
|
||||
read_lock(¤t->fs->lock);
|
||||
if (current->fs->altroot && !(nd->flags & LOOKUP_NOALT)) {
|
||||
nd->mnt = mntget(current->fs->altrootmnt);
|
||||
nd->dentry = dget(current->fs->altroot);
|
||||
|
@ -1092,33 +1092,35 @@ static int fastcall do_path_lookup(int dfd, const char *name,
|
|||
}
|
||||
nd->mnt = mntget(current->fs->rootmnt);
|
||||
nd->dentry = dget(current->fs->root);
|
||||
read_unlock(¤t->fs->lock);
|
||||
} else if (dfd == AT_FDCWD) {
|
||||
read_lock(¤t->fs->lock);
|
||||
nd->mnt = mntget(current->fs->pwdmnt);
|
||||
nd->dentry = dget(current->fs->pwd);
|
||||
read_unlock(¤t->fs->lock);
|
||||
} else {
|
||||
struct dentry *dentry;
|
||||
|
||||
file = fget_light(dfd, &fput_needed);
|
||||
retval = -EBADF;
|
||||
if (!file)
|
||||
goto unlock_fail;
|
||||
goto out_fail;
|
||||
|
||||
dentry = file->f_dentry;
|
||||
|
||||
retval = -ENOTDIR;
|
||||
if (!S_ISDIR(dentry->d_inode->i_mode))
|
||||
goto fput_unlock_fail;
|
||||
goto fput_fail;
|
||||
|
||||
retval = file_permission(file, MAY_EXEC);
|
||||
if (retval)
|
||||
goto fput_unlock_fail;
|
||||
goto fput_fail;
|
||||
|
||||
nd->mnt = mntget(file->f_vfsmnt);
|
||||
nd->dentry = dget(dentry);
|
||||
|
||||
fput_light(file, fput_needed);
|
||||
}
|
||||
read_unlock(¤t->fs->lock);
|
||||
current->total_link_count = 0;
|
||||
retval = link_path_walk(name, nd);
|
||||
out:
|
||||
|
@ -1127,13 +1129,12 @@ out:
|
|||
nd->dentry->d_inode))
|
||||
audit_inode(name, nd->dentry->d_inode, flags);
|
||||
}
|
||||
out_fail:
|
||||
return retval;
|
||||
|
||||
fput_unlock_fail:
|
||||
fput_fail:
|
||||
fput_light(file, fput_needed);
|
||||
unlock_fail:
|
||||
read_unlock(¤t->fs->lock);
|
||||
return retval;
|
||||
goto out_fail;
|
||||
}
|
||||
|
||||
int fastcall path_lookup(const char *name, unsigned int flags,
|
||||
|
|
|
@ -45,10 +45,8 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
|
|||
#define hard_smp_processor_id() __hard_smp_processor_id()
|
||||
#define raw_smp_processor_id() (current_thread_info()->cpu)
|
||||
|
||||
extern cpumask_t cpu_present_mask;
|
||||
extern cpumask_t cpu_online_map;
|
||||
extern int smp_num_cpus;
|
||||
#define cpu_possible_map cpu_present_mask
|
||||
#define cpu_possible_map cpu_present_map
|
||||
|
||||
int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu);
|
||||
|
||||
|
|
|
@ -49,7 +49,7 @@ static inline int __ixp23xx_arch_is_coherent(void)
|
|||
{
|
||||
extern unsigned int processor_id;
|
||||
|
||||
if (((processor_id & 15) >= 2) || machine_is_roadrunner())
|
||||
if (((processor_id & 15) >= 4) || machine_is_roadrunner())
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
#define UARTDR 0x00 /* Tx/Rx data */
|
||||
#define RXSTAT 0x04 /* Rx status */
|
||||
#define H_UBRLCR 0x08 /* mode register high */
|
||||
#define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/
|
||||
#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/
|
||||
#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/
|
||||
#define UARTCON 0x14 /* control register */
|
||||
#define UARTFLG 0x18 /* flag register */
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue