Merge tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux into fixes

This pull request contains the following Broadcom SoCs Device Tree changes:

- Ray adds support for the Cygnus i2c Device Tree controller on Cygnus SoCs
- Fixes to the BCM63138 dtsi file for the L2 cache controller properties

* tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux:
  ARM: dts: add I2C device nodes for Broadcom Cygnus
  ARM: dts: BCM63xx: fix L2 cache properties
This commit is contained in:
Arnd Bergmann 2015-02-18 12:21:54 +01:00
commit f495fe8998
2 changed files with 23 additions and 2 deletions

View file

@ -70,6 +70,26 @@
};
};
i2c0: i2c@18008000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x18008000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
i2c1: i2c@1800b000 {
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
reg = <0x1800b000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
uart0: serial@18020000 {
compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>;

View file

@ -66,8 +66,9 @@
reg = <0x1d000 0x1000>;
cache-unified;
cache-level = <2>;
cache-sets = <16>;
cache-size = <0x80000>;
cache-size = <524288>;
cache-sets = <1024>;
cache-line-size = <32>;
interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
};