2nd round of GPIO changes for v3.3 merge window
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPERUPAAoJEEFnBt12D9kBIgkQAI5kJ6HhPMeuSWVN8RiuLxvY VsE77HffpdwCSVWjNqYLN132zkEkH7Bt/yxPp3om4ursh6qPL2tdxJZGJiBbt4iL pRtPCYvaH/JGeXlXA7C0k7ltJpiEK1aT/0GulrkiyvBUfqTQNPBZNUkA8VnTN/Xo Rsmg4Px3ECNIftS2xKsvdb70lZd9OHd5XCp6dv/7wAyPOxm8npBf7e/QwlBaUAzZ 6MxY4+5WFih+6+MioXdkIbIsmN2QIRyZ5RbJQpd6EHYpuzB875l2Cau06hzNL4vZ 8g/l4sRZ2fXdYqge6ZHEeaK23wkOigfi9xWQEjrhWDZVdOp7kaML8ZIIGXhnNMHR /5Hb6WcL0paGAiZHreFhdaof/eYuguVjXZAxAM6FeAiU3Zr88WDeWvbzakmPQVgg DNT3rnydaTaJRPV5gDjyv6mW/MuHjicCjJpgSYTDITy4FLKZGmZ9EgXtJV94RkKq 8Wk94ybX5nNM1N9uGH3Iau7R1VEie+xrfSPFtUTkqUMlimNAjTohNN9g4l/S8sDI /fWSEbfoI5vXIpbtfNLp9cp3OuDm8HqjLlWToHbsygPxQv+ZR8vK4J8ztW9OnDYt ybx53all5hhu+qdcu+LfdcdG4xEsjXgxvRaMFgRXQkHCQaqGgZTyQaV7Gw/+3YMs TNBFdyv1yxysAx8qKS+O =yG1E -----END PGP SIGNATURE----- Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6 2nd round of GPIO changes for v3.3 merge window * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6: GPIO: sa1100: implement proper gpiolib gpio_to_irq conversion gpio: pl061: remove combined interrupt gpio: pl061: convert to use generic irq chip GPIO: add bindings for managed devices ARM: realview: convert pl061 no irq to 0 instead of -1 gpio: pl061: convert to use 0 for no irq gpio: pl061: use chained_irq_* functions in irq handler GPIO/pl061: Add suspend resume capability drivers/gpio/gpio-tegra.c: use devm_request_and_ioremap
This commit is contained in:
commit
f5e4e20faa
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@ -117,17 +117,14 @@ static void __init realview_eb_map_io(void)
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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.irq_base = -1,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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@ -113,17 +113,14 @@ static void __init realview_pb1176_map_io(void)
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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.irq_base = -1,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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@ -112,17 +112,14 @@ static void __init realview_pb11mp_map_io(void)
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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.irq_base = -1,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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@ -102,17 +102,14 @@ static void __init realview_pba8_map_io(void)
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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.irq_base = -1,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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@ -124,17 +124,14 @@ static void __init realview_pbx_map_io(void)
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static struct pl061_platform_data gpio0_plat_data = {
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.gpio_base = 0,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = -1,
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};
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static struct pl061_platform_data gpio2_plat_data = {
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.gpio_base = 16,
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.irq_base = -1,
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};
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static struct pl022_ssp_controller ssp0_plat_data = {
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@ -51,7 +51,4 @@ static inline void gpio_set_value(unsigned gpio, int value)
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#define gpio_cansleep __gpio_cansleep
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#define gpio_to_irq(gpio) ((gpio < 11) ? (IRQ_GPIO0 + gpio) : \
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(IRQ_GPIO11 - 11 + gpio))
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#endif
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@ -138,6 +138,7 @@ config GPIO_MXS
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config GPIO_PL061
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bool "PrimeCell PL061 GPIO support"
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depends on ARM_AMBA
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select GENERIC_IRQ_CHIP
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help
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Say yes here to support the PrimeCell PL061 GPIO device
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@ -2,7 +2,7 @@
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ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
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obj-$(CONFIG_GPIOLIB) += gpiolib.o
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obj-$(CONFIG_GPIOLIB) += gpiolib.o devres.o
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# Device drivers. Generally keep list sorted alphabetically
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obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
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90
drivers/gpio/devres.c
Normal file
90
drivers/gpio/devres.c
Normal file
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@ -0,0 +1,90 @@
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/*
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* drivers/gpio/devres.c - managed gpio resources
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* This file is based on kernel/irq/devres.c
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*
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* Copyright (c) 2011 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/device.h>
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#include <linux/gfp.h>
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static void devm_gpio_release(struct device *dev, void *res)
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{
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unsigned *gpio = res;
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gpio_free(*gpio);
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}
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static int devm_gpio_match(struct device *dev, void *res, void *data)
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{
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unsigned *this = res, *gpio = data;
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return *this == *gpio;
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}
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/**
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* devm_gpio_request - request a gpio for a managed device
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* @dev: device to request the gpio for
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* @gpio: gpio to allocate
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* @label: the name of the requested gpio
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*
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* Except for the extra @dev argument, this function takes the
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* same arguments and performs the same function as
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* gpio_request(). GPIOs requested with this function will be
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* automatically freed on driver detach.
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*
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* If an GPIO allocated with this function needs to be freed
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* separately, devm_gpio_free() must be used.
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*/
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int devm_gpio_request(struct device *dev, unsigned gpio, const char *label)
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{
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unsigned *dr;
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int rc;
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dr = devres_alloc(devm_gpio_release, sizeof(unsigned), GFP_KERNEL);
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if (!dr)
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return -ENOMEM;
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rc = gpio_request(gpio, label);
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if (rc) {
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devres_free(dr);
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return rc;
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}
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*dr = gpio;
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devres_add(dev, dr);
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return 0;
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}
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EXPORT_SYMBOL(devm_gpio_request);
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/**
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* devm_gpio_free - free an interrupt
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* @dev: device to free gpio for
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* @gpio: gpio to free
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*
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* Except for the extra @dev argument, this function takes the
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* same arguments and performs the same function as gpio_free().
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* This function instead of gpio_free() should be used to manually
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* free GPIOs allocated with devm_gpio_request().
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*/
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void devm_gpio_free(struct device *dev, unsigned int gpio)
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{
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WARN_ON(devres_destroy(dev, devm_gpio_release, devm_gpio_match,
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&gpio));
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gpio_free(gpio);
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}
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EXPORT_SYMBOL(devm_gpio_free);
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@ -12,7 +12,6 @@
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#include <linux/spinlock.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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@ -23,6 +22,8 @@
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#include <linux/amba/bus.h>
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#include <linux/amba/pl061.h>
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#include <linux/slab.h>
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#include <linux/pm.h>
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#include <asm/mach/irq.h>
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#define GPIODIR 0x400
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#define GPIOIS 0x404
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@ -35,25 +36,33 @@
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#define PL061_GPIO_NR 8
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struct pl061_gpio {
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/* We use a list of pl061_gpio structs for each trigger IRQ in the main
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* interrupts controller of the system. We need this to support systems
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* in which more that one PL061s are connected to the same IRQ. The ISR
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* interates through this list to find the source of the interrupt.
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*/
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struct list_head list;
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#ifdef CONFIG_PM
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struct pl061_context_save_regs {
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u8 gpio_data;
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u8 gpio_dir;
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u8 gpio_is;
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u8 gpio_ibe;
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u8 gpio_iev;
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u8 gpio_ie;
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};
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#endif
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struct pl061_gpio {
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/* Each of the two spinlocks protects a different set of hardware
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* regiters and data structurs. This decouples the code of the IRQ from
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* the GPIO code. This also makes the case of a GPIO routine call from
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* the IRQ code simpler.
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*/
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spinlock_t lock; /* GPIO registers */
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spinlock_t irq_lock; /* IRQ registers */
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void __iomem *base;
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unsigned irq_base;
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int irq_base;
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struct irq_chip_generic *irq_gc;
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struct gpio_chip gc;
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#ifdef CONFIG_PM
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struct pl061_context_save_regs csave_regs;
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#endif
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};
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static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
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@ -118,46 +127,16 @@ static int pl061_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
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if (chip->irq_base == NO_IRQ)
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if (chip->irq_base <= 0)
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return -EINVAL;
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return chip->irq_base + offset;
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}
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/*
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* PL061 GPIO IRQ
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*/
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static void pl061_irq_disable(struct irq_data *d)
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{
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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int offset = d->irq - chip->irq_base;
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unsigned long flags;
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u8 gpioie;
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spin_lock_irqsave(&chip->irq_lock, flags);
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gpioie = readb(chip->base + GPIOIE);
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gpioie &= ~(1 << offset);
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writeb(gpioie, chip->base + GPIOIE);
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spin_unlock_irqrestore(&chip->irq_lock, flags);
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}
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static void pl061_irq_enable(struct irq_data *d)
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{
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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int offset = d->irq - chip->irq_base;
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unsigned long flags;
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u8 gpioie;
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spin_lock_irqsave(&chip->irq_lock, flags);
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gpioie = readb(chip->base + GPIOIE);
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gpioie |= 1 << offset;
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writeb(gpioie, chip->base + GPIOIE);
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spin_unlock_irqrestore(&chip->irq_lock, flags);
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}
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static int pl061_irq_type(struct irq_data *d, unsigned trigger)
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{
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struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct pl061_gpio *chip = gc->private;
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int offset = d->irq - chip->irq_base;
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unsigned long flags;
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u8 gpiois, gpioibe, gpioiev;
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@ -165,7 +144,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
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if (offset < 0 || offset >= PL061_GPIO_NR)
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return -EINVAL;
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spin_lock_irqsave(&chip->irq_lock, flags);
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raw_spin_lock_irqsave(&gc->lock, flags);
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gpioiev = readb(chip->base + GPIOIEV);
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@ -194,49 +173,54 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
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writeb(gpioiev, chip->base + GPIOIEV);
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spin_unlock_irqrestore(&chip->irq_lock, flags);
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raw_spin_unlock_irqrestore(&gc->lock, flags);
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return 0;
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}
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static struct irq_chip pl061_irqchip = {
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.name = "GPIO",
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.irq_enable = pl061_irq_enable,
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.irq_disable = pl061_irq_disable,
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.irq_set_type = pl061_irq_type,
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};
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static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
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{
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struct list_head *chip_list = irq_get_handler_data(irq);
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struct list_head *ptr;
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struct pl061_gpio *chip;
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unsigned long pending;
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int offset;
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struct pl061_gpio *chip = irq_desc_get_handler_data(desc);
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struct irq_chip *irqchip = irq_desc_get_chip(desc);
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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list_for_each(ptr, chip_list) {
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unsigned long pending;
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int offset;
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chip = list_entry(ptr, struct pl061_gpio, list);
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pending = readb(chip->base + GPIOMIS);
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writeb(pending, chip->base + GPIOIC);
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if (pending == 0)
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continue;
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chained_irq_enter(irqchip, desc);
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pending = readb(chip->base + GPIOMIS);
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writeb(pending, chip->base + GPIOIC);
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if (pending) {
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for_each_set_bit(offset, &pending, PL061_GPIO_NR)
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generic_handle_irq(pl061_to_irq(&chip->gc, offset));
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}
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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chained_irq_exit(irqchip, desc);
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}
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static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base)
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{
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struct irq_chip_type *ct;
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chip->irq_gc = irq_alloc_generic_chip("gpio-pl061", 1, irq_base,
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chip->base, handle_simple_irq);
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chip->irq_gc->private = chip;
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ct = chip->irq_gc->chip_types;
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ct->chip.irq_mask = irq_gc_mask_clr_bit;
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_set_type = pl061_irq_type;
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ct->chip.irq_set_wake = irq_gc_set_wake;
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ct->regs.mask = GPIOIE;
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irq_setup_generic_chip(chip->irq_gc, IRQ_MSK(PL061_GPIO_NR),
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IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0);
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}
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static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
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{
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struct pl061_platform_data *pdata;
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struct pl061_gpio *chip;
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struct list_head *chip_list;
|
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int ret, irq, i;
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static DECLARE_BITMAP(init_irq, NR_IRQS);
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||||
|
||||
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
|
||||
if (chip == NULL)
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|
@ -248,7 +232,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
|
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chip->irq_base = pdata->irq_base;
|
||||
} else if (dev->dev.of_node) {
|
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chip->gc.base = -1;
|
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chip->irq_base = NO_IRQ;
|
||||
chip->irq_base = 0;
|
||||
} else {
|
||||
ret = -ENODEV;
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goto free_mem;
|
||||
|
@ -267,8 +251,6 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
|
|||
}
|
||||
|
||||
spin_lock_init(&chip->lock);
|
||||
spin_lock_init(&chip->irq_lock);
|
||||
INIT_LIST_HEAD(&chip->list);
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||||
|
||||
chip->gc.direction_input = pl061_direction_input;
|
||||
chip->gc.direction_output = pl061_direction_output;
|
||||
|
@ -288,9 +270,11 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
|
|||
* irq_chip support
|
||||
*/
|
||||
|
||||
if (chip->irq_base == NO_IRQ)
|
||||
if (chip->irq_base <= 0)
|
||||
return 0;
|
||||
|
||||
pl061_init_gc(chip, chip->irq_base);
|
||||
|
||||
writeb(0, chip->base + GPIOIE); /* disable irqs */
|
||||
irq = dev->irq[0];
|
||||
if (irq < 0) {
|
||||
|
@ -298,18 +282,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
|
|||
goto iounmap;
|
||||
}
|
||||
irq_set_chained_handler(irq, pl061_irq_handler);
|
||||
if (!test_and_set_bit(irq, init_irq)) { /* list initialized? */
|
||||
chip_list = kmalloc(sizeof(*chip_list), GFP_KERNEL);
|
||||
if (chip_list == NULL) {
|
||||
clear_bit(irq, init_irq);
|
||||
ret = -ENOMEM;
|
||||
goto iounmap;
|
||||
}
|
||||
INIT_LIST_HEAD(chip_list);
|
||||
irq_set_handler_data(irq, chip_list);
|
||||
} else
|
||||
chip_list = irq_get_handler_data(irq);
|
||||
list_add(&chip->list, chip_list);
|
||||
irq_set_handler_data(irq, chip);
|
||||
|
||||
for (i = 0; i < PL061_GPIO_NR; i++) {
|
||||
if (pdata) {
|
||||
|
@ -319,13 +292,10 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
|
|||
else
|
||||
pl061_direction_input(&chip->gc, i);
|
||||
}
|
||||
|
||||
irq_set_chip_and_handler(i + chip->irq_base, &pl061_irqchip,
|
||||
handle_simple_irq);
|
||||
set_irq_flags(i+chip->irq_base, IRQF_VALID);
|
||||
irq_set_chip_data(i + chip->irq_base, chip);
|
||||
}
|
||||
|
||||
amba_set_drvdata(dev, chip);
|
||||
|
||||
return 0;
|
||||
|
||||
iounmap:
|
||||
|
@ -338,6 +308,53 @@ free_mem:
|
|||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int pl061_suspend(struct device *dev)
|
||||
{
|
||||
struct pl061_gpio *chip = dev_get_drvdata(dev);
|
||||
int offset;
|
||||
|
||||
chip->csave_regs.gpio_data = 0;
|
||||
chip->csave_regs.gpio_dir = readb(chip->base + GPIODIR);
|
||||
chip->csave_regs.gpio_is = readb(chip->base + GPIOIS);
|
||||
chip->csave_regs.gpio_ibe = readb(chip->base + GPIOIBE);
|
||||
chip->csave_regs.gpio_iev = readb(chip->base + GPIOIEV);
|
||||
chip->csave_regs.gpio_ie = readb(chip->base + GPIOIE);
|
||||
|
||||
for (offset = 0; offset < PL061_GPIO_NR; offset++) {
|
||||
if (chip->csave_regs.gpio_dir & (1 << offset))
|
||||
chip->csave_regs.gpio_data |=
|
||||
pl061_get_value(&chip->gc, offset) << offset;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pl061_resume(struct device *dev)
|
||||
{
|
||||
struct pl061_gpio *chip = dev_get_drvdata(dev);
|
||||
int offset;
|
||||
|
||||
for (offset = 0; offset < PL061_GPIO_NR; offset++) {
|
||||
if (chip->csave_regs.gpio_dir & (1 << offset))
|
||||
pl061_direction_output(&chip->gc, offset,
|
||||
chip->csave_regs.gpio_data &
|
||||
(1 << offset));
|
||||
else
|
||||
pl061_direction_input(&chip->gc, offset);
|
||||
}
|
||||
|
||||
writeb(chip->csave_regs.gpio_is, chip->base + GPIOIS);
|
||||
writeb(chip->csave_regs.gpio_ibe, chip->base + GPIOIBE);
|
||||
writeb(chip->csave_regs.gpio_iev, chip->base + GPIOIEV);
|
||||
writeb(chip->csave_regs.gpio_ie, chip->base + GPIOIE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(pl061_dev_pm_ops, pl061_suspend, pl061_resume);
|
||||
#endif
|
||||
|
||||
static struct amba_id pl061_ids[] = {
|
||||
{
|
||||
.id = 0x00041061,
|
||||
|
@ -351,6 +368,9 @@ MODULE_DEVICE_TABLE(amba, pl061_ids);
|
|||
static struct amba_driver pl061_gpio_driver = {
|
||||
.drv = {
|
||||
.name = "pl061_gpio",
|
||||
#ifdef CONFIG_PM
|
||||
.pm = &pl061_dev_pm_ops,
|
||||
#endif
|
||||
},
|
||||
.id_table = pl061_ids,
|
||||
.probe = pl061_probe,
|
||||
|
|
|
@ -47,12 +47,18 @@ static int sa1100_direction_output(struct gpio_chip *chip, unsigned offset, int
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int sa1100_to_irq(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
return offset < 11 ? (IRQ_GPIO0 + offset) : (IRQ_GPIO11 - 11 + offset);
|
||||
}
|
||||
|
||||
static struct gpio_chip sa1100_gpio_chip = {
|
||||
.label = "gpio",
|
||||
.direction_input = sa1100_direction_input,
|
||||
.direction_output = sa1100_direction_output,
|
||||
.set = sa1100_gpio_set,
|
||||
.get = sa1100_gpio_get,
|
||||
.to_irq = sa1100_to_irq,
|
||||
.base = 0,
|
||||
.ngpio = GPIO_MAX + 1,
|
||||
};
|
||||
|
|
|
@ -361,14 +361,7 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!devm_request_mem_region(&pdev->dev, res->start,
|
||||
resource_size(res),
|
||||
dev_name(&pdev->dev))) {
|
||||
dev_err(&pdev->dev, "Couldn't request MEM resource\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
|
||||
regs = devm_request_and_ioremap(&pdev->dev, res);
|
||||
if (!regs) {
|
||||
dev_err(&pdev->dev, "Couldn't ioremap regs\n");
|
||||
return -ENODEV;
|
||||
|
|
|
@ -177,6 +177,10 @@ extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *labe
|
|||
extern int gpio_request_array(const struct gpio *array, size_t num);
|
||||
extern void gpio_free_array(const struct gpio *array, size_t num);
|
||||
|
||||
/* bindings for managed devices that want to request gpios */
|
||||
int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
|
||||
void devm_gpio_free(struct device *dev, unsigned int gpio);
|
||||
|
||||
#ifdef CONFIG_GPIO_SYSFS
|
||||
|
||||
/*
|
||||
|
|
|
@ -7,7 +7,7 @@ struct pl061_platform_data {
|
|||
unsigned gpio_base;
|
||||
|
||||
/* number of the first IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to NO_IRQ.
|
||||
* If the IRQ functionality in not desired this must be set to 0.
|
||||
*/
|
||||
unsigned irq_base;
|
||||
|
||||
|
|
Loading…
Reference in a new issue