dmaengine: tegra-apb: Support non-flow controlled slave configuration
This allows DMA client to issue a non-flow controlled TX. In particular it is needed for the fuse driver that reads fuse registers using APBDMA to workaround a HW bug that results in hang when CPU and DMA perform simultaneous access to fuse peripheral. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -353,7 +353,8 @@ static int tegra_dma_slave_config(struct dma_chan *dc,
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}
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memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig));
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if (tdc->slave_id == TEGRA_APBDMA_SLAVE_ID_INVALID) {
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if (tdc->slave_id == TEGRA_APBDMA_SLAVE_ID_INVALID &&
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sconfig->device_fc) {
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if (sconfig->slave_id > TEGRA_APBDMA_CSR_REQ_SEL_MASK)
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return -EINVAL;
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tdc->slave_id = sconfig->slave_id;
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@ -970,8 +971,13 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg(
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TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
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ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
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csr |= TEGRA_APBDMA_CSR_ONCE | TEGRA_APBDMA_CSR_FLOW;
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csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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csr |= TEGRA_APBDMA_CSR_ONCE;
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if (tdc->slave_id != TEGRA_APBDMA_SLAVE_ID_INVALID) {
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csr |= TEGRA_APBDMA_CSR_FLOW;
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csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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}
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if (flags & DMA_PREP_INTERRUPT)
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csr |= TEGRA_APBDMA_CSR_IE_EOC;
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@ -1110,10 +1116,13 @@ static struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
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TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
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ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
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csr |= TEGRA_APBDMA_CSR_FLOW;
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if (tdc->slave_id != TEGRA_APBDMA_SLAVE_ID_INVALID) {
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csr |= TEGRA_APBDMA_CSR_FLOW;
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csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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}
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if (flags & DMA_PREP_INTERRUPT)
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csr |= TEGRA_APBDMA_CSR_IE_EOC;
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csr |= tdc->slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
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apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
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