sh: Split out irqflags.h in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
7960a1d02b
commit
f64ee87614
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@ -1,81 +1,11 @@
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#ifndef __ASM_SH_IRQFLAGS_H
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#define __ASM_SH_IRQFLAGS_H
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static inline void raw_local_irq_enable(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %1, %0\n\t"
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#ifdef CONFIG_CPU_HAS_SR_RB
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"stc r6_bank, %1\n\t"
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"or %1, %0\n\t"
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#ifdef CONFIG_SUPERH32
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#include "irqflags_32.h"
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#else
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#include "irqflags_64.h"
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#endif
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x000000f0)
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: "memory"
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);
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}
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static inline void raw_local_irq_disable(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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}
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static inline void set_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or %2, %0\n\t"
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"and %3, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "r" (0x10000000), "r" (0xffffff0f)
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: "memory"
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);
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}
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static inline void clear_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %2, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x10000000)
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: "memory"
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);
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}
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static inline unsigned long __raw_local_save_flags(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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#define raw_local_save_flags(flags) \
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do { (flags) = __raw_local_save_flags(); } while (0)
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@ -92,25 +22,6 @@ static inline int raw_irqs_disabled(void)
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return raw_irqs_disabled_flags(flags);
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}
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static inline unsigned long __raw_local_irq_save(void)
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{
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unsigned long flags, __dummy;
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__asm__ __volatile__ (
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"stc sr, %1\n\t"
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"mov %1, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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"mov %1, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags), "=&r" (__dummy)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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#define raw_local_irq_save(flags) \
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do { (flags) = __raw_local_irq_save(); } while (0)
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99
include/asm-sh/irqflags_32.h
Normal file
99
include/asm-sh/irqflags_32.h
Normal file
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@ -0,0 +1,99 @@
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#ifndef __ASM_SH_IRQFLAGS_32_H
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#define __ASM_SH_IRQFLAGS_32_H
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static inline void raw_local_irq_enable(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %1, %0\n\t"
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#ifdef CONFIG_CPU_HAS_SR_RB
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"stc r6_bank, %1\n\t"
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"or %1, %0\n\t"
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#endif
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x000000f0)
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: "memory"
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);
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}
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static inline void raw_local_irq_disable(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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}
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static inline void set_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"or %2, %0\n\t"
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"and %3, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "r" (0x10000000), "r" (0xffffff0f)
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: "memory"
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);
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}
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static inline void clear_bl_bit(void)
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{
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unsigned long __dummy0, __dummy1;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and %2, %0\n\t"
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"ldc %0, sr\n\t"
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: "=&r" (__dummy0), "=r" (__dummy1)
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: "1" (~0x10000000)
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: "memory"
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);
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}
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static inline unsigned long __raw_local_save_flags(void)
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{
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unsigned long flags;
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__asm__ __volatile__ (
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"stc sr, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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static inline unsigned long __raw_local_irq_save(void)
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{
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unsigned long flags, __dummy;
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__asm__ __volatile__ (
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"stc sr, %1\n\t"
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"mov %1, %0\n\t"
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"or #0xf0, %0\n\t"
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"ldc %0, sr\n\t"
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"mov %1, %0\n\t"
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"and #0xf0, %0\n\t"
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: "=&z" (flags), "=&r" (__dummy)
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: /* no inputs */
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: "memory"
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);
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return flags;
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}
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#endif /* __ASM_SH_IRQFLAGS_32_H */
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85
include/asm-sh/irqflags_64.h
Normal file
85
include/asm-sh/irqflags_64.h
Normal file
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@ -0,0 +1,85 @@
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#ifndef __ASM_SH_IRQFLAGS_64_H
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#define __ASM_SH_IRQFLAGS_64_H
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#include <asm/cpu/registers.h>
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#define SR_MASK_LL 0x00000000000000f0LL
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#define SR_BL_LL 0x0000000010000000LL
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static inline void raw_local_irq_enable(void)
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{
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unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"and %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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static inline void raw_local_irq_disable(void)
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{
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unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"or %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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static inline void set_bl_bit(void)
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{
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unsigned long long __dummy0, __dummy1 = SR_BL_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"or %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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static inline void clear_bl_bit(void)
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{
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unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
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__asm__ __volatile__("getcon " __SR ", %0\n\t"
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"and %0, %1, %0\n\t"
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"putcon %0, " __SR "\n\t"
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: "=&r" (__dummy0)
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: "r" (__dummy1));
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}
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static inline unsigned long __raw_local_save_flags(void)
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{
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unsigned long long __dummy = SR_MASK_LL;
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unsigned long flags;
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__asm__ __volatile__ (
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"getcon " __SR ", %0\n\t"
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"and %0, %1, %0"
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: "=&r" (flags)
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: "r" (__dummy));
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return flags;
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}
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static inline unsigned long __raw_local_irq_save(void)
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{
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unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
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unsigned long flags;
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__asm__ __volatile__ (
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"getcon " __SR ", %1\n\t"
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"or %1, r63, %0\n\t"
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"or %1, %2, %1\n\t"
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"putcon %1, " __SR "\n\t"
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"and %0, %2, %0"
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: "=&r" (flags), "=&r" (__dummy0)
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: "r" (__dummy1));
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return flags;
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}
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#endif /* __ASM_SH_IRQFLAGS_64_H */
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