Merge branch 'BCM54612E'
Xo Wang says: ==================== Broadcom BCM54612E support This series is based on tip of torvalds/master. The first patch adds register definitions from Broadcom docs. The second patch adds the BCM54612E PHY ID, flags, and device-specific RGMII internal delay initialization. I tested on a custom board with an Aspeed AST2500 SOC with its second MAC connected to this PHY. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -337,6 +337,41 @@ static int bcm5481_config_aneg(struct phy_device *phydev)
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return ret;
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return ret;
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}
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}
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static int bcm54612e_config_aneg(struct phy_device *phydev)
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{
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int ret;
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/* First, auto-negotiate. */
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ret = genphy_config_aneg(phydev);
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/* Clear TX internal delay unless requested. */
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if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
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(phydev->interface != PHY_INTERFACE_MODE_RGMII_TXID)) {
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/* Disable TXD to GTXCLK clock delay (default set) */
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/* Bit 9 is the only field in shadow register 00011 */
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bcm_phy_write_shadow(phydev, 0x03, 0);
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}
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/* Clear RX internal delay unless requested. */
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if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) &&
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(phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) {
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u16 reg;
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/* Errata: reads require filling in the write selector field */
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bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
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MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC);
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reg = phy_read(phydev, MII_BCM54XX_AUX_CTL);
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/* Disable RXD to RXC delay (default set) */
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reg &= ~MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW;
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/* Clear shadow selector field */
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reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MASK;
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bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
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MII_BCM54XX_AUXCTL_MISC_WREN | reg);
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}
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return ret;
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}
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static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)
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static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)
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{
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{
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int val;
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int val;
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@ -484,6 +519,18 @@ static struct phy_driver broadcom_drivers[] = {
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.read_status = genphy_read_status,
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.read_status = genphy_read_status,
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.ack_interrupt = bcm_phy_ack_intr,
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.ack_interrupt = bcm_phy_ack_intr,
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.config_intr = bcm_phy_config_intr,
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.config_intr = bcm_phy_config_intr,
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}, {
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.phy_id = PHY_ID_BCM54612E,
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.phy_id_mask = 0xfffffff0,
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.name = "Broadcom BCM54612E",
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.features = PHY_GBIT_FEATURES |
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SUPPORTED_Pause | SUPPORTED_Asym_Pause,
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.flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
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.config_init = bcm54xx_config_init,
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.config_aneg = bcm54612e_config_aneg,
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.read_status = genphy_read_status,
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.ack_interrupt = bcm_phy_ack_intr,
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.config_intr = bcm_phy_config_intr,
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}, {
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}, {
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.phy_id = PHY_ID_BCM54616S,
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.phy_id = PHY_ID_BCM54616S,
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.phy_id_mask = 0xfffffff0,
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.phy_id_mask = 0xfffffff0,
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@ -600,6 +647,7 @@ static struct mdio_device_id __maybe_unused broadcom_tbl[] = {
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{ PHY_ID_BCM5411, 0xfffffff0 },
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{ PHY_ID_BCM5411, 0xfffffff0 },
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{ PHY_ID_BCM5421, 0xfffffff0 },
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{ PHY_ID_BCM5421, 0xfffffff0 },
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{ PHY_ID_BCM5461, 0xfffffff0 },
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{ PHY_ID_BCM5461, 0xfffffff0 },
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{ PHY_ID_BCM54612E, 0xfffffff0 },
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{ PHY_ID_BCM54616S, 0xfffffff0 },
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{ PHY_ID_BCM54616S, 0xfffffff0 },
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{ PHY_ID_BCM5464, 0xfffffff0 },
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{ PHY_ID_BCM5464, 0xfffffff0 },
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{ PHY_ID_BCM5481, 0xfffffff0 },
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{ PHY_ID_BCM5481, 0xfffffff0 },
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@ -18,6 +18,7 @@
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#define PHY_ID_BCM5421 0x002060e0
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#define PHY_ID_BCM5421 0x002060e0
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#define PHY_ID_BCM5464 0x002060b0
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#define PHY_ID_BCM5464 0x002060b0
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#define PHY_ID_BCM5461 0x002060c0
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#define PHY_ID_BCM5461 0x002060c0
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#define PHY_ID_BCM54612E 0x03625e60
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#define PHY_ID_BCM54616S 0x03625d10
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#define PHY_ID_BCM54616S 0x03625d10
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#define PHY_ID_BCM57780 0x03625d90
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#define PHY_ID_BCM57780 0x03625d90
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@ -105,11 +106,12 @@
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#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800
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#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800
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#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000
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#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000
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#define MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW 0x0100
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#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200
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#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200
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#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000
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#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007
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#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007
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/*
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/*
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* Broadcom LED source encodings. These are used in BCM5461, BCM5481,
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* Broadcom LED source encodings. These are used in BCM5461, BCM5481,
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