sh: declared coherent memory support V2
This patch adds declared coherent memory support to the sh architecture. All functions are based on the x86 implementation. Header files are adjusted to use the new functions instead of the former consistent_alloc() code. This version includes the few changes what were included in the fix patch together with modifications based on feedback from Paul. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm
Paul Mundt
parent
4862ec0739
commit
f93e97eaea
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@ -3,6 +3,8 @@
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*
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* Copyright (C) 2004 - 2007 Paul Mundt
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*
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* Declared coherent memory functions based on arch/x86/kernel/pci-dma_32.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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@ -13,66 +15,146 @@
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#include <asm/addrspace.h>
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#include <asm/io.h>
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void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle)
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struct dma_coherent_mem {
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void *virt_base;
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u32 device_base;
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int size;
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int flags;
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unsigned long *bitmap;
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};
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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{
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struct page *page, *end, *free;
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void *ret, *vp;
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int order;
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void *ret;
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struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
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int order = get_order(size);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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page = alloc_pages(gfp, order);
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if (!page)
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return NULL;
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split_page(page, order);
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ret = page_address(page);
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*handle = virt_to_phys(ret);
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vp = ioremap_nocache(*handle, size);
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if (!vp) {
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free_pages((unsigned long)ret, order);
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return NULL;
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}
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memset(vp, 0, size);
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/*
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* We must flush the cache before we pass it on to the device
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*/
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dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL);
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page = virt_to_page(ret);
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free = page + (size >> PAGE_SHIFT);
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end = page + (1 << order);
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while (++page < end) {
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/* Free any unused pages */
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if (page >= free) {
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__free_page(page);
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if (mem) {
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int page = bitmap_find_free_region(mem->bitmap, mem->size,
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order);
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if (page >= 0) {
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*dma_handle = mem->device_base + (page << PAGE_SHIFT);
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ret = mem->virt_base + (page << PAGE_SHIFT);
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memset(ret, 0, size);
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return ret;
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}
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if (mem->flags & DMA_MEMORY_EXCLUSIVE)
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return NULL;
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}
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return vp;
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}
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EXPORT_SYMBOL(consistent_alloc);
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ret = (void *)__get_free_pages(gfp, order);
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void consistent_free(void *vaddr, size_t size, dma_addr_t dma_handle)
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if (ret != NULL) {
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memset(ret, 0, size);
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/*
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* Pages from the page allocator may have data present in
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* cache. So flush the cache before using uncached memory.
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*/
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dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL);
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*dma_handle = virt_to_phys(ret);
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}
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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struct page *page;
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unsigned long addr;
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struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
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int order = get_order(size);
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addr = (unsigned long)phys_to_virt((unsigned long)dma_handle);
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page = virt_to_page(addr);
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if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
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int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
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free_pages(addr, get_order(size));
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iounmap(vaddr);
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bitmap_release_region(mem->bitmap, page, order);
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} else {
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WARN_ON(irqs_disabled()); /* for portability */
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BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE);
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free_pages((unsigned long)vaddr, order);
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}
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}
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EXPORT_SYMBOL(consistent_free);
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EXPORT_SYMBOL(dma_free_coherent);
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void consistent_sync(void *vaddr, size_t size, int direction)
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int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size, int flags)
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{
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void __iomem *mem_base = NULL;
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int pages = size >> PAGE_SHIFT;
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int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
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if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0)
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goto out;
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if (!size)
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goto out;
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if (dev->dma_mem)
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goto out;
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/* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */
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mem_base = ioremap_nocache(bus_addr, size);
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if (!mem_base)
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goto out;
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dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
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if (!dev->dma_mem)
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goto out;
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dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
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if (!dev->dma_mem->bitmap)
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goto free1_out;
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dev->dma_mem->virt_base = mem_base;
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dev->dma_mem->device_base = device_addr;
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dev->dma_mem->size = pages;
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dev->dma_mem->flags = flags;
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if (flags & DMA_MEMORY_MAP)
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return DMA_MEMORY_MAP;
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return DMA_MEMORY_IO;
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free1_out:
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kfree(dev->dma_mem);
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out:
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if (mem_base)
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iounmap(mem_base);
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return 0;
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}
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EXPORT_SYMBOL(dma_declare_coherent_memory);
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void dma_release_declared_memory(struct device *dev)
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{
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struct dma_coherent_mem *mem = dev->dma_mem;
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if (!mem)
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return;
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dev->dma_mem = NULL;
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iounmap(mem->virt_base);
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kfree(mem->bitmap);
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kfree(mem);
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}
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EXPORT_SYMBOL(dma_release_declared_memory);
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void *dma_mark_declared_memory_occupied(struct device *dev,
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dma_addr_t device_addr, size_t size)
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{
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struct dma_coherent_mem *mem = dev->dma_mem;
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int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT;
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int pos, err;
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if (!mem)
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return ERR_PTR(-EINVAL);
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pos = (device_addr - mem->device_base) >> PAGE_SHIFT;
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err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages));
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if (err != 0)
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return ERR_PTR(err);
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return mem->virt_base + (pos << PAGE_SHIFT);
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}
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EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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#ifdef CONFIG_CPU_SH5
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void *p1addr = vaddr;
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@ -94,4 +176,4 @@ void consistent_sync(void *vaddr, size_t size, int direction)
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BUG();
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}
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}
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EXPORT_SYMBOL(consistent_sync);
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EXPORT_SYMBOL(dma_cache_sync);
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@ -8,11 +8,6 @@
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extern struct bus_type pci_bus_type;
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/* arch/sh/mm/consistent.c */
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extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle);
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extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
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extern void consistent_sync(void *vaddr, size_t size, int direction);
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#define dma_supported(dev, mask) (1)
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static inline int dma_set_mask(struct device *dev, u64 mask)
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@ -25,44 +20,19 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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if (sh_mv.mv_consistent_alloc) {
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void *ret;
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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ret = sh_mv.mv_consistent_alloc(dev, size, dma_handle, flag);
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if (ret != NULL)
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return ret;
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}
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void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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return consistent_alloc(flag, size, dma_handle);
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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if (sh_mv.mv_consistent_free) {
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int ret;
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ret = sh_mv.mv_consistent_free(dev, size, vaddr, dma_handle);
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if (ret == 0)
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return;
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}
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consistent_free(vaddr, size, dma_handle);
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}
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir);
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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consistent_sync(vaddr, size, (int)dir);
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}
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static inline dma_addr_t dma_map_single(struct device *dev,
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void *ptr, size_t size,
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enum dma_data_direction dir)
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@ -205,4 +175,18 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
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{
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return dma_addr == 0;
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}
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#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
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extern int
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dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size, int flags);
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extern void
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dma_release_declared_memory(struct device *dev);
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extern void *
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dma_mark_declared_memory_occupied(struct device *dev,
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dma_addr_t device_addr, size_t size);
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#endif /* __ASM_SH_DMA_MAPPING_H */
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