pinctrl: sirf: enable GPIO pullup/down configuration from dts
commit 7bec207427
remove sirfsoc_gpio_set_pull function,
this patches takes the feature back by adding sirf,pullups and
sirf,pulldowns prop in dts, and the driver will set the GPIO
pull according to the dts.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -6,6 +6,9 @@ Required properties:
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- interrupts : Interrupts used by every GPIO group
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- interrupts : Interrupts used by every GPIO group
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- gpio-controller : Indicates this device is a GPIO controller
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- gpio-controller : Indicates this device is a GPIO controller
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- interrupt-controller : Marks the device node as an interrupt controller
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- interrupt-controller : Marks the device node as an interrupt controller
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Optional properties:
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- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
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- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
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Please refer to pinctrl-bindings.txt in this directory for details of the common
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Please refer to pinctrl-bindings.txt in this directory for details of the common
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pinctrl bindings used by client devices.
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pinctrl bindings used by client devices.
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@ -1663,6 +1663,44 @@ const struct irq_domain_ops sirfsoc_gpio_irq_simple_ops = {
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.xlate = irq_domain_xlate_twocell,
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.xlate = irq_domain_xlate_twocell,
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};
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};
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static void sirfsoc_gpio_set_pullup(const u32 *pullups)
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{
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int i, n;
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const unsigned long *p = (const unsigned long *)pullups;
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for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
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n = find_first_bit(p + i, BITS_PER_LONG);
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while (n < BITS_PER_LONG) {
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u32 offset = SIRFSOC_GPIO_CTRL(i, n);
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u32 val = readl(sgpio_bank[i].chip.regs + offset);
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val |= SIRFSOC_GPIO_CTL_PULL_MASK;
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val |= SIRFSOC_GPIO_CTL_PULL_HIGH;
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writel(val, sgpio_bank[i].chip.regs + offset);
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n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
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}
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}
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}
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static void sirfsoc_gpio_set_pulldown(const u32 *pulldowns)
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{
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int i, n;
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const unsigned long *p = (const unsigned long *)pulldowns;
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for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
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n = find_first_bit(p + i, BITS_PER_LONG);
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while (n < BITS_PER_LONG) {
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u32 offset = SIRFSOC_GPIO_CTRL(i, n);
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u32 val = readl(sgpio_bank[i].chip.regs + offset);
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val |= SIRFSOC_GPIO_CTL_PULL_MASK;
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val &= ~SIRFSOC_GPIO_CTL_PULL_HIGH;
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writel(val, sgpio_bank[i].chip.regs + offset);
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n = find_next_bit(p + i, BITS_PER_LONG, n + 1);
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}
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}
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}
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static int __devinit sirfsoc_gpio_probe(struct device_node *np)
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static int __devinit sirfsoc_gpio_probe(struct device_node *np)
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{
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{
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int i, err = 0;
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int i, err = 0;
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@ -1671,6 +1709,8 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
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struct platform_device *pdev;
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struct platform_device *pdev;
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bool is_marco = false;
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bool is_marco = false;
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u32 pullups[SIRFSOC_GPIO_NO_OF_BANKS], pulldowns[SIRFSOC_GPIO_NO_OF_BANKS];
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pdev = of_find_device_by_node(np);
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pdev = of_find_device_by_node(np);
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if (!pdev)
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if (!pdev)
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return -ENODEV;
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return -ENODEV;
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@ -1726,6 +1766,14 @@ static int __devinit sirfsoc_gpio_probe(struct device_node *np)
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irq_set_handler_data(bank->parent_irq, bank);
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irq_set_handler_data(bank->parent_irq, bank);
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}
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}
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if (!of_property_read_u32_array(np, "sirf,pullups", pullups,
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SIRFSOC_GPIO_NO_OF_BANKS))
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sirfsoc_gpio_set_pullup(pullups);
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if (!of_property_read_u32_array(np, "sirf,pulldowns", pulldowns,
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SIRFSOC_GPIO_NO_OF_BANKS))
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sirfsoc_gpio_set_pulldown(pulldowns);
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return 0;
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return 0;
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out:
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out:
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