ASoC: rt5514: The DSP clock can be calibrated by the other clock source
Add the option for the DSP clock that can be calibrated by the other clock source. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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28aef24d72
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@ -14,6 +14,8 @@
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struct rt5514_platform_data {
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unsigned int dmic_init_delay;
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const char *dsp_calib_clk_name;
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unsigned int dsp_calib_clk_rate;
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};
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#endif
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@ -370,6 +370,7 @@ int rt5514_spi_burst_read(unsigned int addr, u8 *rxbuf, size_t len)
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return true;
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}
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EXPORT_SYMBOL_GPL(rt5514_spi_burst_read);
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/**
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* rt5514_spi_burst_write - Write data to SPI by rt5514 address.
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@ -295,6 +295,33 @@ static int rt5514_dsp_voice_wake_up_get(struct snd_kcontrol *kcontrol,
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return 0;
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}
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static int rt5514_calibration(struct rt5514_priv *rt5514, bool on)
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{
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if (on) {
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regmap_write(rt5514->regmap, RT5514_ANA_CTRL_PLL3, 0x0000000a);
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regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, 0xf,
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0xa);
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regmap_update_bits(rt5514->regmap, RT5514_PWR_ANA1, 0x301,
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0x301);
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regmap_write(rt5514->regmap, RT5514_PLL3_CALIB_CTRL4,
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0x80000000 | rt5514->pll3_cal_value);
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regmap_write(rt5514->regmap, RT5514_PLL3_CALIB_CTRL1,
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0x8bb80800);
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regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
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0xc0000000, 0x80000000);
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regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
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0xc0000000, 0xc0000000);
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} else {
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regmap_update_bits(rt5514->regmap, RT5514_PLL3_CALIB_CTRL5,
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0xc0000000, 0x40000000);
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regmap_update_bits(rt5514->regmap, RT5514_PWR_ANA1, 0x301, 0);
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regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, 0xf,
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0x4);
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}
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return 0;
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}
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static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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@ -302,6 +329,7 @@ static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
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struct rt5514_priv *rt5514 = snd_soc_component_get_drvdata(component);
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struct snd_soc_codec *codec = rt5514->codec;
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const struct firmware *fw = NULL;
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u8 buf[8];
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if (ucontrol->value.integer.value[0] == rt5514->dsp_enabled)
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return 0;
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@ -310,6 +338,35 @@ static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
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rt5514->dsp_enabled = ucontrol->value.integer.value[0];
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if (rt5514->dsp_enabled) {
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if (rt5514->pdata.dsp_calib_clk_name &&
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!IS_ERR(rt5514->dsp_calib_clk)) {
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if (clk_set_rate(rt5514->dsp_calib_clk,
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rt5514->pdata.dsp_calib_clk_rate))
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dev_err(codec->dev,
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"Can't set rate for mclk");
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if (clk_prepare_enable(rt5514->dsp_calib_clk))
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dev_err(codec->dev,
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"Can't enable dsp_calib_clk");
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rt5514_calibration(rt5514, true);
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msleep(20);
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#if IS_ENABLED(CONFIG_SND_SOC_RT5514_SPI)
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rt5514_spi_burst_read(RT5514_PLL3_CALIB_CTRL6 |
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RT5514_DSP_MAPPING,
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(u8 *)&buf, sizeof(buf));
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#else
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dev_err(codec->dev, "There is no SPI driver for"
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" loading the firmware\n");
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#endif
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rt5514->pll3_cal_value = buf[0] | buf[1] << 8 |
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buf[2] << 16 | buf[3] << 24;
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rt5514_calibration(rt5514, false);
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clk_disable_unprepare(rt5514->dsp_calib_clk);
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}
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rt5514_enable_dsp_prepare(rt5514);
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request_firmware(&fw, RT5514_FIRMWARE1, codec->dev);
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@ -341,6 +398,20 @@ static int rt5514_dsp_voice_wake_up_put(struct snd_kcontrol *kcontrol,
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/* DSP run */
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regmap_write(rt5514->i2c_regmap, 0x18002f00,
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0x00055148);
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if (rt5514->pdata.dsp_calib_clk_name &&
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!IS_ERR(rt5514->dsp_calib_clk)) {
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msleep(20);
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regmap_write(rt5514->i2c_regmap, 0x1800211c,
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rt5514->pll3_cal_value);
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regmap_write(rt5514->i2c_regmap, 0x18002124,
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0x00220012);
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regmap_write(rt5514->i2c_regmap, 0x18002124,
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0x80220042);
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regmap_write(rt5514->i2c_regmap, 0x18002124,
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0xe0220042);
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}
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} else {
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regmap_multi_reg_write(rt5514->i2c_regmap,
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rt5514_i2c_patch, ARRAY_SIZE(rt5514_i2c_patch));
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@ -1024,12 +1095,22 @@ static int rt5514_set_bias_level(struct snd_soc_codec *codec,
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static int rt5514_probe(struct snd_soc_codec *codec)
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{
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struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec);
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struct platform_device *pdev = container_of(codec->dev,
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struct platform_device, dev);
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rt5514->mclk = devm_clk_get(codec->dev, "mclk");
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if (PTR_ERR(rt5514->mclk) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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if (rt5514->pdata.dsp_calib_clk_name) {
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rt5514->dsp_calib_clk = devm_clk_get(&pdev->dev,
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rt5514->pdata.dsp_calib_clk_name);
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if (PTR_ERR(rt5514->dsp_calib_clk) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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}
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rt5514->codec = codec;
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rt5514->pll3_cal_value = 0x0078b000;
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return 0;
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}
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@ -1147,6 +1228,10 @@ static int rt5514_parse_dp(struct rt5514_priv *rt5514, struct device *dev)
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{
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device_property_read_u32(dev, "realtek,dmic-init-delay-ms",
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&rt5514->pdata.dmic_init_delay);
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device_property_read_string(dev, "realtek,dsp-calib-clk-name",
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&rt5514->pdata.dsp_calib_clk_name);
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device_property_read_u32(dev, "realtek,dsp-calib-clk-rate",
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&rt5514->pdata.dsp_calib_clk_rate);
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return 0;
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}
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@ -34,7 +34,9 @@
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#define RT5514_CLK_CTRL1 0x2104
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#define RT5514_CLK_CTRL2 0x2108
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#define RT5514_PLL3_CALIB_CTRL1 0x2110
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#define RT5514_PLL3_CALIB_CTRL4 0x2120
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#define RT5514_PLL3_CALIB_CTRL5 0x2124
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#define RT5514_PLL3_CALIB_CTRL6 0x2128
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#define RT5514_DELAY_BUF_CTRL1 0x2140
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#define RT5514_DELAY_BUF_CTRL3 0x2148
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#define RT5514_ASRC_IN_CTRL1 0x2180
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@ -272,7 +274,7 @@ struct rt5514_priv {
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struct rt5514_platform_data pdata;
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struct snd_soc_codec *codec;
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struct regmap *i2c_regmap, *regmap;
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struct clk *mclk;
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struct clk *mclk, *dsp_calib_clk;
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int sysclk;
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int sysclk_src;
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int lrck;
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@ -281,6 +283,7 @@ struct rt5514_priv {
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int pll_in;
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int pll_out;
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int dsp_enabled;
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unsigned int pll3_cal_value;
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};
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#endif /* __RT5514_H__ */
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