tg3: Fix 5761 NVRAM sizes
The 5761 NVRAM sizes assigned to the nvram_size member are half as big as they should be. This patch corrects the NVRAM sizes and replaces the hardcoded constants with preprocessor constants for readability. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -9894,7 +9894,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
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return;
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}
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}
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tp->nvram_size = 0x80000;
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tp->nvram_size = TG3_NVRAM_SIZE_512KB;
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}
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static void __devinit tg3_get_nvram_info(struct tg3 *tp)
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@ -10035,11 +10035,14 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
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tp->nvram_pagesize = 264;
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if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||
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nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)
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tp->nvram_size = (protect ? 0x3e200 : 0x80000);
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tp->nvram_size = (protect ? 0x3e200 :
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TG3_NVRAM_SIZE_512KB);
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else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)
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tp->nvram_size = (protect ? 0x1f200 : 0x40000);
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tp->nvram_size = (protect ? 0x1f200 :
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TG3_NVRAM_SIZE_256KB);
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else
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tp->nvram_size = (protect ? 0x1f200 : 0x20000);
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tp->nvram_size = (protect ? 0x1f200 :
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TG3_NVRAM_SIZE_128KB);
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break;
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case FLASH_5752VENDOR_ST_M45PE10:
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case FLASH_5752VENDOR_ST_M45PE20:
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@ -10049,11 +10052,17 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
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tp->tg3_flags2 |= TG3_FLG2_FLASH;
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tp->nvram_pagesize = 256;
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if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)
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tp->nvram_size = (protect ? 0x10000 : 0x20000);
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tp->nvram_size = (protect ?
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TG3_NVRAM_SIZE_64KB :
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TG3_NVRAM_SIZE_128KB);
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else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)
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tp->nvram_size = (protect ? 0x10000 : 0x40000);
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tp->nvram_size = (protect ?
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TG3_NVRAM_SIZE_64KB :
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TG3_NVRAM_SIZE_256KB);
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else
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tp->nvram_size = (protect ? 0x20000 : 0x80000);
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tp->nvram_size = (protect ?
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TG3_NVRAM_SIZE_128KB :
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TG3_NVRAM_SIZE_512KB);
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break;
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}
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}
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@ -10147,25 +10156,25 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp)
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case FLASH_5761VENDOR_ATMEL_MDB161D:
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case FLASH_5761VENDOR_ST_A_M45PE16:
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case FLASH_5761VENDOR_ST_M_M45PE16:
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tp->nvram_size = 0x100000;
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tp->nvram_size = TG3_NVRAM_SIZE_2MB;
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break;
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case FLASH_5761VENDOR_ATMEL_ADB081D:
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case FLASH_5761VENDOR_ATMEL_MDB081D:
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case FLASH_5761VENDOR_ST_A_M45PE80:
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case FLASH_5761VENDOR_ST_M_M45PE80:
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tp->nvram_size = 0x80000;
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tp->nvram_size = TG3_NVRAM_SIZE_1MB;
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break;
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case FLASH_5761VENDOR_ATMEL_ADB041D:
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case FLASH_5761VENDOR_ATMEL_MDB041D:
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case FLASH_5761VENDOR_ST_A_M45PE40:
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case FLASH_5761VENDOR_ST_M_M45PE40:
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tp->nvram_size = 0x40000;
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tp->nvram_size = TG3_NVRAM_SIZE_512KB;
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break;
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case FLASH_5761VENDOR_ATMEL_ADB021D:
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case FLASH_5761VENDOR_ATMEL_MDB021D:
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case FLASH_5761VENDOR_ST_A_M45PE20:
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case FLASH_5761VENDOR_ST_M_M45PE20:
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tp->nvram_size = 0x20000;
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tp->nvram_size = TG3_NVRAM_SIZE_256KB;
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break;
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}
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}
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@ -2576,6 +2576,13 @@ struct tg3 {
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int nvram_lock_cnt;
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u32 nvram_size;
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#define TG3_NVRAM_SIZE_64KB 0x00010000
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#define TG3_NVRAM_SIZE_128KB 0x00020000
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#define TG3_NVRAM_SIZE_256KB 0x00040000
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#define TG3_NVRAM_SIZE_512KB 0x00080000
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#define TG3_NVRAM_SIZE_1MB 0x00100000
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#define TG3_NVRAM_SIZE_2MB 0x00200000
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u32 nvram_pagesize;
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u32 nvram_jedecnum;
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@ -2584,10 +2591,10 @@ struct tg3 {
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#define JEDEC_SAIFUN 0x4f
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#define JEDEC_SST 0xbf
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#define ATMEL_AT24C64_CHIP_SIZE (64 * 1024)
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#define ATMEL_AT24C64_CHIP_SIZE TG3_NVRAM_SIZE_64KB
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#define ATMEL_AT24C64_PAGE_SIZE (32)
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#define ATMEL_AT24C512_CHIP_SIZE (512 * 1024)
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#define ATMEL_AT24C512_CHIP_SIZE TG3_NVRAM_SIZE_512KB
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#define ATMEL_AT24C512_PAGE_SIZE (128)
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#define ATMEL_AT45DB0X1B_PAGE_POS 9
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