[PATCH] xtensa: fix irq and misc fixes
Update the architecture specific interrupt handling code for Xtensa to support the new API. Use generic BUG macros in bug.h, and some minor fixes. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>wifi-calibration
Chris Zankel
Linus Torvalds
parent
5fcf7bb73f
commit
fd43fe19b8
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@ -4,7 +4,7 @@
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* Xtensa built-in interrupt controller and some generic functions copied
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* from i386.
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*
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* Copyright (C) 2002 - 2005 Tensilica, Inc.
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* Copyright (C) 2002 - 2006 Tensilica, Inc.
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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*
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@ -22,11 +22,6 @@
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#include <asm/uaccess.h>
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#include <asm/platform.h>
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static void enable_xtensa_irq(unsigned int irq);
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static void disable_xtensa_irq(unsigned int irq);
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static void mask_and_ack_xtensa(unsigned int irq);
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static void end_xtensa_irq(unsigned int irq);
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static unsigned int cached_irq_mask;
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atomic_t irq_err_count;
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@ -46,8 +41,16 @@ void ack_bad_irq(unsigned int irq)
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* handlers).
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*/
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unsigned int do_IRQ(int irq, struct pt_regs *regs)
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asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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struct irq_desc *desc = irq_desc + irq;
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if (irq >= NR_IRQS) {
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printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
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__FUNCTION__, irq);
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}
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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@ -63,12 +66,10 @@ unsigned int do_IRQ(int irq, struct pt_regs *regs)
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sp - sizeof(struct thread_info));
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}
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#endif
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__do_IRQ(irq, regs);
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desc->handle_irq(irq, desc);
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irq_exit();
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return 1;
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set_irq_regs(old_regs);
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}
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/*
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@ -118,72 +119,68 @@ skip:
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}
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return 0;
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}
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/* shutdown is same as "disable" */
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#define shutdown_xtensa_irq disable_xtensa_irq
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static unsigned int startup_xtensa_irq(unsigned int irq)
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{
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enable_xtensa_irq(irq);
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return 0; /* never anything pending */
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}
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static struct hw_interrupt_type xtensa_irq_type = {
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"Xtensa-IRQ",
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startup_xtensa_irq,
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shutdown_xtensa_irq,
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enable_xtensa_irq,
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disable_xtensa_irq,
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mask_and_ack_xtensa,
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end_xtensa_irq
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};
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static inline void mask_irq(unsigned int irq)
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static void xtensa_irq_mask(unsigned int irq)
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{
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cached_irq_mask &= ~(1 << irq);
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set_sr (cached_irq_mask, INTENABLE);
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}
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static inline void unmask_irq(unsigned int irq)
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static void xtensa_irq_unmask(unsigned int irq)
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{
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cached_irq_mask |= 1 << irq;
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set_sr (cached_irq_mask, INTENABLE);
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}
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static void disable_xtensa_irq(unsigned int irq)
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static void xtensa_irq_ack(unsigned int irq)
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{
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unsigned long flags;
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local_save_flags(flags);
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mask_irq(irq);
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local_irq_restore(flags);
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set_sr(1 << irq, INTCLEAR);
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}
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static void enable_xtensa_irq(unsigned int irq)
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static int xtensa_irq_retrigger(unsigned int irq)
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{
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unsigned long flags;
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local_save_flags(flags);
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unmask_irq(irq);
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local_irq_restore(flags);
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set_sr (1 << irq, INTSET);
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return 1;
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}
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static void mask_and_ack_xtensa(unsigned int irq)
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{
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disable_xtensa_irq(irq);
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}
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static void end_xtensa_irq(unsigned int irq)
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{
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enable_xtensa_irq(irq);
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}
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static struct irq_chip xtensa_irq_chip = {
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.name = "xtensa",
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.mask = xtensa_irq_mask,
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.unmask = xtensa_irq_unmask,
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.ack = xtensa_irq_ack,
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.retrigger = xtensa_irq_retrigger,
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};
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void __init init_IRQ(void)
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{
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int i;
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int index;
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for (i=0; i < XTENSA_NR_IRQS; i++)
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irq_desc[i].chip = &xtensa_irq_type;
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for (index = 0; index < XTENSA_NR_IRQS; index++) {
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int mask = 1 << index;
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if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_simple_irq);
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else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_edge_irq);
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else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_level_irq);
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else if (mask & XCHAL_INTTYPE_MASK_TIMER)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_edge_irq);
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else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
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/* XCHAL_INTTYPE_MASK_NMI */
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_level_irq);
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}
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cached_irq_mask = 0;
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platform_init_irq();
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}
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@ -47,7 +47,7 @@ unsigned long long sched_clock(void)
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return (unsigned long long)jiffies * (1000000000 / HZ);
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}
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static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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static irqreturn_t timer_interrupt(int irq, void *dev_id);
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED,
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@ -150,7 +150,7 @@ EXPORT_SYMBOL(do_gettimeofday);
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* The timer interrupt is called HZ times per second.
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*/
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irqreturn_t timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
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irqreturn_t timer_interrupt (int irq, void *dev_id)
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{
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unsigned long next;
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@ -160,9 +160,9 @@ irqreturn_t timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
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again:
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while ((signed long)(get_ccount() - next) > 0) {
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profile_tick(CPU_PROFILING, regs);
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profile_tick(CPU_PROFILING);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(regs));
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update_process_times(user_mode(get_irq_regs()));
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#endif
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write_seqlock(&xtime_lock);
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@ -17,6 +17,7 @@
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#include <asm-generic/vmlinux.lds.h>
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#define _NOCLANGUAGE
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#undef __ASSEMBLER__
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#include <xtensa/config/core.h>
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#include <xtensa/config/system.h>
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OUTPUT_ARCH(xtensa)
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@ -13,29 +13,6 @@
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#ifndef _XTENSA_BUG_H
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#define _XTENSA_BUG_H
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#include <linux/stringify.h>
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#define ILL __asm__ __volatile__ (".byte 0,0,0\n")
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#ifdef CONFIG_KALLSYMS
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# define BUG() do { \
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printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
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ILL; \
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} while (0)
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#else
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# define BUG() do { \
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printk("kernel BUG!\n"); \
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ILL; \
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} while (0)
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#endif
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#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
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#define PAGE_BUG(page) do { BUG(); } while (0)
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#define WARN_ON(condition) do { \
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if (unlikely((condition)!=0)) { \
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printk ("Warning in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
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dump_stack(); \
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} \
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} while (0)
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#include <asm-generic/bug.h>
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#endif /* _XTENSA_BUG_H */
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@ -14,7 +14,7 @@
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#include <asm/processor.h>
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#include <asm/types.h>
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static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
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static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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{
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__u32 res;
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/* instruction sequence from Xtensa ISA release 2/2000 */
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@ -29,7 +29,7 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
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return res;
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}
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static __inline__ __const__ __u16 ___arch__swab16(__u16 x)
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static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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{
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/* Given that 'short' values are signed (i.e., can be negative),
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* we cannot assume that the upper 16-bits of the register are
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@ -0,0 +1 @@
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#include <asm-generic/irq_regs.h>
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@ -218,6 +218,8 @@
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#define SYSXTENSA_COUNT 5 /* count of syscall0 functions*/
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#ifdef __KERNEL__
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/*
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* "Conditional" syscalls
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*
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@ -230,6 +232,7 @@
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#define __ARCH_WANT_SYS_UTIME
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#define __ARCH_WANT_SYS_LLSEEK
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#define __ARCH_WANT_SYS_RT_SIGACTION
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_UNISTD_H */
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@ -115,7 +115,7 @@
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/* ... */
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#ifdef _ASMLANGUAGE
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#ifdef __ASSEMBLER__
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/*
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* Assembly-language specific definitions (assembly macros, etc.).
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*/
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