e1000e: MDIO slow mode should always be done for 82577
A previous 82577 workaround that set the MDIO access speed to slow mode for every PHY register read/write when the cable is unplugged should instead set the access mode to always be slow before any PHY register access. Since the mode bit gets cleared when the PHY is reset, set the mode after every PHY reset. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8c47eaa766
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@ -582,7 +582,6 @@ extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
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extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
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extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
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u16 data);
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extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
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extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
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extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
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extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
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@ -138,6 +138,10 @@
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#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */
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#define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */
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/* KMRN Mode Control */
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#define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
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#define HV_KMRN_MDIO_SLOW 0x0400
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/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
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/* Offset 04h HSFSTS */
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union ich8_hws_flash_status {
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@ -219,6 +223,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
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static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
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static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
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static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
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static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
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static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
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{
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@ -270,7 +275,21 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
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phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
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phy->id = e1000_phy_unknown;
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e1000e_get_phy_id(hw);
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ret_val = e1000e_get_phy_id(hw);
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if (ret_val)
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goto out;
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if ((phy->id == 0) || (phy->id == PHY_REVISION_MASK)) {
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/*
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* In case the PHY needs to be in mdio slow mode (eg. 82577),
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* set slow mode and try to get the PHY id again.
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*/
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ret_val = e1000_set_mdio_slow_mode_hv(hw);
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if (ret_val)
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goto out;
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ret_val = e1000e_get_phy_id(hw);
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if (ret_val)
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goto out;
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}
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phy->type = e1000e_get_phy_type_from_id(phy->id);
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switch (phy->type) {
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@ -292,6 +311,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
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break;
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}
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out:
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return ret_val;
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}
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@ -1075,6 +1095,26 @@ out:
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}
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/**
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* e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode
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* @hw: pointer to the HW structure
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**/
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static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
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{
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s32 ret_val;
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u16 data;
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ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data);
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if (ret_val)
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return ret_val;
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data |= HV_KMRN_MDIO_SLOW;
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ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data);
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return ret_val;
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}
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/**
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* e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
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* done after every PHY reset.
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@ -1086,6 +1126,13 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
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if (hw->mac.type != e1000_pchlan)
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return ret_val;
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/* Set MDIO slow mode before any other MDIO access */
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if (hw->phy.type == e1000_phy_82577) {
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ret_val = e1000_set_mdio_slow_mode_hv(hw);
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if (ret_val)
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goto out;
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}
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if (((hw->phy.type == e1000_phy_82577) &&
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((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||
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((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {
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@ -1184,6 +1231,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
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/* Allow time for h/w to get to a quiescent state after reset */
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mdelay(10);
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/* Perform any necessary post-reset workarounds */
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if (hw->mac.type == e1000_pchlan) {
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ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
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if (ret_val)
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@ -2484,6 +2532,10 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
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if (!ret_val)
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e1000_release_swflag_ich8lan(hw);
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/* Perform any necessary post-reset workarounds */
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if (hw->mac.type == e1000_pchlan)
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ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
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if (ctrl & E1000_CTRL_PHY_RST)
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ret_val = hw->phy.ops.get_cfg_done(hw);
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@ -2528,9 +2580,6 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
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kab |= E1000_KABGTXD_BGSQLBIAS;
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ew32(KABGTXD, kab);
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if (hw->mac.type == e1000_pchlan)
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ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
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out:
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return ret_val;
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}
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@ -152,32 +152,9 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw)
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if (phy->id != 0 && phy->id != PHY_REVISION_MASK)
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goto out;
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/*
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* If the PHY ID is still unknown, we may have an 82577
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* without link. We will try again after setting Slow MDIC
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* mode. No harm in trying again in this case since the PHY
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* ID is unknown at this point anyway.
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*/
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ret_val = phy->ops.acquire(hw);
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if (ret_val)
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goto out;
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ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
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if (ret_val)
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goto out;
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phy->ops.release(hw);
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retry_count++;
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}
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out:
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/* Revert to MDIO fast mode, if applicable */
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if (retry_count) {
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ret_val = phy->ops.acquire(hw);
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if (ret_val)
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return ret_val;
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ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
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phy->ops.release(hw);
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}
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return ret_val;
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}
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@ -2790,38 +2767,6 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
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return 0;
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}
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/**
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* e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode
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* @hw: pointer to the HW structure
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* @slow: true for slow mode, false for normal mode
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*
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* Assumes semaphore already acquired.
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**/
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s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow)
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{
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s32 ret_val = 0;
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u16 data = 0;
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/* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */
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hw->phy.addr = 1;
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ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
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(BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
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if (ret_val)
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goto out;
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ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1,
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(0x2180 | (slow << 10)));
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if (ret_val)
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goto out;
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/* dummy read when reverting to fast mode - throw away result */
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if (!slow)
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ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);
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out:
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return ret_val;
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}
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/**
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* __e1000_read_phy_reg_hv - Read HV PHY register
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* @hw: pointer to the HW structure
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s32 ret_val;
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u16 page = BM_PHY_REG_PAGE(offset);
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u16 reg = BM_PHY_REG_NUM(offset);
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bool in_slow_mode = false;
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if (!locked) {
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ret_val = hw->phy.ops.acquire(hw);
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return ret_val;
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}
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/* Workaround failure in MDIO access while cable is disconnected */
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if ((hw->phy.type == e1000_phy_82577) &&
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!(er32(STATUS) & E1000_STATUS_LU)) {
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ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
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if (ret_val)
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goto out;
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in_slow_mode = true;
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}
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/* Page 800 works differently than the rest so it has its own func */
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if (page == BM_WUC_PAGE) {
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ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
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ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
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data);
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out:
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/* Revert to MDIO fast mode, if applicable */
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if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
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ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
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if (!locked)
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hw->phy.ops.release(hw);
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@ -2948,7 +2878,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
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s32 ret_val;
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u16 page = BM_PHY_REG_PAGE(offset);
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u16 reg = BM_PHY_REG_NUM(offset);
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bool in_slow_mode = false;
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if (!locked) {
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ret_val = hw->phy.ops.acquire(hw);
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@ -2956,16 +2885,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
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return ret_val;
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}
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/* Workaround failure in MDIO access while cable is disconnected */
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if ((hw->phy.type == e1000_phy_82577) &&
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!(er32(STATUS) & E1000_STATUS_LU)) {
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ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
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if (ret_val)
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goto out;
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in_slow_mode = true;
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}
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/* Page 800 works differently than the rest so it has its own func */
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if (page == BM_WUC_PAGE) {
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ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
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data);
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out:
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/* Revert to MDIO fast mode, if applicable */
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if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
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ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
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if (!locked)
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hw->phy.ops.release(hw);
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