[TG3]: consolidate all DMA water mark settings
Consolidate all DMA watermark settings for standard and jumbo frames on all chips in tg3_init_bufmgr_config() and add new settings for 5780. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -9826,19 +9826,35 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
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static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
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{
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tp->bufmgr_config.mbuf_read_dma_low_water =
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DEFAULT_MB_RDMA_LOW_WATER;
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tp->bufmgr_config.mbuf_mac_rx_low_water =
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DEFAULT_MB_MACRX_LOW_WATER;
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tp->bufmgr_config.mbuf_high_water =
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DEFAULT_MB_HIGH_WATER;
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if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
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tp->bufmgr_config.mbuf_read_dma_low_water =
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DEFAULT_MB_RDMA_LOW_WATER_5705;
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tp->bufmgr_config.mbuf_mac_rx_low_water =
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DEFAULT_MB_MACRX_LOW_WATER_5705;
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tp->bufmgr_config.mbuf_high_water =
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DEFAULT_MB_HIGH_WATER_5705;
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tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
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DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
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tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
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DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
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tp->bufmgr_config.mbuf_high_water_jumbo =
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DEFAULT_MB_HIGH_WATER_JUMBO;
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tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
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DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780;
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tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
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DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780;
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tp->bufmgr_config.mbuf_high_water_jumbo =
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DEFAULT_MB_HIGH_WATER_JUMBO_5780;
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} else {
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tp->bufmgr_config.mbuf_read_dma_low_water =
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DEFAULT_MB_RDMA_LOW_WATER;
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tp->bufmgr_config.mbuf_mac_rx_low_water =
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DEFAULT_MB_MACRX_LOW_WATER;
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tp->bufmgr_config.mbuf_high_water =
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DEFAULT_MB_HIGH_WATER;
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tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
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DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
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tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
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DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
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tp->bufmgr_config.mbuf_high_water_jumbo =
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DEFAULT_MB_HIGH_WATER_JUMBO;
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}
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tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER;
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tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER;
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@ -10052,8 +10068,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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tg3_init_link_config(tp);
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tg3_init_bufmgr_config(tp);
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tp->rx_pending = TG3_DEF_RX_RING_PENDING;
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tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
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tp->tx_pending = TG3_DEF_TX_RING_PENDING;
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@ -10082,14 +10096,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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goto err_out_iounmap;
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}
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if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
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tp->bufmgr_config.mbuf_read_dma_low_water =
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DEFAULT_MB_RDMA_LOW_WATER_5705;
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tp->bufmgr_config.mbuf_mac_rx_low_water =
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DEFAULT_MB_MACRX_LOW_WATER_5705;
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tp->bufmgr_config.mbuf_high_water =
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DEFAULT_MB_HIGH_WATER_5705;
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}
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tg3_init_bufmgr_config(tp);
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#if TG3_TSO_SUPPORT != 0
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
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@ -985,14 +985,17 @@
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#define DEFAULT_MB_RDMA_LOW_WATER 0x00000050
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#define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000
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#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
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#define DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000
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#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414
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#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
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#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
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#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
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#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
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#define BUFMGR_MB_HIGH_WATER 0x00004418
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#define DEFAULT_MB_HIGH_WATER 0x00000060
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#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
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#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
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#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
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#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
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#define BUFMGR_MB_ALLOC_BIT 0x10000000
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#define BUFMGR_RX_MB_ALLOC_RESP 0x00004420
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