sgi-gru: misc GRU cleanup
Misc trivial GRU drivers fixes: - fix long lines - eliminate extra whitespace - eliminate compiler warning - better validation of invalidate user parameters - bug fix for GRU TLB flush (not the cpu TLB flush) These changes are all internal to the SGI GRU driver and have no effect on the base kernel. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Jack Steiner
Linus Torvalds
parent
66666e50fc
commit
fe5bb6b00c
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@ -19,8 +19,11 @@
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#ifndef __GRU_INSTRUCTIONS_H__
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#define __GRU_INSTRUCTIONS_H__
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#define gru_flush_cache_hook(p)
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#define gru_emulator_wait_hook(p, w)
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extern int gru_check_status_proc(void *cb);
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extern int gru_wait_proc(void *cb);
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extern void gru_wait_abort_proc(void *cb);
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/*
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* Architecture dependent functions
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@ -29,16 +32,16 @@
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#if defined(CONFIG_IA64)
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#include <linux/compiler.h>
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#include <asm/intrinsics.h>
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#define __flush_cache(p) ia64_fc(p)
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#define __flush_cache(p) ia64_fc((unsigned long)p)
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/* Use volatile on IA64 to ensure ordering via st4.rel */
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#define gru_ordered_store_int(p,v) \
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#define gru_ordered_store_int(p, v) \
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do { \
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barrier(); \
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*((volatile int *)(p)) = v; /* force st.rel */ \
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} while (0)
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#elif defined(CONFIG_X86_64)
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#define __flush_cache(p) clflush(p)
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#define gru_ordered_store_int(p,v) \
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#define gru_ordered_store_int(p, v) \
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do { \
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barrier(); \
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*(int *)p = v; \
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@ -558,20 +561,19 @@ extern int gru_get_cb_exception_detail(void *cb,
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#define GRU_EXC_STR_SIZE 256
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extern int gru_check_status_proc(void *cb);
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extern int gru_wait_proc(void *cb);
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extern void gru_wait_abort_proc(void *cb);
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/*
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* Control block definition for checking status
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*/
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struct gru_control_block_status {
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unsigned int icmd :1;
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unsigned int unused1 :31;
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unsigned int ima :3;
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unsigned int reserved0 :4;
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unsigned int unused1 :24;
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unsigned int unused2 :24;
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unsigned int istatus :2;
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unsigned int isubstatus :4;
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unsigned int inused3 :2;
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unsigned int unused3 :2;
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};
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/* Get CB status */
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@ -368,6 +368,7 @@ failupm:
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failfmm:
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/* FMM state on UPM call */
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gru_flush_cache(tfh);
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STAT(tlb_dropin_fail_fmm);
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gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
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return 0;
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@ -497,10 +498,8 @@ int gru_handle_user_call_os(unsigned long cb)
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if (!gts)
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return -EINVAL;
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if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
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ret = -EINVAL;
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if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
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goto exit;
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}
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/*
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* If force_unload is set, the UPM TLB fault is phony. The task
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@ -508,6 +507,10 @@ int gru_handle_user_call_os(unsigned long cb)
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* unload the context. The task will page fault and assign a new
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* context.
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*/
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if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
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gts->ts_blade != uv_numa_blade_id())
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gts->ts_force_unload = 1;
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ret = -EAGAIN;
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cbrnum = thread_cbr_number(gts, ucbnum);
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if (gts->ts_force_unload) {
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@ -541,11 +544,13 @@ int gru_get_exception_detail(unsigned long arg)
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if (!gts)
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return -EINVAL;
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if (gts->ts_gru) {
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ucbnum = get_cb_number((void *)excdet.cb);
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ucbnum = get_cb_number((void *)excdet.cb);
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if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
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ret = -EINVAL;
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} else if (gts->ts_gru) {
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cbrnum = thread_cbr_number(gts, ucbnum);
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cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
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prefetchw(cbe); /* Harmless on hardware, required for emulator */
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prefetchw(cbe);/* Harmless on hardware, required for emulator */
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excdet.opc = cbe->opccpy;
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excdet.exopc = cbe->exopccpy;
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excdet.ecause = cbe->ecause;
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@ -609,7 +614,7 @@ int gru_user_flush_tlb(unsigned long arg)
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if (!gts)
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return -EINVAL;
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gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.vaddr + req.len);
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gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
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gru_unlock_gts(gts);
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return 0;
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@ -45,7 +45,8 @@
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#include <asm/uv/uv_mmrs.h>
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struct gru_blade_state *gru_base[GRU_MAX_BLADES] __read_mostly;
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unsigned long gru_start_paddr, gru_end_paddr __read_mostly;
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unsigned long gru_start_paddr __read_mostly;
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unsigned long gru_end_paddr __read_mostly;
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struct gru_stats_s gru_stats;
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/* Guaranteed user available resources on each node */
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@ -101,7 +102,7 @@ static int gru_file_mmap(struct file *file, struct vm_area_struct *vma)
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return -EPERM;
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if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) ||
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vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
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vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
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return -EINVAL;
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vma->vm_flags |=
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@ -295,7 +296,7 @@ static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
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for_each_online_node(nid) {
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bid = uv_node_to_blade_id(nid);
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pnode = uv_node_to_pnode(nid);
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if (gru_base[bid])
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if (bid < 0 || gru_base[bid])
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continue;
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page = alloc_pages_node(nid, GFP_KERNEL, order);
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if (!page)
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@ -308,11 +309,11 @@ static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
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dsrbytes = 0;
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cbrs = 0;
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for (gru = gru_base[bid]->bs_grus, chip = 0;
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chip < GRU_CHIPLETS_PER_BLADE;
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chip < GRU_CHIPLETS_PER_BLADE;
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chip++, gru++) {
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paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip);
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vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip);
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gru_init_chiplet(gru, paddr, vaddr, bid, nid, chip);
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gru_init_chiplet(gru, paddr, vaddr, nid, bid, chip);
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n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
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cbrs = max(cbrs, n);
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n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES;
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@ -370,26 +371,26 @@ static int __init gru_init(void)
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void *gru_start_vaddr;
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if (!is_uv_system())
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return 0;
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return -ENODEV;
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#if defined CONFIG_IA64
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gru_start_paddr = 0xd000000000UL; /* ZZZZZZZZZZZZZZZZZZZ fixme */
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#else
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gru_start_paddr = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR) &
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0x7fffffffffffUL;
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#endif
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gru_start_vaddr = __va(gru_start_paddr);
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gru_end_paddr = gru_start_paddr + MAX_NUMNODES * GRU_SIZE;
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gru_end_paddr = gru_start_paddr + GRU_MAX_BLADES * GRU_SIZE;
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printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n",
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gru_start_paddr, gru_end_paddr);
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irq = get_base_irq();
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for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) {
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ret = request_irq(irq + chip, gru_intr, 0, id, NULL);
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/* TODO: fix irq handling on x86. For now ignore failures because
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/* TODO: fix irq handling on x86. For now ignore failure because
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* interrupts are not required & not yet fully supported */
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if (ret) {
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printk("!!!WARNING: GRU ignoring request failure!!!\n");
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printk(KERN_WARNING
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"!!!WARNING: GRU ignoring request failure!!!\n");
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ret = 0;
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}
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if (ret) {
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@ -469,7 +470,11 @@ struct vm_operations_struct gru_vm_ops = {
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.fault = gru_fault,
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};
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#ifndef MODULE
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fs_initcall(gru_init);
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#else
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module_init(gru_init);
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#endif
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module_exit(gru_exit);
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module_param(gru_options, ulong, 0644);
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@ -489,7 +489,7 @@ enum gru_cbr_state {
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* 64m 26 8
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* ...
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*/
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#define GRU_PAGESIZE(sh) ((((sh) > 20 ? (sh) + 2: (sh)) >> 1) - 6)
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#define GRU_PAGESIZE(sh) ((((sh) > 20 ? (sh) + 2 : (sh)) >> 1) - 6)
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#define GRU_SIZEAVAIL(sh) (1UL << GRU_PAGESIZE(sh))
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/* minimum TLB purge count to ensure a full purge */
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@ -122,7 +122,7 @@ int gru_get_cb_exception_detail(void *cb,
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struct gru_control_block_extended *cbe;
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cbe = get_cbe(GRUBASE(cb), get_cb_number(cb));
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prefetchw(cbe); /* Harmless on hardware, required for emulator */
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prefetchw(cbe); /* Harmless on hardware, required for emulator */
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excdet->opc = cbe->opccpy;
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excdet->exopc = cbe->exopccpy;
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excdet->ecause = cbe->ecause;
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@ -437,7 +437,7 @@ static int send_message_failure(void *cb,
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break;
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case CBSS_PUT_NACKED:
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STAT(mesq_send_put_nacked);
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m =mq + (gru_get_amo_value_head(cb) << 6);
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m = mq + (gru_get_amo_value_head(cb) << 6);
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gru_vstore(cb, m, gru_get_tri(mesg), XTYPE_CL, lines, 1, IMA);
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if (gru_wait(cb) == CBS_IDLE)
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ret = MQE_OK;
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@ -432,8 +432,8 @@ static inline long gru_copy_handle(void *d, void *s)
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return GRU_HANDLE_BYTES;
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}
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static void gru_prefetch_context(void *gseg, void *cb, void *cbe, unsigned long cbrmap,
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unsigned long length)
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static void gru_prefetch_context(void *gseg, void *cb, void *cbe,
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unsigned long cbrmap, unsigned long length)
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{
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int i, scr;
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@ -773,8 +773,8 @@ int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
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return VM_FAULT_SIGBUS;
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again:
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preempt_disable();
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mutex_lock(>s->ts_ctxlock);
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preempt_disable();
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if (gts->ts_gru) {
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if (gts->ts_gru->gs_blade_id != uv_numa_blade_id()) {
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STAT(migrated_nopfn_unload);
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@ -278,13 +278,12 @@ struct gru_stats_s {
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/* Generate a GRU asid value from a GRU base asid & a virtual address. */
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#if defined CONFIG_IA64
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#define VADDR_HI_BIT 64
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#define GRUREGION(addr) ((addr) >> (VADDR_HI_BIT - 3) & 3)
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#elif defined CONFIG_X86_64
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#define VADDR_HI_BIT 48
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#define GRUREGION(addr) (0) /* ZZZ could do better */
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#else
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#error "Unsupported architecture"
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#endif
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#define GRUREGION(addr) ((addr) >> (VADDR_HI_BIT - 3) & 3)
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#define GRUASID(asid, addr) ((asid) + GRUREGION(addr))
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/*------------------------------------------------------------------------------
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@ -297,12 +296,12 @@ struct gru_state;
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* This structure is pointed to from the mmstruct via the notifier pointer.
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* There is one of these per address space.
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*/
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struct gru_mm_tracker {
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unsigned int mt_asid_gen; /* ASID wrap count */
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int mt_asid; /* current base ASID for gru */
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unsigned short mt_ctxbitmap; /* bitmap of contexts using
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struct gru_mm_tracker { /* pack to reduce size */
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unsigned int mt_asid_gen:24; /* ASID wrap count */
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unsigned int mt_asid:24; /* current base ASID for gru */
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unsigned short mt_ctxbitmap:16;/* bitmap of contexts using
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asid */
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};
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} __attribute__ ((packed));
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struct gru_mm_struct {
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struct mmu_notifier ms_notifier;
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@ -359,6 +358,8 @@ struct gru_thread_state {
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required for contest */
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unsigned char ts_cbr_au_count;/* Number of CBR resources
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required for contest */
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char ts_blade; /* If >= 0, migrate context if
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ref from diferent blade */
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char ts_force_unload;/* force context to be unloaded
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after migration */
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char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
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@ -187,7 +187,7 @@ void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
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" FLUSH gruid %d, asid 0x%x, num %ld, cbmap 0x%x\n",
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gid, asid, num, asids->mt_ctxbitmap);
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tgh = get_lock_tgh_handle(gru);
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tgh_invalidate(tgh, start, 0, asid, grupagesize, 0,
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tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0,
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num - 1, asids->mt_ctxbitmap);
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get_unlock_tgh_handle(tgh);
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} else {
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@ -212,9 +212,8 @@ void gru_flush_all_tlb(struct gru_state *gru)
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gru_dbg(grudev, "gru %p, gid %d\n", gru, gru->gs_gid);
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tgh = get_lock_tgh_handle(gru);
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tgh_invalidate(tgh, 0, ~0, 0, 1, 1, GRUMAXINVAL - 1, 0);
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tgh_invalidate(tgh, 0, ~0, 0, 1, 1, GRUMAXINVAL - 1, 0xffff);
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get_unlock_tgh_handle(tgh);
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preempt_enable();
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}
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/*
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