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MIPS: Unify checks for sibling CPUs 

Up until now we have open-coded checks for whether CPUs are siblings,
with slight variations on whether we consider the package ID or not.

This will only get more complex when we introduce cluster support, so in
preparation for that this patch introduces a cpus_are_siblings()
function which can be used to check whether or not 2 CPUs are siblings
in a consistent manner.

By checking globalnumber with the VP ID masked out this also has the
neat side effect of being ready for multi-cluster systems already.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Rafael J. Wysocki <rjw@rjwysocki.net>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17011/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
zero-colors
Paul Burton 2017-08-12 19:49:37 -07:00 committed by Ralf Baechle
parent 856fbcee60
commit fe7a38c625
5 changed files with 28 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
arch/mips/include/asm/cpu-info.h
View File

@ -158,6 +158,23 @@ static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo)
extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core);
extern void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe);
static inline bool cpus_are_siblings(int cpua, int cpub)
{
struct cpuinfo_mips *infoa = &cpu_data[cpua];
struct cpuinfo_mips *infob = &cpu_data[cpub];
unsigned int gnuma, gnumb;
if (infoa->package != infob->package)
return false;
gnuma = infoa->globalnumber & ~MIPS_GLOBALNUMBER_VP;
gnumb = infob->globalnumber & ~MIPS_GLOBALNUMBER_VP;
if (gnuma != gnumb)
return false;
return true;
}
static inline unsigned long cpu_asid_inc(void)
{
return 1 << CONFIG_MIPS_ASID_SHIFT;

8
arch/mips/kernel/smp-cps.c
View File

@ -147,7 +147,7 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
cpu_has_dc_aliases ? "dcache aliasing" : "");
for_each_present_cpu(c) {
if (cpu_core(&cpu_data[c]))
if (!cpus_are_siblings(smp_processor_id(), c))
set_cpu_present(c, false);
}
}
@ -319,10 +319,10 @@ static void cps_boot_secondary(int cpu, struct task_struct *idle)
mips_cm_unlock_other();
}
if (core != cpu_core(&current_cpu_data)) {
if (!cpus_are_siblings(cpu, smp_processor_id())) {
/* Boot a VPE on another powered up core */
for (remote = 0; remote < NR_CPUS; remote++) {
if (cpu_core(&cpu_data[remote]) != core)
if (!cpus_are_siblings(cpu, remote))
continue;
if (cpu_online(remote))
break;
@ -431,7 +431,7 @@ void play_dead(void)
/* Look for another online VPE within the core */
for_each_online_cpu(cpu_death_sibling) {
if (cpu_core(&cpu_data[cpu_death_sibling]) != core)
if (!cpus_are_siblings(cpu, cpu_death_sibling))
continue;
/*

12
arch/mips/kernel/smp.c
View File

@ -96,8 +96,7 @@ static inline void set_cpu_sibling_map(int cpu)
if (smp_num_siblings > 1) {
for_each_cpu(i, &cpu_sibling_setup_map) {
if (cpu_data[cpu].package == cpu_data[i].package &&
cpu_core(&cpu_data[cpu]) == cpu_core(&cpu_data[i])) {
if (cpus_are_siblings(cpu, i)) {
cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
}
@ -134,8 +133,7 @@ void calculate_cpu_foreign_map(void)
for_each_online_cpu(i) {
core_present = 0;
for_each_cpu(k, &temp_foreign_map)
if (cpu_data[i].package == cpu_data[k].package &&
cpu_core(&cpu_data[i]) == cpu_core(&cpu_data[k]))
if (cpus_are_siblings(i, k))
core_present = 1;
if (!core_present)
cpumask_set_cpu(i, &temp_foreign_map);
@ -186,11 +184,11 @@ void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
if (mips_cpc_present()) {
for_each_cpu(cpu, mask) {
core = cpu_core(&cpu_data[cpu]);
if (core == cpu_core(&current_cpu_data))
if (cpus_are_siblings(cpu, smp_processor_id()))
continue;
core = cpu_core(&cpu_data[cpu]);
while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
mips_cm_lock_other(core, 0);
mips_cpc_lock_other(core);

2
drivers/cpuidle/cpuidle-cps.c
View File

@ -37,7 +37,7 @@ static int cps_nc_enter(struct cpuidle_device *dev,
* TODO: don't treat core 0 specially, just prevent the final core
* TODO: remap interrupt affinity temporarily
*/
if (!cpu_core(&cpu_data[dev->cpu]) && (index > STATE_NC_WAIT))
if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT))
index = STATE_NC_WAIT;
/* Select the appropriate cps_pm_state */

2
drivers/irqchip/irq-mips-cpu.c
View File

@ -101,7 +101,7 @@ static void mips_mt_send_ipi(struct irq_data *d, unsigned int cpu)
local_irq_save(flags);
/* We can only send IPIs to VPEs within the local core */
WARN_ON(cpu_data[cpu].core != current_cpu_data.core);
WARN_ON(!cpus_are_siblings(smp_processor_id(), cpu));
vpflags = dvpe();
settc(cpu_vpe_id(&cpu_data[cpu]));