palm_bk3710: fix IDECLK period calculation
The driver uses completely bogus rounding formula for calculating period from the IDECLK frequency which gives one-off period values (e.g. 11 ns with 100 MHz IDECLK) which in turn can lead to overclocked IDE transfer timings. Actually, rounding is just wrong in this case, so use a mere division for a safe result. While at it, also: - give 'ide_palm_clk' variable a more suitable name; - get rid of the useless 'ideclkp' variable; - drop the LISP stype 'p' postfix from the 'clkp' variable's name. :-) Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: mcherkashin@ru.mvista.com Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -76,7 +76,7 @@ struct palm_bk3710_udmatiming {
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#include "../ide-timing.h"
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static long ide_palm_clk;
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static unsigned ideclk_period; /* in nanoseconds */
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static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = {
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{160, 240}, /* UDMA Mode 0 */
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@ -86,8 +86,6 @@ static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = {
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{85, 60}, /* UDMA Mode 4 */
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};
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static struct clk *ideclkp;
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static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
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unsigned int mode)
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{
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@ -97,10 +95,10 @@ static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
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/* DMA Data Setup */
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t0 = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].cycletime,
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ide_palm_clk) - 1;
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tenv = DIV_ROUND_UP(20, ide_palm_clk) - 1;
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ideclk_period) - 1;
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tenv = DIV_ROUND_UP(20, ideclk_period) - 1;
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trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime,
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ide_palm_clk) - 1;
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ideclk_period) - 1;
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/* udmatim Register */
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val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0);
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@ -141,8 +139,8 @@ static void palm_bk3710_setdmamode(void __iomem *base, unsigned int dev,
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cycletime = max_t(int, t->cycle, min_cycle);
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/* DMA Data Setup */
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t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
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td = DIV_ROUND_UP(t->active, ide_palm_clk);
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t0 = DIV_ROUND_UP(cycletime, ideclk_period);
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td = DIV_ROUND_UP(t->active, ideclk_period);
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tkw = t0 - td - 1;
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td -= 1;
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@ -168,9 +166,9 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
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struct ide_timing *t;
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/* PIO Data Setup */
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t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
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t0 = DIV_ROUND_UP(cycletime, ideclk_period);
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t2 = DIV_ROUND_UP(ide_timing_find_mode(XFER_PIO_0 + mode)->active,
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ide_palm_clk);
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ideclk_period);
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t2i = t0 - t2 - 1;
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t2 -= 1;
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@ -192,8 +190,8 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
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/* TASKFILE Setup */
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t = ide_timing_find_mode(XFER_PIO_0 + mode);
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t0 = DIV_ROUND_UP(t->cyc8b, ide_palm_clk);
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t2 = DIV_ROUND_UP(t->act8b, ide_palm_clk);
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t0 = DIV_ROUND_UP(t->cyc8b, ideclk_period);
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t2 = DIV_ROUND_UP(t->act8b, ideclk_period);
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t2i = t0 - t2 - 1;
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t2 -= 1;
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@ -350,22 +348,22 @@ static const struct ide_port_info __devinitdata palm_bk3710_port_info = {
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static int __devinit palm_bk3710_probe(struct platform_device *pdev)
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{
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struct clk *clkp;
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struct clk *clk;
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struct resource *mem, *irq;
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ide_hwif_t *hwif;
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unsigned long base;
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unsigned long base, rate;
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int i;
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hw_regs_t hw;
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u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
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clkp = clk_get(NULL, "IDECLK");
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if (IS_ERR(clkp))
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clk = clk_get(NULL, "IDECLK");
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if (IS_ERR(clk))
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return -ENODEV;
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ideclkp = clkp;
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clk_enable(ideclkp);
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ide_palm_clk = clk_get_rate(ideclkp)/100000;
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ide_palm_clk = (10000/ide_palm_clk) + 1;
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clk_enable(clk);
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rate = clk_get_rate(clk);
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ideclk_period = 1000000000UL / rate;
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/* Register the IDE interface with Linux ATA Interface */
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memset(&hw, 0, sizeof(hw));
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