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Author SHA1 Message Date
Liu Ying a97435d292 MLK-16581-2 phy: mixel-lvds-combo: Get PHY clock rate before setting it's rate 
Due to i.MX8 clock issue, we need to get PHY clock rate
before setting it's rate when system resumes back from
PM sleep mode, otherwise, we'll fail to set the clock rate.
So, this is a workaround and it can be removed when
the clock issue is properly fixed.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
 2018-10-29 11:10:38 +08:00
Liu Ying e944130d14 MLK-16015-2 phy: mixel-lvds-combo: Add delay to wait PHY to be locked 
It seems that we haven't got SCU ISO bit available to check if PHY is
locked or not after enable, so let's simply delay for a while as a
temporary solution.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
 2018-10-29 11:10:38 +08:00
Liu Ying 9477c47fd0 MLK-15001-22 phy: Add Mixel LVDS combo PHY support 
This patch adds Mixel LVDS combo PHY support(MIPI DSI and LVDS combo).
This LVDS PHY supports one LVDS channel in single mode and two channels in
dual mode.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
 2018-10-29 11:10:38 +08:00