Confirmed from CDNS, this code is from bare metal, and not needed
for Linux. Below are their response:
This is alternative deferred interrupt.
This is intended to be used in Bare Metal to not block system in
interrupt.
This was not fully checked in Linux, so we do not recommend to use it
there.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If the user buffer is not 8-byte aligned, it needs to use debounce
buffer for DMA transfer, and in this commit, we do below two
improvements:
- Copy back the request buffer when the transfer has completed
- Using Macro for default debounce buffer size
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When using usbtest <--> f_sourcesink to do usb test, the current
code can't do test on same EP twice (eg EP1OUT), the DMA engine
can't restarted for the second test, the real reason is unknown.
The workaround for this problem is reset EP at .ep_enable, and
this operation is reasonable since we can reset EP at its
initialized state before using it. The fail cause for current
code like below:
./testusb -a -t 1
/* do it again */
./testusb -a -t 1
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
There are may active transfers when we would like dequeue request
or disable endpoint, so it needs to flush the on-chip buffer before
dequeue software request.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For Cadence USB3 device mode, the onchip buffer size is fixed
(eg: 18KB at this version), and the software needs to judge
if the onchip buffer is full when tries to configure endpoint.
For IN endpoint, each endpoint has its own onchip buffer;
For OUT endpoint, all endpoints share the same onchip buffer.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
With Linux PC USB2 connection, if L1 enable bit is set during the
initialization, the usbsts.cfgsts can't be 1 (device is in the
configured state) after setting usbconf.cfgset, move L1 enable
after USB configuration done can workaround this issue.
Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When the EP is going to enable, it should not be stalled, and the
software flag needs to be updated. It fixes the mass_storage gadget
can't work after re-plug in.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When we receive the bus reset, according to CH 9.4.5, the U1
and U2 should be reset to disabled status.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Implement selfpower setting between USB gadget core and
controller driver
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
We add endpoints to ep_match_list when adding gadget module, but
we delete the endpoints from the ep_match_list before set configuration.
When the re-enumeration after the new connection, the ep_match_list
is empty, in that case, the non-ep0s have not configurated, the
transfer on them will be failed.
In this commit, we only delete the endpoints from the list when we
remove the gadget module.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For mass_storage gadget, when we remove the module after disconnection,
the request->complete at .ep_dequeue can't be executed, then the
wakeup_thread for certain endpoints is not called, the sleep_thread
will be dead lock.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This reverts commit 3ccf60e1ff
("usb: dwc3: gadget: skip Set/Clear Halt when invalid")
"At least macOS seems to be sending
ClearFeature(ENDPOINT_HALT) to endpoints which
aren't Halted. This makes DWC3's CLEARSTALL command
time out which causes several issues for the driver."
but this change is impacting usb CV compliance test with
windows, which using clear EP halt for other purpose in
this case, as this is not resolved on upstream, so revert
this patch for now.
Acke-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
The TPL support is used to identify targeted devices during
EH2.0 and EH3.0 certification test.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This function is similar with EHCI's, but implemented using XHCI.
The USB2 host needs to send SETUP packet first, then wait 15
seconds before DATA (IN) + STATUS stage.
It is needed at USB Certification test for Embedded Host 2.0, and
the detail is at CH6.4.1.1 of On-The-Go and Embedded Host Supplement
to the USB Revision 2.0 Specification
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since other USB 2.0 host may need it, like USB2 for XHCI. We move
this design to HCD core.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At former code, the SETUP stage does not enable interrupt
for qtd completion, it relies on IAA watchdog to complete
interrupt, then the transcation would be considered timeout
if the flag need_io_watchdog is cleared by platform code.
In this commit, we always add enable interrupt for qtd completion,
then the qtd completion can be notified by hardware interrupt.
Acked-by: Jun Li <jun.li@nxp.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Cadence3 low power sequence doesn't allow too much time gap
between xhci bus suspend and controller suspend,
otherwise, the disconnection will be seen between them.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Improve USB PHY operation, and keep 32K clock for RX detection
all the time, it can fix SS connection can't be recognition
from U3.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Driver powers-off PHYs and reinitializes DWC3 core and gadget on
resume. While this works fine for gadget mode but in host
mode there is not re-initialization of host stack. Also, resetting
bus as part of bus_suspend/resume is not correct which could affect
(or disconnect) connected devices.
Fix this by not reinitializing core on suspend/resume in host mode
for HOST only and OTG/drd configurations.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
(cherry picked from commit 689bf72c6e)
Current design tries to switch role no matter it is a dual-role device
or a single-role device. It produces extra switch process, and have an
error message at console when tries to start a non-exist role.
In this commit, we do below changes
- The role switch work queue is only for dual-role or peripheral-only
device.
- For peripheral-only device, we need to switch role to CDNS3_ROLE_END
since we need to close vbus and turn off clocks at this role when the
cable is disconnected from the host; And we do noop when the external
cable indicates we are host.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At imx8qm/imx8qxp A0 chip, there is a vbus toggle issue, so we need to
force the vbus as high before connection, otherwise, there will be endless
connect/disconnect interrupts for USB2 and causes enumeration failure.
The current work flow only cover this during the role switch, but omit
it when the connection has established at module probe routine.
This patch fixes it by moving force vbus operation to cdns_set_role to
cover both static and dynamic recognition issue.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Cadence IP has one limitation that all endpoints must be configured
(Type & MaxPacketSize) before setting configuration through hardware
register, it means we can't change endpoints configuration after
set_configuration.
In this patch, we add non-control endpoint through usb_ss->ep_match_list,
which is added when the gadget driver uses usb_ep_autoconfig to configure
specific endpoint; When the udc driver receives set_configurion request,
it goes through usb_ss->ep_match_list, and configure all endpoints
accordingly.
At usb_ep_ops.enable/disable, we only enable and disable endpoint through
ep_cfg register which can be changed after set_configuration, and do
some software operation accordingly.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At current setup packet handling flow, the setup packet buffer
is only prepared after the controller receives the setup packet,
then stores it at its internal buffer, and trigger DESCMIS interrupt
(Transfer descriptor missing) to prepare TRB for it.
The shortcoming of this design is there is an extra DESCMIS interrupt,
and consume more time on enumeration process. As an improvement,
we parepare setup buffer beforehand, it is prepared at below situations:
- After bus reset has finished.
- For non-data stage setup transfers, prepare it before sending ACK for
status stage.
- For data stage setup transfers, prepare it after data stage but
before sending ACK for status stage.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
With this judgement, the non-hsic controller will access wrong registers,
and below error message will be showed:
"usbmisc_imx 2184800.usbmisc: index is error for usbmisc"
Fixes: 113be1516160 ("MLK-16715-6 usb: chipidea: imx:
add HSIC support for controllers from imx7d")
Reported-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The __cdns3_gadget_stop holds spinlock before calling
usb_ss->gadget_driver->disconnect which calls ep_disable,
and ep_disable tries to hold spinlock too.
To fix it, let spinlock only protect the variable and register access.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If the xhci platform device is already suspended, we can't
release high bus freq again, fix the high bus count mismatch.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Some chipidea hardware needs to disable low power mode for controller
due to IC issue or hardware issue, add one quirk for it.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
From imx7d, there is a dedicate non-core register region for
each controller, and HSIC configurations are almost at non-core
register, this commit adds HSIC support for controllers from imx7d,
and the non-core confugrations are different with imx6's.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
HSIC controller must use HSIC phy mode, it is more suitable way
to judge HSIC controller.
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This patch set adds both runtime and system-level pm support.
For runtime-pm: both host and device wakeup events are supported.
For system-pm: only host wakeup events are supported, device wakeup
events are from other peripherals, and will support later.
BuildInfo:
- SCFW 245582b, IMX-MKIMAGE 0ad6069a, ATF 6bd98a3
- U-Boot 2017.03-imx_v2017.03+gfa65b0a
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
i.MX8MQ USB3 host needs XHCI_MISSING_CAS quirk to warm reset the port to
enum the USB3 device plugged in while system sleep, as the port state is
stuck in polling mode after resume.
Signed-off-by: Li Jun <jun.li@nxp.com>
Acked-by: Peter Chen <peter.chen@nxp.com>
The NXP Cadence XHCI host has the same issue with Intel's,
it is triggered by reboot test, the test case is described
at this jira ticket.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Remove xhci_suspend and xhci_resume as i.MX8MQ dwc3 can't support it,
add high bus request and release, and enable runtime pm by default.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Since the runtime endpoint type is decided by device descriptors,
we delete useless is_iso_flag which is decided during the initialization.
It also fixed a bug the max_packet_size is determined wrongly for
high/full speed connection.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since the controller doesn't know vbus status well due to IC limitation,
it needs to force vbus status for controller when the connection and
disconnection occur.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The IP has some issues to detect vbus status correctly, we have to
force vbus status accordingly, so we need a status to indicate
vbus disconnection, and add some code to let control know vbus
removal, in that case, the controller's state mechine can be correct.
In this commit, we increase one role 'CDNS3_ROLE_END' to for
this status.
BuildInfo:
- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
USB2 PLL use ring VCO, when the PLL power up, the ring VCO’s supply also
ramp up. There is a possibility that the ring VCO start oscillation at
multi nodes in this phase, especially for VCO which has many stages, then
the multiwave will kept until PLL power down. Hold_ring_off(bit11) can
force the VCO in one determined state when VCO supply start ramp up, to
avoid this multiwave issue. Per IC design's suggestion it's better this
bit can be off from 25us after pll power up to 25us before USB TX/RX.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit a094377f04c9ed2c8e702ee7bfab843caa03eb96)
At probe, the main hcd is added first, then shared_hcd is added later,
so when we tries to remove hcds, the shared_hcd needs to remove first.
BuildInfo:
- SCFW 1f59442e, IMX-MKIMAGE fb52c576, ATF
- U-Boot 2017.03-imx_v2017.03+g34be5a2
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When it goes to start new role, the interrupt may be occurred before
role_start returns, but at this time, the cdns->role is still the old
role, so the interrupt handler will make mistake.
In this commit, we set desired role before role_start, if the role_start
has failed and the desired role is different with current one, it tries
to back current role.
BuildInfo:
- SCFW 1f59442e, IMX-MKIMAGE fb52c576, ATF
- U-Boot 2017.03-imx_v2017.03+g34be5a2
Acked-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Since the USB Type-C port only has two data roles, host and device,
the controller driver can only receive above two events, it can't
remain 'disconnection' state alone at controller driver due to there
is no such event from Type-C.
Due to above, we delete the controller state "CDNS3_ROLE_END" which
stands for 'disconnection' state before. Instead, when we use
"CDNS3_ROLE_GADGET" stands for it, and this state is the default
state for controller.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
At the extcon notifier, it will queue a work item, so we need to
make sure the work is initialized before it is used.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
After USB_CONF.DEVDS is set, the device mode will be disabled, and the
host will set the disconnection, this bit is just like DP pullup bit
at USB2.
And we add disable/enable device mode logic at .pullup function for
UDC core.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When the port does not connect to host, the controller's gadget
mode is enabled, so we need to avoid visiting register at this situation.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If there are too many interrupts for non-control ep, the
no-one handled interrupt issue will occur due to without
return IRQ_HANDLED for them.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When access reserved registers, the cdns host will trigger
an exception, and the synchronous external abort will occur
at ARM64 platforms.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
The IMX XHCI host which uses cadence USB3 IP is not compatible with
xHCI spec, the controller will trigger an exception if
visiting reserved registers, but the xHCI spec does not forbid it,
so add one quirk for skipping access reserved registers.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add Cadence USB3 IP driver, this is the 1st version for this driver,
so wrapper layer and PHY layer are still IP core file (core.c).
Below functions are supported:
- Basic host function
- Limited gadget function, only ACM (old g_seiral) are supported, and
mass_storage support is not very well.
- Role switch between host and device through extcon design
(Eg, Type-C application NXP PTN5150).
Below functions are missing:
- Multi-queue support at gadget function, without this feature, many
gadget function are missing.
- Low power mode support, including system PM and runtime PM
- Wakeup support
Signed-off-by: Peter Chen <peter.chen@nxp.com>
As the code comments say, the bulk out req amount should be divisible
by 512, fix this by using set_bulk_out_req_length().
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Add interface to get typec port type and default power role from
dt. To validate a correct setting is specified, add TYPEC_PORT_TYPE_UNKNOWN
and TYPEC_ROLE_UNKNOWN for typec_port_type and typec_role enum.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
During 4.14 rebase renamed to typec_port_types_dt to avoid conflict with
sysfs values.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Increase the timeout value for wait ep command complete, this is temp
solution to workaround it but no harm any good cases.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Some dwc3 based USB3 IP may have a wrong default suspend clk
setting, so add an interface to correct it by dts property.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
set_fs() should be done in case:
1. CONFIG_FSL_UTP is not enabled.
2. CONFIG_FSL_UTP is enabled but is_utp_device is false.
Signed-off-by: Li Jun <jun.li@nxp.com>
As common->fsg maybe have not been set correctly while enumration, so
use the correct pointer fsg for utp device check.
Signed-off-by: Li Jun <jun.li@nxp.com>
If the vbus is controlled by ehci port power bit, we need set power
polarity of vbus enable signal according to the vbus power supply
chip on board.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
We only have below cases to disconnect line when suspend:
1. Device mode without connection to any host/charger(no vbus).
2. Device mode connect to a charger(w/ vbus), usb suspend when
system is entering suspend.
This patch can fix usb phy wrongly does disconnect line in case
some usb host enters suspend but vbus is off.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 2af48913f77cec3658f5863b13f63619d8101279)
After enters one specific role, notify usb phy driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit d3aa2a13f4e47bc7fae7f2eee1e86291d7513312)
Enable ID change wakeup for OTG; and VBUS wakeup for OTG and
peripheral only mode.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
The ci_handle_id_switch is called at two places, at very rare situations,
it may be running at the same time. Eg, when the system is back from
the resume, the id event is occurred from extcon driver, as well as
power_lost work item is called due to the controller is poweroff at
the suspend.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
After commit 4967018428 ("usb: chipidea: otg: change workqueue
ci_otg as freezable"), we have fixed the bug that ID removed
wakeup (ID: 0->1) will lock up system resume, we delete the
workaround code in this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When the vbus is off during the suspend controller is powered off, if we
do not want to see disconnection from USB core, we need to make sure the
device pulls DP up before USB core resume runs. However, several devices
are slow to pull DP up when see vbus (maybe it needs vbus to power up
system), so we need to wait connection at platform code.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For all imx Socs later than imx6 (including imx6), the USB_nSBUSCFG.AHBBRST
will be set as 0 at dtsi file, so the non-burst setting needs to be
set at non-core register, or there will be no burst for USB AHB/AXI
transfer.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At imx7ulp, if the system enters idle, it will close some clocks and affect
USB transfer. In order to avoid it, we request pmqos to avoid system
entering idle when the USB is in use.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
imx7ulp non core register mapping is similar with imx7d, and the
initialization is the same, but lacks of USB charger detection support.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
commit 916e43e1d6fb ("MLK-13570-3 usb: chipidea: core: change extcon
usage for imx_4.1.y") is directly cherry-picked from 4.1.y, but which
is not valid anymore on 4.y kernel, so revert most part and only keep
the irq check after resume.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
At v4.1 kernel, we can't get cable type at notifier, but at
extcon-usb-gpio.c notifies both VBUS and ID event, we had to
do special handling for ID event, and omit VBUS event. Current
implementation only supports ID extcon event.
If wakeup event occurs by extcon, it needs to call ci_irq again since the
first ci_irq calling at extcon notifier only wakes up controller, but
do noop for event handling.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At imx7ulp, the USB related analog register is located in PHY register
region too, so we need to control PLL at PHY driver directly.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For mxs PHY, if there is a vbus but the bus is not enumerated,
force the dp/dm as SE0 from the consider side. If not, there
is possible USB wakeup due to unstable dp/dm, since there is
possible no pull on dp/dm, eg, there is a USB charger on the
port. Note, the vbus event is only occurred at device mode,
and sent by udc driver.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add USB PHY event for below situation:
- vbus connect
- vbus disconnect
- gadget driver is enumerated
USB PHY driver can get the last event after above situation
occurs.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For imx6ul PHY, when the system enters suspend, its 1p1 is off by default,
that may cause the PHY get inaccurate USB DP/DM value. If the USB wakeup
is enabled at this time, the unexpected wakeup may occur when the system
enters suspend.
In this patch, when the vbus is there, we enable weak 1p1 during the PHY
suspend API, in that case, the USB DP/DM will be accurate for USB PHY,
then unexpected usb wakeup will not be occurred, especially for the USB
charger is connected scenario. The user needs to enable PHY wakeup for
USB wakeup function using below setting.
echo enabled > /sys/devices/platform/soc/2000000.aips-bus/20c9000.usbphy
/power/wakeup
Cc: Shaojun Wang <shaojun.wang@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add HSIC support for imx7d. We have not supported HSIC as system
wakeup as well as HSIC remote wakeup function at DSM mode, since
the 24M OSC can't be off and the SoC internal regulators can't be
off at this mode, that will keep power consumption much higher.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Fix chipidea usb driver compile warning if CONFIG_USB_CHIPIDEA_HOST
is disabled:
In file included from drivers/usb/chipidea/otg.c:26:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
CC drivers/usb/chipidea/otg_fsm.o
In file included from drivers/usb/chipidea/otg_fsm.c:34:0:
drivers/usb/chipidea/host.h:23:13: warning: 'ci_hdrc_host_driver_init'
defined but not used [-Wunused-function]
static void ci_hdrc_host_driver_init(void)
^
Signed-off-by: Li Jun <jun.li@nxp.com>
After we put gadget disconnect and connect in id switch handling,
update power lost work accordingly.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit fd49596ece)
During system sleep, if we switch otg role from gadget to host, and host
vbus is directly controlled by ID signal, we will lose vbus drop event
after resume because the vbus is on both at system suspend and resume, so
we will miss gadget disconnect handling before start host role. This patch
is to fix it by adding gadget disconnect for this case.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 79aab6fc3c)
During system sleep, if we switch otg role from host to gadget, because
the vbus is on both at system suspend and resume, we will lose vbus
connect event after system resume, thus, no chance to setup vbus session
for gadget so enumeration will not happen. This patch is to fix it by
adding vbus connect handling for this case.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit bd54eea0f7)
Peter Chen