Commit graph

423 commits

Author SHA1 Message Date
Sergei Shtylyov ae65a8ae4c ARM: shmobile: r8a7791: add ADSP clocks
Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7791 device tree.

Based on the original patch by Konstantin Kozhevnikov
<konstantin.kozhevnikov@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:57 +09:00
Sergei Shtylyov b324252cc1 ARM: shmobile: r8a7791: add CAN clocks
The R-Car CAN controllers can derive the CAN bus clock not only from their
peripheral clock input (clkp1) but also from the other internal clock (clkp2)
and external clock fed on CAN_CLK pin.  Describe those clocks in the device
tree,  along with  the USB_EXTAL clock  from which clkp2 is derived.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:55 +09:00
Sergei Shtylyov 41650f406c ARM: shmobile: r8a7790: add CAN clocks
The R-Car CAN controllers can derive the CAN bus clock not only from their
peripheral clock input (clkp1) but also from the other internal clock (clkp2)
and external clock fed on CAN_CLK pin.  Describe those clocks in the device
tree,  along with  the USB_EXTAL clock  from which clkp2 is derived.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:53 +09:00
Geert Uytterhoeven 56a215d66b ARM: shmobile: sh73a0 dtsi: Add missing INTCA0 clock for irqpin module
This clock drives the irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.
By making it available to the driver, we make sure it gets enabled when
needed, and allow it to be managed by system or runtime PM.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24 06:30:41 +09:00
Linus Torvalds 18a8d49973 The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU54D5AAoJEDqPOy9afJhJs6AQAK5YuUwjDchdpNZx9p7OnT1q
 +poehuUwE/gYjmdACqYFyaPrI/9f43iNCfFAgKGLQqmB5ZK4sm4ktzfBEhjWINR2
 iiCx9QYMQVGiKwC8KU0ddeBciglE2b/DwxB45m9TsJEjowucUeBzwLEIj5DsGxf7
 teXRoOWgXdz1MkQJ4pnA09Q3qEPQgmu8prhMfka/v75/yn7nb9VWiJ6seR2GqTKY
 sIKL9WbKjN4AzctggdqHnMSIqZoq6vew850bv2C1fPn7GiYFQfWW+jvMlVY40dp8
 nNa2ixSQSIXVw4fCtZhTIZcIvZ8puc7WVLcl8fz3mUe3VJn1VaGs0E+Yd3GexpIV
 7bwkTOIdS8gSRlsUaIPiMnUob5TUMmMqjF4KIh/AhP4dYrmVbU7Ie8ccvSxe31Ku
 lK7ww6BFv3KweTnW/58856ZXDlXLC6x3KT+Fw58L23VhPToFgYOdTxn8AVtE/LKP
 YR3UnY9BqFx6WHXVoNvg3Piyej7RH8fYmE9om8tyWc/Ab8Eo501SHs9l3b2J8snf
 w/5STd2CYxyKf1/9JLGnBvGo754O9NvdzBttRlygB14gCCtS/SDk/ELG2Ae+/a9P
 YgRk2+257h8PMD3qlp94dLidEZN4kYxP/J6oj0t1/TIkERWfZjzkg5tKn3/hEcU9
 qM97ZBTplTm6FM+Dt/Vk
 =zCVK
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
2015-02-21 12:30:30 -08:00
Linus Torvalds 18656782a8 ARM: SoC driver updates
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 This time around, much of this is for at91, with the bulk of it being syscon
 and udc drivers.
 
 Also, there's:
 - coupled cpuidle support for Samsung Exynos4210
 - Renesas 73A0 common-clk work
 - of/platform changes to tear down DMA mappings on device destruction
 - a few updates to the TI Keystone knav code
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4upSAAoJEIwa5zzehBx3HkUP/Rc4B1yZChNIFNfVq4dbei6w
 dT9WdFmxOIj2JLeXEypFBiNf1nSHmsxrZe9/IDACz2fYQOnaZZ6/786utUJP/PtC
 2GDJy9cjL2Xh03We3nQp5z6J33XvpEni1t82cOpCl8wLBOQNnkjEks8UvLgi1LHW
 CNLcMm8JtDQ2aB/gRTjzetp9liZluESY5+Mig+loE2F/rzbMbNQDcWDDgUPyIQIS
 1onL+Bad3BnGFdo/+qnkurGc81pxoKiQJty06VWFftzvIwxXhsNjrqls2+KzstAx
 0lLvW1tqaDhXvUBImRM8GgfbldZslsgoFVmgESS9MpPMBNENYrkAiQNvJUnM7kd9
 qHDQNq+zRNsz/k4fVvp/YUp7xEiAo4rLcFmp/dBr535jS2LNyiZnB94q+kXsin/m
 tiyEMx+RWxEHTEHN9WdKE61Ty1RbzOa5UTLSzOKFAkF+m2nvuQsJvb97n19coAq9
 SSsj/wJgesfqrDEegphCDh1fyVxUzlAjjhTAyvPS155WvPzkbxZxuBbSqRuriRKA
 2aCfVne2ELimHAr3LEPgPW2kFBcONHckOGe6MvrTX4zPHU8bb9WIeg+iGdQChnr3
 nclT9jq+ZnQro5XTgUtPtadq100oEXlJbqpAzhd+cJbvgzSNbcWfcgE6kOWqd9uK
 oeWQWFLCdXLmXf9zCwmk
 =T7R2
 -----END PGP SIGNATURE-----

Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  This time around, much of this is for at91, with the bulk of it being
  syscon and udc drivers.

  Also, there's:
   - coupled cpuidle support for Samsung Exynos4210
   - Renesas 73A0 common-clk work
   - of/platform changes to tear down DMA mappings on device destruction
   - a few updates to the TI Keystone knav code"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  cpuidle: exynos: add coupled cpuidle support for exynos4210
  ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary
  soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static
  soc: ti: knav_qmss_queue: makefile tweak to build as dynamic module
  pcmcia: at91_cf: depend on !ARCH_MULTIPLATFORM
  soc: ti: knav_qmss_queue: export API calls for use by user driver
  of/platform: teardown DMA mappings on device destruction
  usb: gadget: at91_udc: Allocate udc instance
  usb: gadget: at91_udc: Update DT binding documentation
  usb: gadget: at91_udc: Rework for multi-platform kernel support
  usb: gadget: at91_udc: Simplify probe and remove functions
  usb: gadget: at91_udc: Remove non-DT handling code
  usb: gadget: at91_udc: Document DT clocks and clock-names property
  usb: gadget: at91_udc: Drop uclk clock
  usb: gadget: at91_udc: Fix clock names
  mfd: syscon: Add Atmel SMC binding doc
  mfd: syscon: Add atmel-smc registers definition
  mfd: syscon: Add Atmel Matrix bus DT binding documentation
  mfd: syscon: Add atmel-matrix registers definition
  clk: shmobile: fix sparse NULL pointer warning
  ...
2015-02-17 09:38:59 -08:00
Linus Torvalds a233bb742a ARM: SoC DT updates
DT changes continue to be the bulk of our merge window contents.
 
 We continue to have a large set of changes across the board as new platforms
 and drivers are added.
 
 Some of the new platforms are:
 - Alphascale ASM9260
 - Marvell Armada 388
 - CSR Atlas7
 - TI Davinci DM816x
 - Hisilicon HiP01
 - ST STiH418
 
 There have also been some sweeping changes, including relicensing of DTS
 contents from GPL to GPLv2+/X11 so that the same files can be reused in
 other non-GPL projects more easily. There's also been changes to the
 DT Makefile to make it a little less conflict-ridden and churny down
 the road.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4u0bAAoJEIwa5zzehBx3XFQP+wbVDp39ay3SRanFWeXqhfTe
 6jRsYrOcq6BN/b1NugjD+yKIYp2MQhwlXbMmj/1vnmJ3XSY25ZMLlgs0/vsNk7W2
 5e0xySwdhd1DjsajhZyN+5gUgqcTgOof/V+CbEUkijDDJ9v/WJbGZrpCHDz+UVTh
 dG9p1vrKoxDELAVbnp9muKZPlaQkAM60zJcHNJw9bJB5M0RCx4XFwPZc1cDLIsIZ
 lK/uYpKsgvgrGw5QuCtEK1/NkqLkBqgBfVg6xq0VB6OCYetqpxqs7kSZjnncIhQc
 PvxShsIJzb/dgfk7xBVb1+4Jfe5L/4poFwS69QuBlr/wiwc7wrhv37edgkyDlclS
 aj5xfOIhQdDaTkknFVs4QEkGAFg/lnTZnmiNiQdlsmDHqbWdTEELKShdVeMO7Zsg
 6bPdDipA2jsQ86UWNwucis8QulzVTuyNuU+Mlrxp73b76+hKXLkbYcZ51FJ/xMD8
 wLpCGqtc9Quirdb7Wy7XiVfesv3lKfDmzZB/6ZJ6zfadDvsqJPxAjNTA8VYZ9YeT
 EyW4K6CMOa5v+sLmIQUsAjKCYaul3PVDCi4voQjpS1ZtPLw+WN3zqX5XZZDT9Ll2
 D1ycmInp/40KsQgjV36u1NlIKMM+oaUJaSzaSPGdgj3Zcw0YZi8O+h0m6iHrlzUB
 uGFufsLKmcOFY/sLwprt
 =XEw1
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT changes continue to be the bulk of our merge window contents.

  We continue to have a large set of changes across the board as new
  platforms and drivers are added.

  Some of the new platforms are:
   - Alphascale ASM9260
   - Marvell Armada 388
   - CSR Atlas7
   - TI Davinci DM816x
   - Hisilicon HiP01
   - ST STiH418

  There have also been some sweeping changes, including relicensing of
  DTS contents from GPL to GPLv2+/X11 so that the same files can be
  reused in other non-GPL projects more easily.  There's also been
  changes to the DT Makefile to make it a little less conflict-ridden
  and churny down the road"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits)
  ARM: dts: Add PPMU node for exynos4412-trats2
  ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato
  ARM: dts: Add PPMU dt node for exynos4 and exynos4210
  ARM: dts: Add PPMU dt node for exynos3250
  ARM: dts: add mipi dsi device node for exynos4415
  ARM: dts: add fimd device node for exynos4415
  ARM: dts: Add syscon phandle to the video-phy node for Exynos4
  ARM: dts: Add sound nodes for exynos4412-trats2
  ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2
  ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi
  ARM: dts: Add max77693 charger node for exynos4412-trats2
  ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2
  ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2
  ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2
  ARM: dts: am57xx-beagle-x15: Fix USB2 mode
  ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB
  ARM: dts: dra72-evm: Add extcon nodes for USB
  ARM: dts: dra7-evm: Add extcon nodes for USB
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ...
2015-02-17 09:36:52 -08:00
Linus Torvalds 878ba61aa9 ARM: SoC platform changes
New and updated SoC support. Also included are some cleanups where the
 platform maintainers hadn't separated cleanups from new developent in
 separate branches.
 
 Some of the larger things worth pointing out:
 
 - A large set of changes from Alexandre Belloni and Nicolas Ferre
   preparing at91 platforms for multiplatform and cleaning up quite a
   bit in the process.
 - Removal of CSR's "Marco" SoC platform that never made it out to the
   market. We love seeing these since it means the vendor published
   support before product was out, which is exactly what we want!
 
 New platforms this release are:
 
 - Conexant Digicolor (CX92755 SoC)
 - Hisilicon HiP01 SoC
 - CSR/sirf Atlas7 SoC
 - ST STiH418 SoC
 - Common code changes for Nvidia Tegra132 (64-bit SoC)
 
 We're seeing more and more platforms having a harder time labelling
 changes as cleanups vs new development -- which is a good sign that
 we've come quite far on the cleanup effort. So over time we might start
 combining the cleanup and new-development branches more.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJU4uiiAAoJEIwa5zzehBx3LtoQAIP4eInJAumhB67MexzWGIBx
 eOsloBRMEBrjBQdSYsdsypN6T61WjDu1aieCxEGzIqitcMa59AIyyzglmlXy3UmV
 XQuSnIBag2fsOqrvqd+c6ewzAMxm2/Nbi3+zjzApkf27NDlBLhEjxuK6pAAf4Yw9
 gyWqB9g0d4V06XdqRInRvyyVfMu6fdApHLnadtjcMdiorQGd1bcOE1sQYygy6N6e
 d6vGvyKSv4ygyDG9//njzm6C5OnmHliimMToeuDC2Scel69RM97EnMXys988CqUH
 0Ru7XANEujtHXSOBYOyCv1kk4V5NguGzlfepe23oidOew8MjUdyRvKrwUiMt3AnT
 SVqcZ9UU5wjJC6j+iADh+E7zww2H0rA6vFRzXy297dDuLg2C2ONFljBj/tIKGc71
 ++gLc6LRn7UmSyK98JMzkxDhmnnPn8w2O0M5GdabAqzZSfHlL1juW9ljp9Al5P6y
 apLRzqMGjEoyC4huXvB3XVfrxGfepe5pco6wVlwmF3ilwf7iHnfuHONC1aw2mPRO
 aOKiS+0gHWL3rNZtZQtyW7Ws0I2HJFip2CWIloBK1/2ntEoh51PH7jGw8iu/6jTk
 //DCXqPBNXcLqonB9CHJZ/EWt0wup0BcHyLjlWX7iEjsdP/QJXrDgnrV3qdHibbh
 AJASjs0YVDcdvRsRStlg
 =szd9
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "New and updated SoC support.  Also included are some cleanups where
  the platform maintainers hadn't separated cleanups from new developent
  in separate branches.

  Some of the larger things worth pointing out:

   - A large set of changes from Alexandre Belloni and Nicolas Ferre
     preparing at91 platforms for multiplatform and cleaning up quite a
     bit in the process.

   - Removal of CSR's "Marco" SoC platform that never made it out to the
     market.  We love seeing these since it means the vendor published
     support before product was out, which is exactly what we want!

  New platforms this release are:

   - Conexant Digicolor (CX92755 SoC)
   - Hisilicon HiP01 SoC
   - CSR/sirf Atlas7 SoC
   - ST STiH418 SoC
   - Common code changes for Nvidia Tegra132 (64-bit SoC)

  We're seeing more and more platforms having a harder time labelling
  changes as cleanups vs new development -- which is a good sign that
  we've come quite far on the cleanup effort.  So over time we might
  start combining the cleanup and new-development branches more"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
  ARM: at91/trivial: unify functions and machine names
  ARM: at91: remove at91_dt_initialize and machine init_early()
  ARM: at91: change board files into SoC files
  ARM: at91: remove at91_boot_soc
  ARM: at91: move alternative initial mapping to board-dt-sama5.c
  ARM: at91: merge all SOC_AT91SAM9xxx
  ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
  ARM: digicolor: select syscon and timer
  ARM: zynq: Simplify SLCR initialization
  ARM: zynq: PM: Fixed simple typo.
  ARM: zynq: Setup default gpio number for Xilinx Zynq
  ARM: digicolor: add low level debug support
  ARM: initial support for Conexant Digicolor CX92755 SoC
  ARM: OMAP2+: Add dm816x hwmod support
  ARM: OMAP2+: Add clock domain support for dm816x
  ARM: OMAP2+: Add board-generic.c entry for ti81xx
  ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
  ARM: at91: remove unused mach/system_rev.h
  ARM: at91: stop using HAVE_AT91_DBGUx
  ARM: at91: fix ordering of SRAM and PM initialization
  ...
2015-02-17 09:27:54 -08:00
Olof Johansson 6f8c8f6baf Change are regulator nodes for the cpu and gpu regulators on the act8846
variant of the rk3288-evb and the setting of a clock for the watchdog.
 Also the lcd and hdmi controllers on both the firefly and the evb get
 enabled and let us now boot into fbcon console sucessfully.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJUy+f+AAoJEPOmecmc0R2BdFcH/i+9hgt9ElJxKbpPPVPVv81O
 QzmIi3g+B4WqAoKBfzkug5l82mSZ4FAvmQK5ad8BYHsBaGl+GRjwwaqRqZkPUOzl
 umXk0GneZ5sPK+S1UdA/S/v7hTwgEpXOLnGUCGUXbLt7Gqda99ume08jgCe2JbH5
 Tfjoia5uRlOgdZIf3KBr4TkPR+LHog1i/DI9N3XrAsjLtj/igHpoRmFydBmv7noo
 OuRuPY0afg1jKs/MextjM0W1JzQbGyv4Jp4NjVFv60+KZrMgS64vTDZamxYEK4Sv
 wn0pQUZgevQhd3ewdLtqrcbo4wIGiLWBXQK0vzonmo5tCk8r+59QFKxeMiq2C7Q=
 =ZVrD
 -----END PGP SIGNATURE-----

Merge tag 'v3.20-rockchip-dts3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "ARM: rockchip: third (and last) batch of dts updates for 3.20" from
Heiko Stübner:

Change are regulator nodes for the cpu and gpu regulators on the act8846
variant of the rk3288-evb and the setting of a clock for the watchdog.
Also the lcd and hdmi controllers on both the firefly and the evb get
enabled and let us now boot into fbcon console sucessfully.

* tag 'v3.20-rockchip-dts3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ARM: dts: rockchip: housekeeping off i2c0 on rk3288-evb boards
  ARM: dts: rockchip: add cpu and gpu regulators to rk3288-evb-act8846
  ARM: dts: rockchip: add rk3288 watchdog clock
  clk: rockchip: add id for watchdog pclk on rk3288
  clk: rockchip: add clock IDs for the PVTM clocks
  clk: rockchip: add clock ID for usbphy480m_src

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-02-06 00:03:28 -08:00
Chanwoo Choi b2f0e5f28e clk: samsung: exynos5433: Move CLK_SCLK_HDMI_SPDIF_DISP clock to CMU_TOP domain
This patch fixes the bug of CLK_SCLK_HDMI_SPDIF_DISP clock because this clock
should be included in CMU_TOP domain. So, this patch moves the CLK_SCLK_HDMI_
SPDIF_DISP clock from CMU_MIF to CMU_TOP domain.

Reported-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:09 +01:00
Chanwoo Choi a5958a939b clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain
This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which
generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:08 +01:00
Chanwoo Choi 6958f22f39 clk: samsung: exynos5433: Add clocks for CMU_CAM0 domain
This patch adds the mux/divider/gate clocks for CMU_CAM0 domain which
generates the clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:07 +01:00
Chanwoo Choi 8e46c4b84f clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:06 +01:00
Chanwoo Choi 45e58aa5f7 clk: samsung: exynos5433: Add clocks for CMU_HEVC domain
This patch adds the mux/divider/gate clocks for CMU_HEVC domain which
generates the clocks for HEVC(High Efficiency Video Codec) decoder IP.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:06 +01:00
Chanwoo Choi 9910b6bbaa clk: samsung: exynos5433: Add clocks for CMU_MFC domain
This patch adds the mux/divider/gate clocks for CMU_MFC domain which
generates the clocks for MFC(Multi-Format Codec) IP.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:31:05 +01:00
Chanwoo Choi b274bbfd8b clk: samsung: exynos5433: Add clocks for CMU_MSCL domain
This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:30:57 +01:00
Chanwoo Choi 6c5d76d15a clk: samsung: exynos5433: Add clocks for CMU_ATLAS domain
This patch adds the mux/divider/gate clocks for CMU_ATLAS domain which
generates the clocks for Cortex-A57 Quad-core processsor, L2 cache
controller and CoreSight.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 19:30:34 +01:00
Chanwoo Choi df40a13ca5 clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain
This patch adds the mux/divider/gate clocks for CMU_APOLLO domain
which generates the clocks for Cortex-A53 Quad-core processsor.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
[s.nawrocki@samsung.com: Renamed pclk_pmu_sysreg_apollo to pclk_sysreg_apollo]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-05 15:21:06 +01:00
Chanwoo Choi 2a2f33e83d clk: samsung: exynos5433: Add clocks for CMU_GSCL domain
This patch adds the divider/gate of CMU_GSCL domain which contains
gscaler clocks.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:15 +01:00
Chanwoo Choi 453e519e5a clk: samsung: exynos5433: Add clocks for CMU_G3D domain
This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains
the clocks for GPU(3D Graphics Engine).

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:15 +01:00
Chanwoo Choi 4b8013554b clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which
contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:14 +01:00
Chanwoo Choi 5785d6e61f clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains
This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains
which contain global data buses clocked at up the 400MHz. These blocks
transfer data between DRAM and various sub-blocks. These clock domains
also contain global peripheral buses clocked at 67/111/200/222/266/333/400
MHz and used for register accesses.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:13 +01:00
Chanwoo Choi 2e997c0359 clk: samsung: exynos5433: Add clocks for CMU_AUD domain
This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A5/Bus/Audio clocks.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:13 +01:00
Chanwoo Choi 2a1808a6c0 clk: samsung: exynos5433: Add clocks for CMU_DISP domain
This patch adds the the mux/divider/gate clocks for CMU_DISP domain
which includes clocks of the display IPs (DECON/HDMI/DSIM/MIXER).

Also, CMU_DISP requires 'sclk_hdmi_spdif_disp' source clock from CMU_TOP
domain. This patch adds the clocks of CMU_TOP related to HDMI.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:12 +01:00
Chanwoo Choi 06d2f9dfa6 clk: samsung: exynos5433: Add clocks for CMU_MIF domain
This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes
the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect).
The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:11 +01:00
Chanwoo Choi a29308dad5 clk: samsung: exynos5433: Add clocks for CMU_G2D domain
This patch adds ths mux/divider/gate clocks of CMU_G2D domain which
includes G2D/MDMA IPs. The CMU_G2D requires its parent defined in
the CMU_TOP domain. Hence this patch adds G2D related clocks to the
CMU_TOP domain.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:11 +01:00
Chanwoo Choi 56bcf3f3ea clk: samsung: exynos5433: Add clocks for CMU_PERIS domain
This patch adds missing gate clocks of CMU_PERIS domain
which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs.
The special clocks of CMU_PERIS use oscclk source clock directly.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:10 +01:00
Chanwoo Choi d0f5de6677 clk: samsung: exynos5433: Add clocks for CMU_PERIC domain
This patch adds missing divider/gate clocks of CMU_PERIC domain
which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use
external input clock which has 'ioclk_*' prefix.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[ideal.song: Change clk flags of to pclk_gpio_* clk, pclk_gpio_* should be always on]
Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:09 +01:00
Chanwoo Choi 232364969d clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain
This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433.
CMU_TOP domain provides source clocks to other CMU domains.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:58:09 +01:00
Chanwoo Choi 96bd6224f0 clk: samsung: exynos5433: Add clocks using common clock framework
This patch adds support for the CMU (Clock Management Units) of Exynos5433
which is an Octa-core 64bit SoC. This patch supports necessary clocks
(PLL/MMC/UART/MCT/I2C/SPI) for kernel boot and includes binding documentation
for Exynos5433 clock controller.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
[s.nawrocki@samsung.com: whitespace cleanup in dt-bindings/clock/exynos5433.h]
[                        added U suffix to first arguments of PLL_35XX_RATE()]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-02-04 18:56:25 +01:00
Michael Turquette f85c6edfae Tegra clock fixes for 3.20
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUz5H9AAoJEFFb18rurjwTwssP/1luchJTB3qo+tqAIYYADgA4
 9QLQqfgIqZuJzzCNYgauELwN5M8S02ZABRzY9OOHnUY6BvoHPMpcOEey7i33ZYTJ
 9l4TFBOQyZE6W8tcyVL47pc9cjZydz9KKMO+/T5M16YyYoNZ1rXeGUli5j5sl2j7
 KoNurjC6C9Hw0M8+6CBTk4tYcMtxXeIacSGhV4VM03qKWj3e7485z0tYTG9yKfVD
 ol3KKGwjg1eZ9FSavMVYYnWajXZ7zlbB1PFqWO6V9h7DKmJMINbXGf/qr+/8eYSq
 zefWEYs1uGKunFtDv3C8wGRnl8ronBHehS2/xPpVEni0Eu2kJo1v8wDmftZ5ZyFW
 86ZdS4JTWD1/A2buEbJ3Ct30reNasGFUGNxIrYROglY4dK6DEPCMEFx5ZNiOhxlJ
 +BMjcsDzTt1gUWHbpxHrIZFErtHKcxtHeVckcZJgh87bnHVQKTAJ3cL9OJSWatqO
 lBDIsFxSOLap4gMKcMNddOEI8JNL1VZh+I/GdTh6VE2rhcurMNHvxmWL1TJ94/w8
 tRHRU5kRdYmxPzL98nDSR0h8WXShdWmnYNr+m2fk8iiPsI4umh/RS014kPVUYKq9
 a16cHkq88x3mKlEcyARG9tJK9oOCC5MuNuMPsPKf1dETOgHbAixlJVK5FHzHLjNr
 fERakm8nBM3rMSlgBbUL
 =k023
 -----END PGP SIGNATURE-----

Merge tag 'tegra-clk-3.20' of git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-next

Tegra clock fixes for 3.20
2015-02-02 15:01:10 -08:00
Michael Turquette b530e7d210 Exynos 3250, 4415 drivers cleanup by using common code
and addition of clock definitions for DVFS on Exynos4.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABCAAGBQJUyPwjAAoJEE1bIKeAnHqLbcQP/RQoZLdRJqhToiWxMKzQjaEh
 KPOAEBNGMOvPeVrf3Ct6r2a6elgLg6pKdYZcekupu9Vqrc0OXdHVKEM/YC7x5MEB
 Wzs/cuVZyYb8lhnWa0dmUTEQp/JvYX1Ifgp2xlKFc6ZPstuxIsp2HizQIS8+xsqW
 NxUIwkz1X0xyO4oLmVG7cO7co4FgSBfY3YI/PnUgDuixoX0X6eY0uNMLMS5J/5gP
 wOmwDmgJop/qi7tMfghDwDemF3/WJBY8V2D/dIvCoSsFu0bGAPqPnemEuaeBCbEo
 1sVrvEz60kXaJSx7A44Or2KX8cvaSPExcVmG66idYLlOW+gGXgjCRZ11A2FmzBDb
 sWXMkwSNeZ3QxL6fmJuRkXYDbwHNWlKdZIjlM6+iYPjA78twUEN5tD1U1YTh0cy/
 MCFmoUWJh2vpbQJiY3carcvq1NiNhALFUWrJK5zCoMybvIWrQhYBBCnZh7U1fDzo
 nmxLcDr1IG6eRjOfn6Q2XVmCXjhZX3kojAh/ePEHQGl5jyspZcMm4Top93sTO9l6
 SBimh5wrafK8nTQN8NeNGNr3s3CfYVURu9GdEiJJwecHnWoeFFc/Y/w7qaWorNtM
 tsg7Gjk+95OgM+m8Cb8Nu8WXUyK7AYznbgldzypx7FVMQRpDW7/UjpB0lKjT7qeG
 c0ScBKIXZd6RNyzHM2TJ
 =rFdT
 -----END PGP SIGNATURE-----

Merge tag 'v3.20-exynos-clk' of git://linuxtv.org/snawrocki/samsung into clk-next

Exynos 3250, 4415 drivers cleanup by using common code
and addition of clock definitions for DVFS on Exynos4.
2015-02-02 14:51:16 -08:00
Mark Zhang b270491eb9 clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
PLLD is the only parent for DSIA & DSIB on Tegra124 and
Tegra132. Besides, BIT 30 in PLLD_MISC register controls
the output of DSI clock.

So this patch removes "dsia_mux" & "dsib_mux", and create
a new clock "plld_dsi" to represent the DSI clock enable
control.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Mark Zhang <markz@nvidia.com>
2015-02-02 16:22:34 +02:00
Paul Walmsley 3fdd597209 clk: tegra: split Tegra124 clock header file
Split the Tegra124 clock macros into two files:

1. Clock macros common to both Tegra124 and Tegra132
2. Clock macros specific to Tegra124

This was requested by Thierry in Message-ID
<20140716072539.GD7978@ulmo>.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
2015-02-02 15:47:35 +02:00
Olof Johansson 1215c3e65a Samsung 3rd DT updates for v3.20
- add DISP1 power domain for support HDMI support on exynos5420/5422/5800
   and the power domain node including FIMD1, MIXER and HDMI modules
   (tested on exynos5420 Peach Pit and exynos5800 Peach Pi Chromebooks
   and exynos5422 Odroid XU3 by Javier Martinez Canillas)
 
 Note this is including a patch for adding clock IDs for the DISP1 power
 domain with Mike and Sylwester's acks so that could be handled together
 to avoid non-working.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJUyXrPAAoJEA0Cl+kVi2xqxRgP/3+NBTV3qWQ6+pYTl4kCebIz
 6lCmjgMeLZFfqRT420ouK1w7K0ra2eeeLX1GNZHOayzzBfFEJfR7GL6GMh40NqHy
 qs5CtAGTDlwb8ZSIECBcklABXICE6nujl9lqa3WD1vjwJy9Zug/3BUYfSlxwJap6
 Uzrw1tGt+k7WcHWWSyC8FCsK8gpvxb5cAIcBYTRPrxwHcGGeVfvn4IFBcz5eYMsz
 EttmkxXOVcpVJ90c+iSyrLSVuc+YH0m+ITrYj0/EjlzJzlQQ1NKjBg+eUnWU9Zef
 L7bZp3r4ZWU1FYNzQuuUXaEwSfSzGJ2icKLmX5nmcH5XPSBWPTYRDEIJe2fX7j+X
 1zhxi992LvZysIgJrfPJf8N6vsOeKc2mfz/65YLjcbSpFX7Qe5hISlMIRAWYT/69
 IqVsH0E05VvXtpFKfSlfapsztAmfVsaRZwsHhvmMEZdzUatJehQAn2t5gftZQ0iu
 9/z1HD3uszZWPghbRuFBalmgWB8WEhF8yhiIRBx1o/ML7DAcdLtrZ2HrSobjnBYz
 APnxZAU6s4QwAAk5bQCN7p3jPqSnZUakg1ETeXf3j1qvfWhTmKcYPggYDtfb2Nou
 tIwJdY3VAJWC+9n/4pKw5OKsCdE/34DUdT9rkuIBhO+AbRpeGkztSVJmBRU4bGQM
 1yVwptBrUybxDLqM4Lad
 =9Imn
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Merge "Samsung 3rd DT updates for v3.20" from Kukjin Kim:

- add DISP1 power domain for support HDMI support on exynos5420/5422/5800
  and the power domain node including FIMD1, MIXER and HDMI modules
  (tested on exynos5420 Peach Pit and exynos5800 Peach Pi Chromebooks
  and exynos5422 Odroid XU3 by Javier Martinez Canillas)

Note this is including a patch for adding clock IDs for the DISP1 power
domain with Mike and Sylwester's acks so that could be handled together
to avoid non-working.

* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Add DISP1 power domain for exynos5420
  clk: exynos5420: Add IDs for clocks used in DISP1 power domain

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-01-29 13:57:19 -08:00
Javier Martinez Canillas 8856010029 clk: exynos5420: Add IDs for clocks used in DISP1 power domain
When a power domain is powered off on Exynos5420 SoC, the input clocks of
the devices attached to this power domain are re-parented to oscclk and
restored to the original parent after powering on the power domain.

So a reference to the input and parent clocks for the devices attached to
a power domain are needed to be able to do the re-parenting. The DISP1 pd
includes modules which uses the following clocks:

ACLK_200_DISP1 (MIXER and HDMILINK)
ACLK_300_DISP1 (FIMD1)
ACLK_400_DISP1 (Internal Buses)

Each of these clocks are generated as the output of a clock mux so add an
ID for all of these clock muxes and their parents to be referenced in the
DISP1 power domain device node.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-01-29 08:52:22 +09:00
Chanwoo Choi e64fb42da4 clk: samsung: exynos4: Add divider clock id for memory bus frequency
This patch adds the divider clock id for Exynos4 memory bus frequency.
The clock id is used for DVFS (Dynamic Voltage/Frequency Scaling)
feature of the exynos memory bus.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-28 15:51:17 +01:00
Michael Turquette b80418f3c0 The two big changes are the additional of the watchdog clock, which
we currently only "fake" as the clock gate control is living in a
 very strange place, but the watchdog driver needs to read the clock
 rate from it and the setting of rk3288 plls to slow mode upon suspend.
 
 Other than that some more exported clocks and a CLK_SET_RATE_PARENT
 flag for the uart clocks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJUwT2NAAoJEPOmecmc0R2BjmsH/1Mp2vS9E9RBREhL/uuwtVlE
 6FhINcpzVkDrwXGfupVbrWmzHTxKcyUbnluVPsLs0BCRqhhKSU0t+TT5j+mRMOpu
 oNq/d3cp//fuBaiLr4G0jrgd/a9Gq4SsshPP6kH41r5CBN87jTt9wazX2GjNBf4C
 LYsNNWj/qpXxeA/rFuMsI15ntPiFvap8Ag/5+IDCHuT9nwCLy7iI3G0MRGZ1kfGT
 byOJd/FOqfAk3UJXuEgGOu27ZAOcbGLk7EL7YUdq7C70wAlUTu/8smTLqJFbXc9T
 Xgum3FnYcuPZqNQSxQMXFpgyzE0q7KLyufv5gU1A4s2Ac69cD3nDVh9k1LAcu4s=
 =arKA
 -----END PGP SIGNATURE-----

Merge tag 'v3.20-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

The two big changes are the additional of the watchdog clock, which
we currently only "fake" as the clock gate control is living in a
very strange place, but the watchdog driver needs to read the clock
rate from it and the setting of rk3288 plls to slow mode upon suspend.

Other than that some more exported clocks and a CLK_SET_RATE_PARENT
flag for the uart clocks.
2015-01-27 16:26:12 -08:00
Stephen Boyd b82875ee07 clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver
Add an LCC driver for MSM8960/APQ8064 that supports the i2s,
slimbus, and pcm clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-01-27 11:49:34 -08:00
Rajendra Nayak 2a5cfec947 dt-bindings: Add #defines for IPQ806x lpass clock control
Add defines to make more human readable numbers for the lpass
clock controller found on IPQ806x SoCs. Also remove the PLL4
define in gcc to avoid #define conflicts because that clock
doesn't exist in gcc, instead it lives in lcc.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[sboyd@codeaurora.org: Split off into separate patch]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-01-27 11:49:14 -08:00
Olof Johansson fba31105a4 The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
    latest i.MX6 data sheet
  - Add i.MX6SX sabreauto board support
  - Add imx6dl-udoo board support based off imx6q-udoo
  - Update sabrelite board to include I2C and HDMI support
  - Update the VPU compatible strings to also use cnm,coda<model>
  - Remove the ocram clock from the VPU node, as the clock is already
    provided inside the ocram node
  - Add system reset controller and syscon-reboot for VF610
  - Update VF610 device tree to use zero based naming for GPIO nodes,
    so that the number scheme matches hardware manual
  - A number of random device additions like watchdog for VF610, sahara
    for i.MX53, QSPI for imx6sx-sdb board, etc.
 
 Note: the branch imx/soc was merged into imx/dt because the SNVS device
 tree node needs to refer to the new clock ID added by the imx/soc patch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJUwg4gAAoJEFBXWFqHsHzO1NIH/AlXPcZZQM8sYbHrvWXmvVTM
 JstCR6XjVvOqT9zdFbEzdgpFGvu1oSDer8tOk00hL1NZYzHJRmTr/wgNP6tsvQ0F
 uoRj62B+WaMMcFanTbSdzh0tJtp7HZyFkJwjWRIL76bmd4VBsHXCPw4tr3oeDLzm
 x62SP14eSevV8ydlZj4TA2Ej7SxV6esdPLGeylZldXKTvo8AUH9sYN/BAz7WXfYH
 wfQ8owW/ql7YyCSRVdhSoeGG4H9qJA9M/CdwofsorLONkUx0nrBPRQfku5Uvf8Op
 fydbEbZ0LAkqIVnHcLi8xgBDhjjS/7glHSx4tp+mxtDcIMzAzfAtjyrawheWqQE=
 =ni1W
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:

The i.MX device tree update for 3.20:
 - Update i.MX6 operating-points setting in device tree to match the
   latest i.MX6 data sheet
 - Add i.MX6SX sabreauto board support
 - Add imx6dl-udoo board support based off imx6q-udoo
 - Update sabrelite board to include I2C and HDMI support
 - Update the VPU compatible strings to also use cnm,coda<model>
 - Remove the ocram clock from the VPU node, as the clock is already
   provided inside the ocram node
 - Add system reset controller and syscon-reboot for VF610
 - Update VF610 device tree to use zero based naming for GPIO nodes,
   so that the number scheme matches hardware manual
 - A number of random device additions like watchdog for VF610, sahara
   for i.MX53, QSPI for imx6sx-sdb board, etc.

Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.

* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
  ARM: dts: imx28-evk: remove duplicate property
  ARM: vf610: use zero based naming for GPIO nodes
  ARM: dts: imx6q: enable dma for ecspi5
  ARM: dts: vfxxx: Add SNVS node
  ARM: imx: clk-vf610: Add clock for SNVS
  ARM: imx: clk-vf610: Add clock for UART4 and UART5
  ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
  ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
  ARM: imx: support arm power off in cpuidle for i.mx6sx
  ARM: imx: remove unnecessary setting for DSM
  ARM: dts: imx6sx: add i.mx6sx sabreauto board support
  ARM: dts: imx6sx-sdb: Add QSPI support
  ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
  ARM: imx: apf51dev: add gpio-backlight support
  ARM: imx: correct the hardware clock gate setting for shared nodes
  ARM: imx: pllv3: add shift for frequency multiplier
  ARM vf610: add compatibilty strings of supported Vybrid SoC's
  ARM: i.MX53: dts: add sahara module
  ARM: dts: imx6dl: correct cpufreq volt/freq table
  ARM: dts: imx6q: update cpufreq volt/freq table
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-01-23 14:44:16 -08:00
Heiko Stuebner b82465c95e clk: rockchip: add id for watchdog pclk on rk3288
Adds a new id for the pclk supplying the watchdog on rk3288 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
2015-01-22 14:53:01 +01:00
Olof Johansson a315ec7b0c STi DT updates for v3.20, round 1.
Highlights:
 -----------
  - Add USB support for STiH410 & STiH407
  - Add DRM DT nodes for STiH410 & STiH407
  - Add STiH418 SoC support
  - Add DT nodes for MiPHY28lp PHY
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUuS5+AAoJEMo4jShGhw+JwAEP/RNm3jGlm4kYBhus68sz6ivC
 ShINj5uPF1ebaBO9NZhzj14PUZlpzP3Te9kpj9LkaZfSg2bNpLVNv7hZ1sUx+/ZZ
 LRm5F1w7ES8FzG7vFkyqueU1WdWKnKq/p5GpiKWn3zG0uyRSv5bRTxk9mPkLcpeJ
 sNQ+lNsruDHkxRdHmCLGAA0kNy4RWo8KVT9vgwKZ1gPe9FG30CB8tfRfO4KmR4WR
 hW2Q12YnVRGRdMxifdDufP8qHtfhQdC/i8pmWsBNIn/CZeDb7DMuik++wyo3ub3k
 D12huNQTpjw5LWeOwrMwlBCn93lkwqgatEFRCr6sHr6O/TkJ3475B0ySxzgTfMuY
 OcDHgpechYQtfEdVmGn3U/WARtXrfZcjZ5GTZBqzC4qjtSyzItoY+v34jJAd9mYV
 h3y5AgrXFvZ+4zlptZLYegKrq3/cVkBkJ30XZqWfWbiRmxFEjNyjVWNIAOfE+qWd
 JQjmvUUBxkvyLmirbnXmJTU0sOZYZgMocgiefMWHGxTiK19P9eXRLLoAY6QzMtSp
 nmlKa3rdjzDdWxLNKLTuYTada9hNRPn3KVJN0oUtJ8922pWTv7CFq/RYlJ8H0FtK
 Rus+EBgz7zZt+7YNJ2xG+on1ELa42En7CoZunoErdg0kDJ7yuALlA7wd5NU6aE+H
 7+mUM3bh/i4hS8zBaS5Y
 =E4qy
 -----END PGP SIGNATURE-----

Merge tag 'sti-dt-for-v3.20-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt

Merge "STi DT updates for v3.20, round 1" from Maxime Coquelin:

Highlights:
-----------
 - Add USB support for STiH410 & STiH407
 - Add DRM DT nodes for STiH410 & STiH407
 - Add STiH418 SoC support
 - Add DT nodes for MiPHY28lp PHY

* tag 'sti-dt-for-v3.20-1' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: DT: STi: STiH407: Add DT node for MiPHY28lp
  ARM: dts: STiH418: Add B2199 board support
  ARM: dts: Add STiH418 SoC support
  ARM: DT: STiH410: Add DRM dt nodes
  ARM: DT: STiH407: Add DRM dt nodes
  ARM: STi: DT: STiH410: Add DT nodes for the ehci and ohci usb controllers.
  ARM: STi: DT: STiH410: Add usb2 picophy dt nodes
  ARM: STi: DT: STiH407: Add usb2 picophy dt nodes

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-01-21 15:25:23 -08:00
Oleksij Rempel ec6415dc41 ARM: clk: add clk-asm9260 driver
Provide CLK support for Alphascale ASM9260 SoC.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-01-20 10:10:51 -08:00
Maxime COQUELIN 63f3171d5e ARM: dts: Add STiH418 SoC support
The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and
quad-core ARM Cortex A9 CPU.

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-16 11:57:48 +01:00
Padmavathi Venna 9f930a39e1 clk: samsung: exynos7: add clocks for audio block
Add required clk support for I2S, PCM and SPDIF.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15 15:18:51 +01:00
Padmavathi Venna ee74b56ab2 clk: samsung: exynos7: add clocks for SPI block
Add clock support for 5 SPI channels.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15 15:11:40 +01:00
Padmavathi Venna 9cc2a0c95f clk: samsung: exynos7: add gate clock for DMA block
Add support for PDMA0 and PDMA1 gate clks.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15 15:11:40 +01:00
Sanchayan Maity c205389557 ARM: imx: clk-vf610: Add clock for SNVS
Add support for clock gating of the SNVS peripheral.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-13 19:16:26 +08:00
Huang Lin 19da34b40e clk: rockchip: add clock IDs for the PVTM clocks
Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
PVTM_GPU.

Signed-off-by: Huang Lin <hl@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-12 21:39:38 +01:00
Kever Yang 19ce828cbc clk: rockchip: add clock ID for usbphy480m_src
There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.

Add the clock ID for it so that we can use in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-01-12 21:38:08 +01:00
Roger Chen 3cf8e53a48 GMAC: define clock ID used for GMAC
changes since v2:
1. remove SCLK_MAC_PLL

Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-12-31 19:14:18 -05:00
Vivek Gautam 83f191a7cd clk: samsung: exynos7: Add required clock tree for USB
Adding required gate clocks for USB3.0 DRD controller
present on Exynos7.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-12-23 12:02:14 +01:00
Tony K Nadackal 49cab82cb8 clk: samsung: exynos7: Add clocks for MSCL block
Add clock support for the MSCL block for Exynos7.

Signed-off-by: Tony K Nadackal <tony.kn@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-12-23 12:01:14 +01:00
Andrey Gusakov 7408d3061d ARM: shmobile: r8a7791: add MLB+ clock
Add MLB+ clock to R8A7791 device tree.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-23 09:18:23 +09:00
Andrey Gusakov f6b5dd4088 ARM: shmobile: r8a7790: add MLB+ clock
Add MLB+ clock to R8A7790 device tree.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-23 09:18:16 +09:00
Shinobu Uehara deac150c2d ARM: shmobile: r8a7794: Add MMCIF clock to device tree
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device node; only add clock]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 19:07:22 +09:00
Shinobu Uehara 8e181633e6 ARM: shmobile: r8a7794: Add SDHI clocks to device tree
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device nodes; only add clock]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 19:07:22 +09:00
Koji Matsuoka c5d82c9996 ARM: shmobile: r8a7794: Add I2C clocks to device tree
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[horms: omitted device nodes and aliases; only add clocks]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-12-21 19:07:21 +09:00
Hisashi Nakamura 3281480b70 ARM: shmobile: r8a7794: Add QSPI clock to device tree
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[horms: omitted device node and alias; only add clock]
[horms: use clock-indicies instead of renesas,clock-indicies]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-12-21 19:07:20 +09:00
Hiroyuki Yokoyama be16cd385c ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-12-21 19:07:19 +09:00
Ryo Kataoka ce85ad4788 ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 19:07:18 +09:00
Ulrich Hecht 4452164e7b ARM: shmobile: sh73a0: Add CPG register bits header
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21 17:09:21 +09:00
Kazuya Mizuguchi 22a9b44fc1 ARM: shmobile: r8a7794: Add USBDMAC[01] clocks to device tree
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[horms: merged per-clock patches]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-12-21 16:57:18 +09:00
Shinobu Uehara c7bab9f929 ARM: shmobile: r8a7794: Add USB clocks to device tree
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2014-12-21 16:57:17 +09:00
Linus Torvalds bfc7249cc2 Please consider pulling the clk framework changes toward 3.19. It is
much later than usual due to several last minute bugs that had to be
 addressed. As usual the majority of changes are new drivers and
 modifications to existing drivers. The core recieved many fixes along
 with the groundwork for several large changes coming in the future which
 will better parition clock providers from clock consumers.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUlMRQAAoJEDqPOy9afJhJgdUQAK4myJT0q10LSqe9piwzGVXg
 uDcIN5CTtbdYkvdGIfCjeqz3t+DClnAMPx2ZPIjC0Z1mIvqq+ViqwP5U8kKd7z1a
 WCKV8e5Et3O1WNbslzsx5Z2JYJNgzqr1xxWAOLTLh5rYxVwE5b946Yv4Whxa694I
 ugm4wNlibeN3H8pnyH8YEiWEtahtu7B5v/9WELpyREwNxw7ZA18MttEvWaamAPHG
 rAxhQCB3A3HaIvyg8KFdVmwOBZQMc2EWT00kJfdRWL4/iGAipKCnbuh1c8Pr/RQE
 XRg5Y+MuMLotoUELYYeZHtEmIlW3A+9gR6tLivswPpOP8/5BVUyA5Hh0yCGUqUHD
 s5Iheq7s7xnKEgIu9cD4tf1nCY41gw+4/I4pm47WLkaRgehcEBcAibVC3CupZ5pI
 hJiFqEKWPKEk8vAJ/mM+wCGI4w01+eoICBm4EG06Nwj4xkQcAVqE67ZvgVs1LrmL
 efqSxkWpNoetf0Q12cfePHmWtesGNdvljLdXQ54T4qH9HxNaI9/9eM6tyFTfrDSe
 BG5h7gbPr6/aM/1FfcWn5jQIfjEjPhQtSpCehs8pMf/pG5QZgftBtwe3p+yz7zXJ
 Q/v8xNEcZ7Ze6/9rJsAcbLzyzcdk9NzTlEMplzGBoUQFNiEXKoIjCDKAx39UFtMz
 EccWXvt9iNZZhmDcu0pU
 =jD84
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux

Pull clk framework updates from Mike Turquette:
 "This is much later than usual due to several last minute bugs that had
  to be addressed.  As usual the majority of changes are new drivers and
  modifications to existing drivers.  The core recieved many fixes along
  with the groundwork for several large changes coming in the future
  which will better parition clock providers from clock consumers"

* tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
  clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated
  ARM: OMAP3: clock: fix boot breakage in legacy mode
  ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIs
  clk: Really fix deadlock with mmap_sem
  clk: mmp: fix sparse non static symbol warning
  clk: Change clk_ops->determine_rate to return a clk_hw as the best parent
  clk: change clk_debugfs_add_file to take a struct clk_hw
  clk: Don't expose __clk_get_accuracy
  clk: Don't try to use a struct clk* after it could have been freed
  clk: Remove unused function __clk_get_prepare_count
  clk: samsung: Fix double add of syscore ops after driver rebind
  clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi
  clk: samsung: exynos4415: Fix build with PM_SLEEP disabled
  clk: samsung: remove unnecessary inclusion of header files from clk.h
  clk: samsung: remove unnecessary CONFIG_OF from clk.c
  clk: samsung: Spelling s/bwtween/between/
  clk: rockchip: Add support for the mmc clock phases using the framework
  clk: rockchip: add bindings for the mmc clocks
  clk: rockchip: rk3288 export i2s0_clkout for use in DT
  clk: rockchip: use clock ID for DMC (memory controller) on rk3288
  ...
2014-12-20 16:42:36 -08:00
Linus Torvalds 6da314122d ARM: SoC DT updates for 3.19
The DT branch adds a lot of new stuff for additional SoC and board
 support. The branch is the largest one and contains 513 out of the
 total 972 non-merge arm-soc changesets for 3.19.
 
 Most of the changes are about enabling additional on-chip devices for
 existing machines, but there are also an unusual number of new SoC
 types being added this time:
 
 * AMLogic Meson8
 * ARM Realview in DT mode
 * Allwinner A80
 * Broadcom BCM47081
 * Broadcom Cygnus
 * Freescale LS1021A
 * Freescale Vybrid 500 series
 * Mediatek MT6592, MT8127, MT8135
 * STMicroelectronics STiH410
 * Samsung Exynos4415
 
 The level of support for the above differs widely, some are just
 stubs with nothing more than CPU, memory and a UART, but others
 are fairly complete. As usual, these get extended over time.
 
 There are also many new boards getting added, this is the
 list of model strings that are showing up in new dts files:
 
 * ARM RealView PB1176
 * Altera SOCFPGA Arria 10
 * Asus RT-N18U (BCM47081)
 * Buffalo WZR-1750DHP (BCM4708)
 * Buffalo WZR-600DHP2 (BCM47081)
 * Cygnus Enterprise Phone (BCM911360_ENTPHN)
 * D-Link DIR-665
 * Google Spring
 * IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
 * IGEPv2 Rev. F (TI OMAP AM/DM37x)
 * LS1021A QDS Board
 * LS1021A TWR Board
 * LeMaker Banana Pi
 * MarsBoard RK3066
 * MediaTek MT8127 Moose Board
 * MediaTek MT8135 evaluation board
 * Mele M3
 * Merrii A80 Optimus Board
 * Netgear R6300 V2 (BCM4708)
 * Nomadik STN8815NHK
 * NovaTech OrionLXm
 * Olimex A20-OLinuXino-LIME2
 * Raspberry Pi Model B+
 * STiH410 B2120
 * Samsung Monk board
 * Samsung Rinato board
 * Synology DS213j
 * Synology DS414
 * TBS2910 Matrix ARM mini PC
 * TI AM5728 BeagleBoard-X15
 * Toradex Colibri VF50 on Colibri Evaluation Board
 * Zynq ZYBO Development Board
 
 Other notable changes include:
 
 * exynos: cleanup of existing dts files
 * mvebu: improved pinctrl support for Armada 370/XP
 * nomadik: restructuring dts files
 * omap: added CAN bus support
 * shmobile: added clock support for some SoCs
 * shmobile: added sound support for some SoCs
 * sirf: reset controller support
 * sunxi: continuing the relicensing under dual GPL/MIT
 * sunxi: lots of new on-chip device support
 * sunxi: working simplefb support (long awaited)
 * various: provide stdout-path property for earlycon
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVIcj3mCrR//JCVInAQL9Nw//YKK1l5gDZMmJ5nZXapXaZXERACN1n7H6
 9kkEZRF5ndUY4+MQmqYqHqBya04aQgnuHu0hsxbEAn2L3j2+ejZgc8XRqflArORy
 EXQvH/l6UNA11aCoLvKvT9fny76ZCOyEOALWXj9oLxhfd5X2d/So9q1ELFLgmc0S
 XnVMfpoXPeVPhe6l8EhF/qI0xYjM91CHWRopRQi6yp4DqFXV2+h5ggCpX1+S2e8L
 LyGNLk0RM9Mha+Qyy4O+LY+FoeWwDutQyat0ct9ov6FP8AYrR1N43d/ekJ57L8fU
 hVymo+5prUwEkIfQpsJQjPzonJxFssk1KD9t+GZ99VgEO02tvpjeB0nwoaWJxS25
 MzU2Bgp0Z/Yu0Q0SGu5/fuMya1Mo+wRA1OyQLp515TQqdWyTLcPT9o/ahfw8Uf1W
 6gBZoB+XXEQPI1sMHDDrn4r5T9mySsodAGfnvJoNxttnjCmVRzI5sXssnFji8TTF
 ciMEzfoTJNPqzxkzaOM13XmslKtFrI9A+DGgnOWn6oZXODzHcc6M+z/moiWy8b/e
 /HsbzWvp9HUPZVjM2AJR4iiyLXv7GRu9maNmGtoXKi9bnQDaNGWFovp/R5y8avQM
 xyzJ+6melNZnnoEue8/OOdum7jMeqPCRVQuqM2hKVcsmNEnb7kPBOi4AYXWTrTFO
 bcDvFylnmlA=
 =BHwA
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The DT branch adds a lot of new stuff for additional SoC and board
  support.  The branch is the largest one and contains 513 out of the
  total 972 non-merge arm-soc changesets for 3.19.

  Most of the changes are about enabling additional on-chip devices for
  existing machines, but there are also an unusual number of new SoC
  types being added this time:

   - AMLogic Meson8
   - ARM Realview in DT mode
   - Allwinner A80
   - Broadcom BCM47081
   - Broadcom Cygnus
   - Freescale LS1021A
   - Freescale Vybrid 500 series
   - Mediatek MT6592, MT8127, MT8135
   - STMicroelectronics STiH410
   - Samsung Exynos4415

  The level of support for the above differs widely, some are just stubs
  with nothing more than CPU, memory and a UART, but others are fairly
  complete.  As usual, these get extended over time.

  There are also many new boards getting added, this is the list of
  model strings that are showing up in new dts files:

   - ARM RealView PB1176
   - Altera SOCFPGA Arria 10
   - Asus RT-N18U (BCM47081)
   - Buffalo WZR-1750DHP (BCM4708)
   - Buffalo WZR-600DHP2 (BCM47081)
   - Cygnus Enterprise Phone (BCM911360_ENTPHN)
   - D-Link DIR-665
   - Google Spring
   - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
   - IGEPv2 Rev. F (TI OMAP AM/DM37x)
   - LS1021A QDS Board
   - LS1021A TWR Board
   - LeMaker Banana Pi
   - MarsBoard RK3066
   - MediaTek MT8127 Moose Board
   - MediaTek MT8135 evaluation board
   - Mele M3
   - Merrii A80 Optimus Board
   - Netgear R6300 V2 (BCM4708)
   - Nomadik STN8815NHK
   - NovaTech OrionLXm
   - Olimex A20-OLinuXino-LIME2
   - Raspberry Pi Model B+
   - STiH410 B2120
   - Samsung Monk board
   - Samsung Rinato board
   - Synology DS213j
   - Synology DS414
   - TBS2910 Matrix ARM mini PC
   - TI AM5728 BeagleBoard-X15
   - Toradex Colibri VF50 on Colibri Evaluation Board
   - Zynq ZYBO Development Board

  Other notable changes include:

   - exynos: cleanup of existing dts files
   - mvebu: improved pinctrl support for Armada 370/XP
   - nomadik: restructuring dts files
   - omap: added CAN bus support
   - shmobile: added clock support for some SoCs
   - shmobile: added sound support for some SoCs
   - sirf: reset controller support
   - sunxi: continuing the relicensing under dual GPL/MIT
   - sunxi: lots of new on-chip device support
   - sunxi: working simplefb support (long awaited)
   - various: provide stdout-path property for earlycon"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits)
  ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
  Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
  ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2
  ARM: BCM5301X: Add DT for Asus RT-N18U
  ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP
  ARM: BCM5301X: Add DT for Netgear R6300 V2
  ARM: BCM5301X: Add buttons for Netgear R6250
  ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
  ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
  arm: dts: zynq: Add Digilent ZYBO board
  arm: dts: zynq: Move crystal freq. to board level
  doc: dt: vendor-prefixes: Add Digilent Inc
  Documentation: devicetree: Fix Xilinx VDMA specification
  ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
  ARM: dts: rockchip: add label property for leds on Radxa Rock
  ARM: BCM5301X: Add LEDs for Netgear R6250 V1
  ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
  ARM: dts: add sysreg phandle to i2c device nodes for exynos
  ARM: dts: Remove unused bootargs from exynos3250-rinato
  ARM: dts: add board dts file for Exynos3250-based Monk board
  ...
2014-12-09 14:57:37 -08:00
Linus Torvalds 3a647c1d7a ARM: SoC driver updates for 3.19
These are changes for drivers that are intimately tied to some SoC
 and for some reason could not get merged through the respective
 subsystem maintainer tree.
 
 The largest single change here this time around is the Tegra
 iommu/memory controller driver, which gets updated to the new
 iommu DT binding. More drivers like this are likely to follow
 for the following merge window, but we should be able to do
 those through the iommu maintainer.
 
 Other notable changes are:
 * reset controller drivers from the reset maintainer (socfpga, sti, berlin)
 * fixes for the keystone navigator driver merged last time
 * at91 rtc driver changes related to the at91 cleanups
 * ARM perf driver changes from Will Deacon
 * updates for the brcmstb_gisb driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVIcj4mCrR//JCVInAQIvWg//WD72+2q0RmEvu8r/YN4SDfg5iY7OMzgy
 Jyt6rN1IhXBY5GJL5Hil1q2JP/7o8vypekllohmBYWzXO3ZJ2VK6NPIXEMuzaiCz
 D9gmb+N6FdR2L2iYPv7B/3uOf55pHjBu525+vLspCTOgcWBrLgCnA9e9Yg462AEf
 VP3x+kV0AH25lovEi3mPrc2e46jnl0Mzp3f3PCkPqRSEMn7sxu9ipii+elxvArYp
 jYYCB03ZEBFa7T0e4HD38gnVLbC6dTj47AcSCWYP9WhxJ2RmCQKRBEnJre02hgar
 NPg8z+OrUACIAkvJHzg3WccmXdi0aqQ2JDsl46Tkl7pA6NdyMLfizT3OiZnMRmgc
 34H0ZSxclW+j25aI8OmDpv2ypZev+UAzkbRobcvF+aV/zJeAX88tPgcshfCUVZll
 ZIqO7oJB73nCl1XBLv2ZrLV2tcOox6jL/5LQt0WYA5Szg5upo7D1fZl8v5jXX7eJ
 C62ychuABs6hsmH5jEy+73kdpHbYft7dZfGZxdgq1AIOkdWoynCze/R7Vj24xoXR
 118cTNN9ZTPHmN5yxUvuGoqA3FWOqkJXaTS4W0hRD6OxOGTsTV4FIlRnD+K7feOW
 ng1yfIcvKR1Dx7tsySTHQK+bZGNnovA/ENPK6VDuhbwE62Lx7N5hcbsSIKKwRI9C
 D1m1fC+AIcQ=
 =MwMG
 -----END PGP SIGNATURE-----

Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are changes for drivers that are intimately tied to some SoC and
  for some reason could not get merged through the respective subsystem
  maintainer tree.

  The largest single change here this time around is the Tegra
  iommu/memory controller driver, which gets updated to the new iommu DT
  binding.  More drivers like this are likely to follow for the
  following merge window, but we should be able to do those through the
  iommu maintainer.

  Other notable changes are:
   - reset controller drivers from the reset maintainer (socfpga, sti,
     berlin)
   - fixes for the keystone navigator driver merged last time
   - at91 rtc driver changes related to the at91 cleanups
   - ARM perf driver changes from Will Deacon
   - updates for the brcmstb_gisb driver"

* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
  clocksource: arch_timer: Fix code to use physical timers when requested
  memory: Add NVIDIA Tegra memory controller support
  bus: brcmstb_gisb: Add register offset tables for older chips
  bus: brcmstb_gisb: Look up register offsets in a table
  bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
  bus: brcmstb_gisb: Make the driver buildable on MIPS
  of: Add NVIDIA Tegra memory controller binding
  ARM: tegra: Move AHB Kconfig to drivers/amba
  amba: Add Kconfig file
  clk: tegra: Implement memory-controller clock
  serial: samsung: Fix serial config dependencies for exynos7
  bus: brcmstb_gisb: resolve section mismatch
  ARM: common: edma: edma_pm_resume may be unused
  ARM: common: edma: add suspend resume hook
  powerpc/iommu: Rename iommu_[un]map_sg functions
  rtc: at91sam9: add DT bindings documentation
  rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
  ARM: at91: add clk_lookup entry for RTT devices
  rtc: at91sam9: rework the Kconfig description
  ...
2014-12-09 14:48:22 -08:00
Linus Torvalds 6cd94d5e57 ARM: SoC platform changes for 3.19
New and updated SoC support, notable changes include:
 
 * bcm: brcmstb SMP support
 * bcm: initial iproc/cygnus support
 * exynos: Exynos4415 SoC support
 * exynos: PMU and suspend support for Exynos5420
 * exynos: PMU support for Exynos3250
 * exynos: pm related maintenance
 * imx: new LS1021A SoC support
 * imx: vybrid 610 global timer support
 * integrator: convert to using multiplatform configuration
 * mediatek: earlyprintk support for mt8127/mt8135
 * meson: meson8 soc and l2 cache controller support
 * mvebu: Armada 38x CPU hotplug support
 * mvebu: drop support for prerelease Armada 375 Z1 stepping
 * mvebu: extended suspend support, now works on Armada 370/XP
 * omap: hwmod related maintenance
 * omap: prcm cleanup
 * pxa: initial pxa27x DT handling
 * rockchip: SMP support for rk3288
 * rockchip: add cpu frequency scaling support
 * shmobile: r8a7740 power domain support
 * shmobile: various small restart, timer, pci apmu changes
 * sunxi: Allwinner A80 (sun9i) earlyprintk support
 * ux500: power domain support
 
 Overall, a significant chunk of changes, coming mostly from
 the usual suspects: omap, shmobile, samsung and mvebu, all of
 which already contain a lot of platform specific code in
 arch/arm.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAVIcjyGCrR//JCVInAQJJCRAA1Tm+HZGiAiTvXEAcm/T9tIA08uqtawHt
 cqyEAUyrnE8QxE4EhUd2pTw4EunVusqKF5EsDxOzw7b3ukUdLAWZE7bqBOSIJLqn
 hrfsQQ8dXLbyC7T/CHPnBVeM+pn9LiIc9qzpZ0YToiMnHBBI4vKFQntBjd31yoRE
 hN08I6AmDjQolOzzlqR1fuM0uZaKiHIcytdauTt3Vfqgg7FTHcTy3u1kClHTR1Lp
 m/KuDothGpR5OKjSnUQz7EO5V3KJEnaKey8z2xM1a7DLLAvJ6r2+DUaDopv9Dbz1
 W/V3H7fi5tLvillVa8xmlmzqWZbPc1xw8MWqvHZSWIMRZqloAHpC1VWKn0ZuH4SW
 5Bj4ubSrpYjJxjKYfrxtjmuzru3A2jWBNTSP5A4nsny0C3AUsXkfRmRS0VNdegF8
 sUdQ1MF8vEMpQT3QPH88+ccFHeIgqbcayhKqLPf7r8q0kwlym5N7Y2amU2A/O6qz
 +324r+yzfSA70VgJZ5EhXxWVDOPB4Lc8EtoWnH6T/kjncIMwzEsbEbyB3X1OaREW
 pVn3PNo06VjHLYoiHX+8G99pOFR/JZvaQs6jGCXLs+Orjp5WfP+kafkWqcB5GAKU
 Pfd3AQsl6rKAITdu0XsTdPiICNS4CmBiWYPepQsTa3pQaNgB7fwZNQKelNRIdGc+
 dF1lnQ7CXLQ=
 =lFoH
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support, notable changes include:

   - bcm:
        brcmstb SMP support
        initial iproc/cygnus support
   - exynos:
        Exynos4415 SoC support
        PMU and suspend support for Exynos5420
        PMU support for Exynos3250
        pm related maintenance
   - imx:
        new LS1021A SoC support
        vybrid 610 global timer support
   - integrator:
        convert to using multiplatform configuration
   - mediatek:
        earlyprintk support for mt8127/mt8135
   - meson:
        meson8 soc and l2 cache controller support
   - mvebu:
        Armada 38x CPU hotplug support
        drop support for prerelease Armada 375 Z1 stepping
        extended suspend support, now works on Armada 370/XP
   - omap:
        hwmod related maintenance
        prcm cleanup
   - pxa:
        initial pxa27x DT handling
   - rockchip:
        SMP support for rk3288
        add cpu frequency scaling support
   - shmobile:
        r8a7740 power domain support
        various small restart, timer, pci apmu changes
   - sunxi:
        Allwinner A80 (sun9i) earlyprintk support
   - ux500:
        power domain support

  Overall, a significant chunk of changes, coming mostly from the usual
  suspects: omap, shmobile, samsung and mvebu, all of which already
  contain a lot of platform specific code in arch/arm"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
  ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
  soc: integrator: Add terminating entry for integrator_cm_match
  ARM: mvebu: add SDRAM controller description for Armada XP
  ARM: mvebu: adjust mbus controller description on Armada 370/XP
  ARM: mvebu: add suspend/resume DT information for Armada XP GP
  ARM: mvebu: synchronize secondary CPU clocks on resume
  ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
  ARM: mvebu: Armada XP GP specific suspend/resume code
  ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
  ARM: mvebu: implement suspend/resume support for Armada XP
  clk: mvebu: add suspend/resume for gatable clocks
  bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
  bus: mvebu-mbus: suspend/resume support
  clocksource: time-armada-370-xp: add suspend/resume support
  irqchip: armada-370-xp: Add suspend/resume support
  ARM: add lolevel debug support for asm9260
  ARM: add mach-asm9260
  ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
  power: reset: imx-snvs-poweroff: add power off driver for i.mx6
  ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
  ...
2014-12-09 14:38:28 -08:00
Michael Turquette b572b5f821 - clock phase setting capability for the rk3288 mmc clocks
- pll init to allow syncing to actual rate table values
 - some more exported clocks
 - fixes for some clocks (typos etc) all of them not yet used
   in actual drivers
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJUd7jIAAoJEPOmecmc0R2BrOkIAJpMe0tqHxtcN1fBSS2rS3/b
 bgcu37WfGXt1FkBkGPyoVfy0m6tQ9hHx07o62IowVvaWzmvoQppLmC20+y6gKVMj
 nVGlhbfhZ3bDJBbsbWAyzQvH+fJx+pOTIGQJCCNX/aixSYnfvda/FP0u7EVrY4W/
 mF/b5mPmHhah9EeyuAwy4eAT5xCCER5DqR9eryObDwj3N9cUluM9BiK1JWXXWdYt
 i/p3NS+MEjFG2KrLB+Rzu39yFRsjF8IOBKuYNh752NVcsNy2CuxqbDSpn8NM2niW
 bxW07X5J8JSpecpuzJmkuOomauE+4pKXMM3W+XL+XO8iF3h9inXXp0nzX31cQRI=
 =st2A
 -----END PGP SIGNATURE-----

Merge tag 'v3.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

- clock phase setting capability for the rk3288 mmc clocks
- pll init to allow syncing to actual rate table values
- some more exported clocks
- fixes for some clocks (typos etc) all of them not yet used
  in actual drivers
2014-11-28 21:00:16 -08:00
Arnd Bergmann 6b7f0570b1 The i.MX device tree changes for 3.19:
- Device additions for board vf610-colibri, pwm, backlight, I2C, RTC,
    ADC etc.
  - Update i.MX6 phyFLEX board to include PCIe, CAN and audio support
  - Improve SSI clocks description for i.MX5 platforms
  - Add ENET2 support for imx6sx-sdb board
  - Add device tree source for LS1021A SoC, board QDS and TWR
  - Enable cpufreq support for i.MX53
  - Enable VPU device support for i.MX6QDL
  - Enable poweroff support for i.MX6 SoCs
  - Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q
  - Create generic base device trees for Vybrid and add support for
    Colibri VF50
 
 Note: the change set is built on top of imx-soc-3.19 to resolve the
 dependency that  "ARM: dts: imx53: add cpufreq-dt support" uses the
 clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM
 clock".
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJUcZicAAoJEFBXWFqHsHzO0ooH/ie5r7JDjklD6IlAxD9UyDyp
 RQSF/8VYTc1EhECI5D/xmHARnUM5AxfMBQzFyavz/0hkGp22xJtBgp5ZlYtWwyAF
 qpLI031/5hn+37NyMxdcd6nU55e7GJw4loBXTZ5pNSRdP+ubsUVccfUdQ1K5hPA6
 KeS5vqaX26c5P2R+tkx2pfRLmCrSWNKNIpIbZzenlu2dS7U77ex1AO2W+ToDTgQ3
 asVIMD/7oQ4soEGZfSQdzHCftQ2OdVGlybFoMCkW5xrzRVfucbSN2BbLpEM5Z117
 /DZpfAmHlT4NrGz/BBzpK6l3AWFmXLmCP/dFvvfzKM3uWgr/zlVF8ChW/xgCc+g=
 =FnNq
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Pull "The i.MX device tree changes for 3.19" from Shawn Guo:

 - Device additions for board vf610-colibri, pwm, backlight, I2C, RTC,
   ADC etc.
 - Update i.MX6 phyFLEX board to include PCIe, CAN and audio support
 - Improve SSI clocks description for i.MX5 platforms
 - Add ENET2 support for imx6sx-sdb board
 - Add device tree source for LS1021A SoC, board QDS and TWR
 - Enable cpufreq support for i.MX53
 - Enable VPU device support for i.MX6QDL
 - Enable poweroff support for i.MX6 SoCs
 - Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q
 - Create generic base device trees for Vybrid and add support for
   Colibri VF50

Note: the change set is built on top of imx-soc-3.19 to resolve the
dependency that  "ARM: dts: imx53: add cpufreq-dt support" uses the
clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM
clock".

* tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (51 commits)
  ARM: dts: imx6q-tbs2910: Enable snvs-poweroff
  ARM: dts: imx6: add pm_power_off support for i.mx6 chips
  ARM: dts: vf-colibri: add USB regulators
  ARM: dts: imx6: phyFLEX: Add CAN support
  ARM: dts: imx6: phyFLEX: Add PCIe
  ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic
  ARM: dts: imx6: phyFLEX: Enable gpmi in module file
  ARM: dts: imx6: phyFLEX: set nodes in alphabetical order
  ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC
  ARM: dts: vf-colibri: Add I2C support
  ARM: dts: imx6qdl: Enable CODA960 VPU
  ARM: dts: imx6q-tbs2910: Remove unneeded 'fsl,mode' property
  ARM: dts: vf610: enable USB misc/phy nodes where necessary
  ARM: dts: vf610: use new GPIO support
  ARM: dts: pbab01: enable I2S audio on phyFLEX-i.MX6 boards
  ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02
  ARM: dts: vf500-colibri: add Colibri VF50 support
  ARM: dts: vf610: create generic base device trees
  ARM: dts: vf610: assign oscillator to clock module
  dt-bindings: arm: add Freescale LS1021A SoC device tree binding
  ...

Signed-off-by; Arnd Bergmann <arnd@arndb.de>
2014-11-28 15:01:57 +01:00
Alexandru M Stan c1c9f2cced clk: rockchip: add bindings for the mmc clocks
These clocks represent the physical clocks (including phases) and they will
later be used for clock phase tuning.

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-28 00:40:53 +01:00
Sonny Rao 6d288b169b clk: rockchip: rk3288 export i2s0_clkout for use in DT
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
[removed CLK_SET_RATE_PARENT from original patch]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-28 00:37:47 +01:00
Jeff Chen 1ae2b01658 clk: rockchip: add binding ID for DMC (memory controller) clocks on rk3288
The DMC clocks need to be turned off at runtime, so we should have IDs
so we can export them.

Signed-off-by: Jeff Chen <cym@rock-chips.com>
[dianders: split into two patches; adjusted commit msg]
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-26 18:32:22 +01:00
Thierry Reding 4f4f85fa0b clk: tegra: Implement memory-controller clock
The memory controller clock runs either at half or the same frequency as
the EMC clock.

Reviewed-By: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-26 09:43:23 +01:00
Michael Turquette da57b46010 Merge branch 'clk-fixes' into clk-next 2014-11-24 17:45:33 -08:00
Lucas Stach 82a40b5482 ARM: imx53: clk: add ARM clock
The ARM clock is a virtual clock feeding the ARM partition of
the SoC. It controls multiple other clocks to ensure the right
sequencing when cpufreq changes the CPU clock rate.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-11-23 14:56:20 +08:00
Lucas Stach 6f0628aa9f ARM: imx5: add step clock, used when reprogramming PLL1
This is the bypass clock used to feed the ARM partition
while we reprogram PLL1 to another rate.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-11-23 14:56:19 +08:00
Arnd Bergmann 5ba3c24ca0 Second Round of Renesas ARM Based SoC DT Updates for v3.19
* Add labels for LEDs on kzm9g-reference and koelsch
 * Add Sound support to r8a7790/lager and r8a7791/koelsch
 * Add IIC DMA nodes to r8a7790 and r8a7791
 * Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
 * Add SGX, MMP and VSP1 clocks to r8a7794
 * Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUbbZkAAoJENfPZGlqN0++A0gQAJ5bs24c0fRzIPXrkeIzY0aQ
 262nBv175LG8wihixOAJB/jiTPSpaZavlR+iXYq2iU+IqkkwIzFtdNs4q/ZMdppW
 J7LPUj0DwJe6+B8AYhSsSDDNW0P4avBXfU4rFXzLp2IkAqi/HdxJjB3/9C5Nzi7b
 mpsTvz3x4iP2NZdEKIDGtMBwtjghsfKBRaLsgNow+JdxLDLuWKWjaR8PMxvF1LFa
 Z/jz343PmFGCaWypq5HVyu+h3eNvh9HpOUleurGijXzoZl61U1SDceTygfbF+Ht2
 nNq8gqynokYWfmDQa8HJlPEmeCFhDtBHc9NNPJBEOCv7pWWdsXgfEYW5OepH+xzp
 FqfXM2DwKVMDcSL3LDwXYT1xZQfI8KUDg6ek5gXk8pDDpVhAb2ishEt+Vr3zEL+H
 uro9wruHl8lYujq9P4Jmh9icl2fMx3hXIoq3PVkzOkmJhViwSm55pqlAAVN72d4u
 xIthmwmvQ/zsvn5RwV3jmWUlwlYJmMz2gXqtsq+9NUy55yUMqjeSB9kchTzrM6SJ
 CzfiCl5j2SC6jiCNGsiFjI603kdIKq0uvaLQStEAHoWJkuf+jEWmfjV9qPptE+sa
 rPhIhWUXqs5Emw3DgQynIOy+szTWlg1hJl9MDF/SaeiyZ/dh/teqIoYhAjfqlCFS
 7etGw24D7YujpG9jlfC4
 =0cH9
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:

* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791

* tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
  ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree
  ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
  ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
  ARM: shmobile: r8a7794: Add SGX clock to device tree
  ARM: shmobile: koelsch: add Volume Ramp usage on comment
  ARM: shmobile: lager: add Volume Ramp usage on comment
  ARM: shmobile: r8a7791: add DMA nodes for IIC
  ARM: shmobile: r8a7790: add DMA nodes for IIC
  ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
  ARM: shmobile: koelsch dts: Add labels for the LEDs
  ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
  ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
  ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
  ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
  ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
  ARM: shmobile: koelsch: Sound DMA support on DTS
  ARM: shmobile: koelsch: Sound PIO support on DTS
  ARM: shmobile: koelsch: fixup I2C2 clock frequency
  ARM: shmobile: lager: Sound DMA support via DVC on DTS
  ARM: shmobile: lager: Sound DMA support via SRC on DTS
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-21 13:02:08 +01:00
Arnd Bergmann ec498f8e51 STi DT updates for v3.19, round 2.
Highlights:
 -----------
  - Refactor STiH407 SoC and board to add STiH410 SoC support
  - Add USB support to STiH416 SoC
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUazyhAAoJEMo4jShGhw+JtnUP/0qx5OjJXDAdoycX1MSxf8KK
 VtnQkT2ydQ1HryfQyd/1QE0lBUpjlMVRxEd7TPcLa3nDlytwAQn9ZZLnFyPTme+q
 WiXe49/Qf2q/glOcL+5ic5rG69Bn2MlQCJEL8Z+WRaUG6QsuNoIOUQb4w05zyXjS
 QeTwV/gSLs4F1rdF+yPSzF/MW9w7fbrdULl+e6gil9nggnBVrUZtMS/dp7BA5KEd
 1sXozEyMP+2tJIt02ZOYZBWnGIigayI2P+Rvf7fi1YtYRCpycIe7hoggx1HRYldg
 kxQspPFcNz1xplqDiTSSbYHJhXIuk9+PGPg2dxKaqA++7kDwauj8SsZARPQjBzNS
 moM4fkK8s6L0KnzdpZmfncWitN0upfI0J8MLmRCbkIY0mC95HoCOI+pycICq/26a
 nIxCCamcWGhsbVht7WDeJ/86c/qLGNlI6e4hWyNkiFUoukD1Uy1qpaCDl6HrpF4h
 15+gh4APc1JoRcWKHr0hCbG0Shtg69G2qNS1DPp7XFAKsbg7BC3e2NUzhgskLa3r
 S2AVxijW0kEIvLNHf1KZuBWJ5L9bc3Dlloqfz4zcQiAanzKXjPeZrduwOFMCpjK4
 zVFhsrMH7PKsEx100RXP/fk1L+pwR9fyBU8QMWR5VIt0ND4KxwrrziY3AUaVrXNJ
 gREWQhfD4toJ44A7WuqL
 =w34C
 -----END PGP SIGNATURE-----

Merge tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt

Pull "STi DT updates for v3.19, round 2" from Maxime Coquelin:

Highlights:
-----------
 - Refactor STiH407 SoC and board to add STiH410 SoC support
 - Add USB support to STiH416 SoC

* tag 'sti-dt-for-v3.19-2' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: STi: DT: STiH416: Change miphy356 node name to phy@fe382000
  ARM: STi: DT: STih407: STih410: Add clk_ignore_unused to kernel bootargs
  ARM: STi: DT: STiH410: Add STiH410 SoC and b2120 board support.
  ARM: STi: DT: STih407: Abstract common dt nodes into shared files.
  ARM: STi: DT: STiH410: Add pinctl config for usb controllers.
  ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks
  ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers.
  ARM: STi: DT: STiH416: Add DT node for the stih415/6 usb2 phy
  ARM: STi: DT: STiH416: Add pinctl setup for usb controllers.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-20 17:36:23 +01:00
Arnd Bergmann 8ef74e5d39 Renesas ARM Based SoC DT Updates for v3.19
* Add Add SoC-specific SATA compatible property to r8a7779
 * Enable DMA for MMCIF on r8a7791 and r8a7790
 * Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
 * Enable TMU timer via DT on r8a7778
 * Enable CMT timer via DT on r8a73a4
 * Add MMP and {SR}GX clocks to  r8a7791 and r8a7790
 * Correct scifa2 clock index on r8a7740
 * Add missing INTCA for irqpin on r8a7740
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUWBh9AAoJENfPZGlqN0++zjwP/RxjS7wnDQvGqw2d3GSKp0I3
 Es/C4Ssm8kDYlgY1cQqeI/KK05vLEp5998YGy2kaVlTUSCj6UMO4UJ4t6yZgBeGA
 Nh4V70I475zlmxBjF4ZePD5+o/lyTbw+2GxHKFRsnxXqEr3E9QDNCgAc7kPevJl3
 U9T6B63VP3jOxJVzhfSNeFKYgmg4YgLW0aCsnZoW9mlS0phFZPO236JHdvFH8QQj
 FBjcdkkQjncBUTvLB54ASRk6wTWnEQ9WFGIGHDNYM11bypLndbKFxziofkKnex0B
 Pw6r9nY5jsKVkye68PsL5abKnyJQ87assacGEm6SuO/Sp8fR9ixt1+VWvLFfybcr
 sNYs1996kXghKvYbTZOFSGiH9e5BL/rwwepE/XkPbTvI1CeFIs3LQtXLfwfKmf/p
 +gIFT7ouY3GHtCivSSBz0iB8Z4pUNaurLmYkIsvUzsbccOMUcq8F4HL8RXWyBwG9
 FK0fwRCXP5zwI9rMePnGcLhR2LXB1n3yDfbfr7ZOd3Vw9rk3s9fj2czpJJMB4Dtz
 Nd4W5EedW6SrqzCMND1ZoE0T48zRooRWsgMv5AEES4epSDhuDLO1cQpkqca7fbfQ
 7rQmJpS8YEvXstbJWh44jZxWdN+W0TPydv2MrpPorB6KAueSTF259Z7zFoo4+S5f
 EPflJfAS+yMLDnl2ARaC
 =78IM
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:

* Add Add SoC-specific SATA compatible property to r8a7779
* Enable DMA for MMCIF on r8a7791 and r8a7790
* Enable USB-PHY, HS-USB and USB3.0 on r8a7791 and r8a7790
* Enable TMU timer via DT on r8a7778
* Enable CMT timer via DT on r8a73a4
* Add MMP and {SR}GX clocks to  r8a7791 and r8a7790
* Correct scifa2 clock index on r8a7740
* Add missing INTCA for irqpin on r8a7740

* tag 'renesas-dt-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (34 commits)
  ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property
  ARM: shmobile: r8a7791: Reference DMA channels in MMCIF DT node
  ARM: shmobile: r8a7790: Reference DMA channels in MMCIF DT nodes
  ARM: shmobile: r8a7791: Add MMCIF0 DT node
  ARM: shmobile: r8a7790: Rename mmcif node to mmc
  ARM: shmobile: r8a7778: Add SoC-specific TMU compatible property
  ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible property
  ARM: shmobile: henninger: enable HS-USB
  ARM: shmobile: koelsch: enable HS-USB
  ARM: shmobile: r8a7791: add HS-USB device node
  ARM: shmobile: lager: enable HS-USB
  ARM: shmobile: r8a7790: add HS-USB device node
  ARM: shmobile: r8a7791: add USB3.0 device node
  ARM: shmobile: lager: enable USB3.0
  ARM: shmobile: r8a7790: add USB3.0 device node
  ARM: shmobile: r8a7794: Add arch_timer to device tree
  ARM: shmobile: bockw-reference: Initialise TMU device using DT
  ARM: shmobile: r8a7778: Add TMU nodes
  ARM: shmobile: armadillo800eva dts: Enable TMU0
  ARM: shmobile: r8a7740 dtsi: Add TMU0 and TMU1 device nodes
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-11-19 22:45:33 +01:00
Michael Turquette 3c7f4fe810 Merge branch 'for-v3.19/exynos-clk' of git://linuxtv.org/snawrocki/samsung into clk-next-exynos 2014-11-19 11:41:21 -08:00
Yoshifumi Hosoya dc3cf93d89 ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-19 09:22:12 +09:00
Kouei Abe 3e58a5424c ARM: shmobile: r8a7794: Add SGX clock to device tree
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-19 09:22:12 +09:00
Peter Griffin cc149f7ae2 ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks
Although most clock outputs are the same as stih407 SoC, stih410
also has some additional new clock outputs.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-11-18 12:54:55 +01:00
Georgi Djakov 9a6cb70f40 clk: qcom: Fix duplicate rbcpr clock name
There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined

Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.

Fixes: 2b46cd23a5 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-17 10:40:42 -08:00
Chao Xie 1ec770d92a clk: mmp: add mmp2 DT support for clock driver
It adds the DT support for mmp2 clock subsystem.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-12 16:34:22 -08:00
Chao Xie 2bc61da9f7 clk: mmp: add pxa910 DT support for clock driver
It adds the DT support for pxa910 clock subsystem.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-12 16:34:18 -08:00
Chao Xie ab08aefcd1 clk: mmp: add pxa168 DT support for clock driver
It adds the DT support for pxa168 clock subsystem.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-12 16:34:14 -08:00
Kuninori Morimoto 8994fff677 ARM: shmobile: r8a7791: Add Audio DMAC devices to DT
Instantiate the two Audio DMA controllers in the r8a7791 device tree.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-10 10:08:10 +09:00
Kuninori Morimoto ba3240beae ARM: shmobile: r8a7790: Add Audio DMAC devices to DT
Instantiate the two Audio DMA controllers in the r8a7790 device tree.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-10 10:07:37 +09:00
Olof Johansson 1749e1fc9e STi DT updates for v3.19, round 1.
Highlights:
 -----------
  - Add SDHCI support for STiH41x B2020 boards
  - Add reset controllers to STiH407 SoC
  - Add MiPHY & SATA support to STiH416
  - Add Thermal supportto STiH416
  - Add Clock support to STiH407 SoC
 
 This tag also includes STiH407 bindings definitions for reset controller.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUU24fAAoJEMo4jShGhw+J8AMP/ii1CVgJZkaimGllZlO6kOwj
 tB6tZ3n8EGoC7P4UismVzmKqqGCkLGChzlUzvJMqSjE8kmmtwYPODxUy6nRZ5Gii
 S9PGAmJ8vRqEyG/8y83Y1OGnV7WBzVQfHnwFr0JvrFvCYyiHnpbUlxIKkA85F+JG
 Hnd+HKqOymhwY8eSN8nH/slrFkCYAEaGLoVV7tZWtr0p6gQYA7rP7XkFOXs1Ln5G
 iA8wtTDaPIyRH7X5/WeESjhkBMP8YcmslLUtaagIrORcQWC+TYNSFwWkciyFothd
 sz0szIO0/j9uLgxdKLnHxAU8mwx1in0ZNDaC+WlKtSE7V39C2PhaSmJ9sL+0Dxu3
 2HSoUPBgEJ0Zu5U7xSNgYQZrfANGx059B00J2OqDJfLshyDmpJrbJZtsQTW6Qz6N
 c8fGebGTXHHkLvjRHfh6LXRN30CpJc6m+mmwybhROnYyXdv7htv2q2V340GoG2mI
 6l5JY46g91KrSjEf91//qXLBvesoRVAPS9g2wKBjiePIl1nzdjZOfZ0vpw+vn1PV
 t9DUk1S2OuzeMdqSIt6XsjJQQcTL8npx2V+88ibo5BkAlOdLcCSOUuTzAHEBZtwB
 GJVTXog3TX3SoDmCc/guUAN7gzto3LBAz9GwcIuC28tkF0UufUX3v6wU+yz1+l00
 vLV6A2aJwUAZ3rRbQI2b
 =YmAW
 -----END PGP SIGNATURE-----

Merge tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt

Merge "STi DT updates for v3.19, round 1" from Maxime Coquelin:

Highlights:
-----------
 - Add SDHCI support for STiH41x B2020 boards
 - Add reset controllers to STiH407 SoC
 - Add MiPHY & SATA support to STiH416
 - Add Thermal supportto STiH416
 - Add Clock support to STiH407 SoC

This tag also includes STiH407 bindings definitions for reset controller.

* tag 'sti-dt-for-v3.19-1' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: STi: DT: STiH407: Fix: clk-tmds-hdmi clock is missing
  ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks
  ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9
  ARM: STi: DT: STiH407: 407 DT Entry for clockgen D0/D2/D3
  ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
  ARM: STi: DT: STiH407: 407 DT Entry for clockgen A0
  ARM: DT: STi: STiH416: Add DT node for ST's SATA device
  ARM: DT: STi: STiH416: Add DT node for MiPHY365x
  ARM: STi: DT: STiH416: Supply Thermal Controller Device Tree nodes
  ARM: STi: DT: Enable second sdhci controller for stih416 b2020 boards.
  ARM: STi: DT: Enable mmc0 for both stih415 and stih416 SoCs
  ARM: STi: DT: Add sdhci controller for stih415
  ARM: STi: DT: Add sdhci pin configuration for stih415
  ARM: STi: DT: Add sdhci controller for stih416
  ARM: STi: DT: Add sdhci pins for stih416
  ARM: sti: Add STiH407 reset controller support.
  ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET
  ARM: STi: DT: STiH41x: Convert all uppercase non-defines to lowercase
  reset: stih407: Add reset controllers DT bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-11-08 16:39:12 -08:00
Stefan Agner c72c553249 ARM: imx: clk-vf610: define PLL's clock tree
So far, the required PLL's (PLL1/PLL2/PLL5) have been initialized
by boot loader and the kernel code defined fixed rates according
to those default configurations. Beginning with the USB PLL7 the
code started to initialize the PLL's itself (using imx_clk_pllv3).

However, since commit dc4805c2e7
(ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver)
imx_clk_pllv3 no longer takes care of the ENABLE and BYPASS bits,
hence the USB PLL were not configured correctly anymore.

This patch not only fixes those USB PLL's, but also makes use of
the imx_clk_pllv3 for all PLL's and alignes the code with the PLL
support of the i.MX6 series.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-04 13:40:14 +08:00
Koji Matsuoka 148ebf479a ARM: shmobile: r8a7794: Add VIN clock to device tree
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-04 09:09:52 +09:00
Gabriel FERNANDEZ 77deed2bbd ARM: STi: DT: STiH407: Add all defines for STiH407 DT clocks
This patch adds all clock defines for clockgen C0,D0,D2 and D3

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 12:07:43 +01:00
Abhilash Kesavan 932e98224d clk: samsung: exynos7: add gate clock for ADC block
Add clock support for the ADC interface in Exynos7.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:54 +01:00
Naveen Krishna Ch 2ab2dfe5d4 clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocks
Add clock support for the watchdog timer, pwm timer and thermal
management unit IPs in Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:53 +01:00
Naveen Krishna Ch f5e127cd5e clk: samsung: exynos7: add clocks for RTC block
Add clock support for the RTC block in Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:52 +01:00
Naveen Krishna Ch 6d0c8c723f clk: samsung: exynos7: add clocks for MMC block
Exynos7 supports 3 MMC channels, add the MMC gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:51 +01:00
Naveen Krishna Ch 57a2b485fa clk: samsung: exynos7: add clocks for I2C block
Exynos7 supports 12 I2C channels, add the I2C gate clocks to
support them.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:51 +01:00
Naveen Krishna Ch 532abc3a4a clk: samsung: add initial clock support for Exynos7 SoC
Add initial clock support for Exynos7 SoC which is required
to bring up platforms based on Exynos7.

Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: Thomas Abraham <thomas.ab@samsung.com>
Tested-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31 10:45:47 +01:00
Gabriel FERNANDEZ 1befe7e49f ARM: STi: DT: STiH407: 407 DT Entry for clockgen C0
Patch adds DT entries for clockgen C0

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:59:09 +01:00
Chanwoo Choi 384cb2ce81 clk: samsung: exynos4415: Add clocks using common clock framework
This patch adds clock driver of Exynos4415 SoC based on Cortex-A9 using
common clock framework. The CMU (Clock Management Unit) of Exynos4415
controls PLLs(Phase Locked Loops) and generates system clocks for CPU,
busses and function clocks for individual IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-30 19:53:04 +01:00
Yoshifumi Hosoya 74d89d25f6 ARM: shmobile: r8a7791: Add MMP clock to device tree
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30 09:56:28 +09:00
Yoshifumi Hosoya 4ba8f2468c ARM: shmobile: r8a7790: Add MMP clock to device tree
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30 09:56:28 +09:00
Kouei Abe e4d2fd9eb4 ARM: shmobile: r8a7791: Add SGX clock to device tree
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30 09:56:27 +09:00
Kouei Abe 2284ff5f3f ARM: shmobile: r8a7790: Add RGX clock to device tree
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30 09:56:27 +09:00
Geert Uytterhoeven 3ab84ee95b ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin module
This clock drives the INTCA irqpin controller modules.
Before, it was assumed enabled by the bootloader or reset state.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: devicetree@vger.kernel.org
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30 09:56:22 +09:00
Steve Longerbeam a1fc198046 ARM: i.MX6: Fix "emi" clock name typo
Fix a typo error, the "emi" names refer to the eim clocks.

The change fixes typo in EIM and EIM_SLOW pre-output dividers and
selectors clock names. Notably EIM_SLOW clock itself is named correctly.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
[vladimir_zapolskiy@mentor.com: ported to v3.17]
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-10-25 20:01:09 +08:00
Linus Torvalds c0fa2373f8 The clk tree changes for 3.18 are dominated by clock drivers. Mostly
fixes and enhancements to existing drivers as well as new drivers. This
 tag contains a bit more arch code than I usually take due to some OMAP2+
 changes. Additionally it contains the restart notifier handlers which
 are merged as a dependency into several trees.
 
 The PXA changes are the only messy part. Due to having a stable tree I
 had to revert one patch and follow up with one more fix near the tip of
 this tag. Some dead code is introduced but it will soon become live code
 after 3.18-rc1 is released as the rest of the PXA family is converted
 over to the common clock framework.
 
 Another trend in this tag is that multiple vendors have started to push
 the complexity of changing their CPU frequency into the clock driver,
 whereas this used to be done in CPUfreq drivers.
 
 Changes to the clk core include a generic gpio-clock type and a
 clk_set_phase() function added to the top-level clk.h api. Due to some
 confusion on the fbdev mailing list the kernel boot parameters
 documentation was updated to further explain the clk_ignore_unused
 parameter, which is often required by users of the simplefb driver.
 Finally some fixes to the locking around the clock debugfs stuff was
 done to prevent deadlocks when interacting with other subsystems.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJUMu8gAAoJEDqPOy9afJhJ+GwP/3aU1PzhEPooZ3sZ5hkhmRYc
 RTzNZAODuOGbGnAiNQcr8XW3LJ6wKz5TSzzUC8IQkTcYM1Tsc7s5B6v+nMOkR2Jh
 sfrlnDEV/dsW9/3QADFuBowCaZdsaZnHn96RDhTmyDlPjh4HRR2k8ITT+TREbFrd
 cHDWy4QnI0u4NzhKtitvgW2770HyBpr31v5IdoRhVi5whoiBNL49BPwhwDWhwZVe
 w6qvc0jV8FK9Ra/Q7Vw6r3tiKkpO/upqVFDrsO831mp2qDcQvtOgNW9H2fjcobaX
 3/KCbs1TZs39e71RsEGwCvmCudXkTgO1wUJ86MuCLHeb2o78Vx8EYie02/RApTOJ
 0KGR+kFouggy2naeH8pXiTZk2HWMCbut6NQ1+AVbea5Em7hgHbYaQN71wVFKR4L7
 QL+TugrIg81fGWSvxoTo6fsbEiKOUdhXvHFWP5etKHL+Ll+7ku05ojHLOZgEEwTf
 zFWSSF4XSFQtuQD1gup0pSfoLs6qVR57l8FsrxfRPK9jGttg5z1wyNkY+585ptim
 eyTn4mkvkx9t9Sx47VRj9WPcPr2SW1w8lTMw1WqKfHG7AEUJHHkRQThQmiU82b47
 dTls4BBZ6sVZ8wj0V4zvnvbmtdYohOmBqNDEYx+a0dzPKstcAJyZgcjWBc13zds4
 rIKKxhiU7jGWH4qnJLrx
 =w2rN
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux

Pull clock tree updates from Mike Turquette:
 "The clk tree changes for 3.18 are dominated by clock drivers.  Mostly
  fixes and enhancements to existing drivers as well as new drivers.
  This tag contains a bit more arch code than I usually take due to some
  OMAP2+ changes.  Additionally it contains the restart notifier
  handlers which are merged as a dependency into several trees.

  The PXA changes are the only messy part.  Due to having a stable tree
  I had to revert one patch and follow up with one more fix near the tip
  of this tag.  Some dead code is introduced but it will soon become
  live code after 3.18-rc1 is released as the rest of the PXA family is
  converted over to the common clock framework.

  Another trend in this tag is that multiple vendors have started to
  push the complexity of changing their CPU frequency into the clock
  driver, whereas this used to be done in CPUfreq drivers.

  Changes to the clk core include a generic gpio-clock type and a
  clk_set_phase() function added to the top-level clk.h api.  Due to
  some confusion on the fbdev mailing list the kernel boot parameters
  documentation was updated to further explain the clk_ignore_unused
  parameter, which is often required by users of the simplefb driver.

  Finally some fixes to the locking around the clock debugfs stuff was
  done to prevent deadlocks when interacting with other subsystems."

* tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux: (99 commits)
  clk: pxa clocks build system fix
  Revert "arm: pxa: Transition pxa27x to clk framework"
  clk: samsung: register restart handlers for s3c2412 and s3c2443
  clk: rockchip: add restart handler
  clk: rockchip: rk3288: i2s_frac adds flag to set parent's rate
  doc/kernel-parameters.txt: clarify clk_ignore_unused
  arm: pxa: Transition pxa27x to clk framework
  dts: add devicetree bindings for pxa27x clocks
  clk: add pxa27x clock drivers
  arm: pxa: add clock pll selection bits
  clk: dts: document pxa clock binding
  clk: add pxa clocks infrastructure
  clk: gpio-gate: Ensure gpiod_ APIs are prototyped
  clk: ti: dra7-atl-clock: Mark the device as pm_runtime_irq_safe
  clk: ti: LLVMLinux: Move __init outside of type definition
  clk: ti: consider the fact that of_clk_get() might return an error
  clk: ti: dra7-atl-clock: fix a memory leak
  clk: ti: change clock init to use generic of_clk_init
  clk: hix5hd2: add I2C clocks
  clk: hix5hd2: add watchdog0 clocks
  ...
2014-10-15 07:05:03 +02:00
Linus Torvalds fcc3a5d277 Changes to existing drivers:
- DT clean-ups in da9055-core, max14577, rn5t618, arizona, hi6421, stmpe, twl4030
   - Export symbols for use in modules in max14577
   - Plenty of static code analysis/Coccinelle fixes throughout the SS
   - Regmap clean-ups in arizona, wm5102, wm5110, da9052, tps65217, rk808
   - Remove unused/duplicate code in da9052, 88pm860x, ti_ssp, lpc_sch, arizona
   - Bug fixes in ti_am335x_tscadc, da9052, ti_am335x_tscadc, rtsx_pcr
   - IRQ fixups in arizona, stmpe, max14577
   - Regulator related changes in axp20x
   - Pass DMA coherency information from parent => child in MFD core
   - Rename DT document files for consistency
   - Add ACPI support to the MFD core
   - Add Andreas Werner to MAINTAINERS for MEN F21BMC
 
 New drivers/supported devices:
   - New driver for MEN 14F021P00 Board Management Controller
   - New driver for Ricoh RN5T618 PMIC
   - New driver for Rockchip RK808
   - New driver for HiSilicon Hi6421 PMIC
   - New driver for Qualcomm SPMI PMICs
   - Add support for Intel Braswell in lpc_ich
   - Add support for Intel 9 Series PCH in lpc_ich
   - Add support for Intel Quark ILB in lpc_sch
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJUMvv5AAoJEFGvii+H/Hdhq90P/3a7ed9Gc4SatQNJ8u68e8M+
 lllGPWXVKnbCR8yc/kCALBpNYUcyPzTp5u1l/ozwEgRDgCzNAvYC2h/aflpPjWSu
 5q1rE7V8Cz/hUxXU/fcEMcnJYiqdaRowgdFtUM+ClLQReOkmwQhWID+hLvTlCUIN
 6MkXCsAl6vrzBEtbKtlR5+6VDQ3Q84gqN2SadpxS+yQwIfGrq1ZWYATaPhdSNGR9
 4bde6YwAqgttQDHyHw0dsd9VtJ53KVk13QkHIHW6S6uPOaZSIvtt4noDUtghDUA1
 tN7d5e5x1Rm8lPREQ4PxMKqHJoRxGfYyAosqXlt3XA1wbjgOgN35nev3gqrbfho5
 eHIWfFJgPDOOwTRVT1drTOVSoxecsbrQq1YB7ChdnfREQbpFiwKhBIxjQKEpQNrI
 OjxXp4ngXwiz31Hvq+44Z6MEVVRCTXgAuBf9/cd8GkF772H7nKmT+wH1QvF+6BRG
 52qEwugTiINo3O+5g1xuDFjFWZ5GWrwUQuRHss13A0cgo+EUJKM6caH+375T7jIT
 vH+2hg0XrqAlWPqcPd1Ma9TVKqI6RJdF0XOk7YP+PcPRvN+SoW/TAGFpzfDHCd+K
 dj3/10nJZUi4CKz6PRcTxKFFpgYjsEGwhYHRWLtH+MXg3UcCyoqTrvfpkGh+hq37
 H9rkW3cNzeyHSAaeKtnk
 =xxsZ
 -----END PGP SIGNATURE-----

Merge tag 'mfd-for-linus-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Changes to existing drivers:
  - DT clean-ups in da9055-core, max14577, rn5t618, arizona, hi6421, stmpe, twl4030
  - Export symbols for use in modules in max14577
  - Plenty of static code analysis/Coccinelle fixes throughout the SS
  - Regmap clean-ups in arizona, wm5102, wm5110, da9052, tps65217, rk808
  - Remove unused/duplicate code in da9052, 88pm860x, ti_ssp, lpc_sch, arizona
  - Bug fixes in ti_am335x_tscadc, da9052, ti_am335x_tscadc, rtsx_pcr
  - IRQ fixups in arizona, stmpe, max14577
  - Regulator related changes in axp20x
  - Pass DMA coherency information from parent => child in MFD core
  - Rename DT document files for consistency
  - Add ACPI support to the MFD core
  - Add Andreas Werner to MAINTAINERS for MEN F21BMC

 New drivers/supported devices:
  - New driver for MEN 14F021P00 Board Management Controller
  - New driver for Ricoh RN5T618 PMIC
  - New driver for Rockchip RK808
  - New driver for HiSilicon Hi6421 PMIC
  - New driver for Qualcomm SPMI PMICs
  - Add support for Intel Braswell in lpc_ich
  - Add support for Intel 9 Series PCH in lpc_ich
  - Add support for Intel Quark ILB in lpc_sch"

[ Delayed to after the poweer/reset pull due to Kconfig problems with
  recursive Kconfig select/depends-on chains.   - Linus ]

* tag 'mfd-for-linus-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (79 commits)
  mfd: cros_ec: wait for completion of commands that return IN_PROGRESS
  i2c: i2c-cros-ec-tunnel: Set retries to 3
  mfd: cros_ec: move locking into cros_ec_cmd_xfer
  mfd: cros_ec: stop calling ->cmd_xfer() directly
  mfd: cros_ec: Delay for 50ms when we see EC_CMD_REBOOT_EC
  MAINTAINERS: Adds Andreas Werner to maintainers list for MEN F21BMC
  mfd: arizona: Correct mask to allow setting micbias external cap
  mfd: Add ACPI support
  Revert "mfd: wm5102: Manually apply register patch"
  mfd: ti_am335x_tscadc: Update logic in CTRL register for 5-wire TS
  mfd: dt-bindings: atmel-gpbr: Rename doc file to conform to naming convention
  mfd: dt-bindings: qcom-pm8xxx: Rename doc file to conform to naming convention
  mfd: Inherit coherent_dma_mask from parent device
  mfd: Document DT bindings for Qualcomm SPMI PMICs
  mfd: Add support for Qualcomm SPMI PMICs
  mfd: dt-bindings: pm8xxx: Add new compatible string
  mfd: axp209x: Drop the parent supplies field
  mfd: twl4030-power: Use 'ti,system-power-controller' as alternative way to support system power off
  mfd: dt-bindings: twl4030-power: Use the standard property to mark power control
  mfd: syscon: Add Atmel GPBR DT bindings documention
  ...
2014-10-15 06:58:16 +02:00
Mike Turquette 38bf3a7978 Merge branch 'clk-pxa27x' into clk-next 2014-09-30 12:49:42 -07:00
Robert Jarzmik bda0030366 clk: add pxa clocks infrastructure
Add a the common code used by all PXA variants.

This is the first step in the transition from architecture defined
clocks (in arch/arm/mach-pxa) towards clock framework. The goal is to
have the same features (and not all the features) of the existing
clocks, and enable the transition of PXA to device-tree.

All PXA rely on a "CKEN" type clock, which :
 - has a gate (bit in CKEN register)
 - is generated from a PLL, generally divided
 - has an alternate low power clock

Each variant will specialize the CKEN clock :
 - pxa25x have no low power clock
 - pxa27x in low power use always the 13 MHz ring oscillator
 - pxa3xx in low power have specific dividers for each clock

The device-tree provides a list of CLK_* (ex: CLK_USB or CLK_I2C) to get
a handle on the clock. While pxa-clock.h will describe all the clocks of
all the variants, each variant will only use a subset of it.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-30 12:31:30 -07:00
Mike Turquette 24afc3852e Samsung clock patches for v3.18
1) non-critical fixes (without the need to push to stable)
 
 fa0111be4f clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation
 b511593d71 clk: samsung: exynos4: fix g3d clocks
 c142543001 clk: samsung: exynos4: add missing smmu_g2d clock and update comments
 22842d244a clk: samsung: exynos5260: fix typo in clock name
 e82ba578cc clk: samsung: exynos3250: fix width field of mout_mmc0/1
 59037b92f4 clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock
 5ce37f2666 clk: samsung: exynos3250: fix mout_cam_blk parent list
 
 2) Clock driver extensions
 
 07ccf02ba5 dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMU
 d0e73eaf19 ARM: dts: exynos3250: Add CMU node for DMC domain clocks
 e3c3f19bc6 clk: samsung: exynos3250: Register DMC clk provider
 4676f0aab9 clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJUKcEKAAoJEIv3Hb8G/XruW/cP/34kC45bvMqXIIcDHq3CRRpG
 i3HgG3mJb/rSzE4rDMPBtBXmkp45tHfOh4npdw5Db/+Kpb6m22X0yEYmGtH5Yfpw
 thQEuAeCjL5jDob/YjbPHH1PeoBHy5LS5wgwaJIC/aLQj6od31mgWZabYpeVX3AE
 flrWoxVmFVWGUKqfk2hJMY7RVuJcNw2CyIJ/jK0V3zh05GM9e8sFulXY3vellofW
 6aSaRYWqD7QYlf9VSU0ECHpCoFTIRCDh0k/yafDZrvOyKuWfyvGYorGnLh3wE7S7
 bPi+fo47WKRtoiKEeQDa0egxq/fl0ksp3kubWZq09EQYKQE/pMHayCYyImxGyAeK
 gy0M6E8M3Xwf+Slg+xKrNRP89ExfW0ymTbaNMgKJf96ocQjSH93rcPZGrXhrPILT
 CV8jWNRSjNcAfAvuzH2CZiLfCrc9phTbz3WEce8D8zf14fPOkGrYQB0GMr1+HUj1
 4LL/3JcCt/3wrliSVim3eSf1lgUCLKocMM1lrzzc7JhBamKvesKU2gw+RRSg9Pe5
 gg7RPCSgQMieGp1yO8nNkbmZhhXPNIXoEHjMlS1XTymBHiG+24f1mX7Q/nfGD5mY
 VP7LKeLUIYKPQZlvM9d9Ko2Xt13ypDZLGAM/bmEtOoibeNbELbfzeIxiUkgkB6rE
 uADWSEd6SDyV+E6nK62z
 =MsKp
 -----END PGP SIGNATURE-----

Merge tag 'for_3.18/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next

Samsung clock patches for v3.18

1) non-critical fixes (without the need to push to stable)

fa0111be4f clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation
b511593d71 clk: samsung: exynos4: fix g3d clocks
c142543001 clk: samsung: exynos4: add missing smmu_g2d clock and update comments
22842d244a clk: samsung: exynos5260: fix typo in clock name
e82ba578cc clk: samsung: exynos3250: fix width field of mout_mmc0/1
59037b92f4 clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock
5ce37f2666 clk: samsung: exynos3250: fix mout_cam_blk parent list

2) Clock driver extensions

07ccf02ba5 dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMU
d0e73eaf19 ARM: dts: exynos3250: Add CMU node for DMC domain clocks
e3c3f19bc6 clk: samsung: exynos3250: Register DMC clk provider
4676f0aab9 clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
2014-09-29 23:43:12 -07:00
Mike Turquette 6e18ff26c2 Hisilicon HiX5HD2 clock updates for 3.18-v2
- Add I2C clocks
 - Add watchdog clocks
 - Add sd clocks
 - Add complex clock implementation to support sata, usb and ethernet
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJUJ3bFAAoJEGROujcbgXtLdJMP/3OV7vktoDknOi50sJPb4CRj
 qjGxQ7XcHLCwvzTdnTcorV3x8t8iNReaG2QiESVJA62criTJSxG9/rNK8N6z2233
 X8VAZDBIRY2aa8T/jAwHQKTNspQTxIeaBxJ63IqFss3kfsQS9haQZoBAnFciiFLu
 5qIrJilVRkpWbXst5XAYLfNy5bLzBJNjUcO8N6JrLI+0yE9vIIxcLtNuUBNAdqi1
 hiNxeLIrKmQ4RTobZWCm2BuvW89NTgi1xf+hnLWq6F+e98auGvIoXOHZoF5X58pc
 eeI8e2r1TcnmcSR96zwesGUelUlfMXKJ7JM2GVKt1kCINyCFFKYGe3evTCRK0+8W
 9t8NkJh43x30prcJUM4X8cv2P+tzUTRSgcJqDNqmdNPiaPo7f2QlolyeaO53o+I4
 vGydbl0vawk1sHWWE4fRRPXlWK+BWV3Pd0XbLneU2QVlULKyJGGpWWtj4sG+B0oe
 HF7aelZwVWVy2VoUihZ9f2R3PW1f2MOMzkv25QvOpYlb3/rhjPNVu/+TsBnMbk+3
 tf5vZpo7KoZ6AD7EwayhsJc3R0RGwsHx7V422cy6FLbQum0ILG9yWEvLGtzT6gkw
 Nt/F3LhDSfJbnFwGrW29aSYp3NTEXSS4rY3Y038VV1Apc1UhqK1RaR4uCFQUIHce
 PJO8lHp8gyTA/++yfM01
 =Fqwn
 -----END PGP SIGNATURE-----

Merge tag 'hix5hd2-clock-for-3.18-v2' of git://github.com/hisilicon/linux-hisi into clk-next

Hisilicon HiX5HD2 clock updates for 3.18-v2

- Add I2C clocks
- Add watchdog clocks
- Add sd clocks
- Add complex clock implementation to support sata, usb and ethernet
2014-09-28 10:47:15 -07:00
Wei Yan 45bcf9c6f2 clk: hix5hd2: add I2C clocks
hix5hd2 add I2C clocks (I2C0~i2C5)

Signed-off-by: Wei Yan <sledge.yanwei@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28 10:27:09 +08:00
Guoxiong Yan 1463fba39c clk: hix5hd2: add watchdog0 clocks
hix5hd2 add watchdog0 clocks

Signed-off-by: Guoxiong Yan <yanguoxiong@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28 10:27:04 +08:00
Jiancheng Xue cc855dd999 clk: hix5hd2: add sd clk
Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28 10:27:01 +08:00
Zhangfei Gao 20e0755859 clk: hix5hd2: add complex clk
Support clk of sata, usb and ethernet

Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2014-09-28 10:26:49 +08:00
Mike Turquette 5ad67d3e5e CPU clock handling for Rockchip SoCs
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJUJt+NAAoJEPOmecmc0R2BzmEH/00GYMLZZZrhUUBzF5+O5Wvu
 2jjVwZkyDsEL7Dnhen45Z+2umoXat8TbgNoeX+BbLEj55ntfAv1aNV62gO/wLrJy
 GbUDeAMNLXnJsF3UefBHvDf1F7SOZAm7QPs9oYQMyUDQqzsorfuDjKDPPLAHoiO9
 7TfVxLYqkd4lVm0cYo4tMYTgONK2QR6iKEGHHkXIsKZXMdd2gMAxuTIjBcTqbBu1
 9Hxt9P2G9InmRaSmW4zXzMlur0it16BnFt2wnJGoawBZkkwnvkze54APQgA4GV61
 tqUhh94mQdAzJd1wMtJASK6ZY79pjv9pmGgQ5kNVlDV0SaSafZ1MhQU4k7NdemQ=
 =myeX
 -----END PGP SIGNATURE-----

Merge tag 'v3.18-rockchip-cpuclk' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

CPU clock handling for Rockchip SoCs
2014-09-27 12:50:40 -07:00
Heiko Stuebner f79c3c0154 Merge branch 'v3.18-next/armclkid' into v3.18-next/cpuclk 2014-09-27 17:56:55 +02:00
Heiko Stuebner 4d742e6230 clk: rockchip: add binding id for ARMCLK
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
2014-09-27 17:56:35 +02:00
Mike Turquette b6b2fe5b6e Tegra clk updates for 3.18
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJUHBvYAAoJEFFb18rurjwTyaoP/37XBxRXfN2mL+WroUC7rb4m
 qb7PKg0RTOjjWV6Dp2EzmXThxsy0sGRpML9ZNp6LYIqPOH4sBHNeRK0+Qf1dB1XZ
 /DySj4oqEgJ+x8GHTqceM5x4C5fwDrF4sl5uacYIZcA42ih3nY331zlJaNPpkSpx
 iP91SJsQghK9OpdnOTl8oOV9p6PIjFfn712GPIRL7PBIBkVswdkJHufozzvcX+mI
 O30/FGEGbQCmCs1pFXufFNwJQcOy0qK5zyZPhGbzyji9gkCXz4OQOqWLdE1kXbWY
 CDfolp0Xdr+hLN/6YkQBEkZSjvKzLZf8OOYmVsXWXplVDjLf9/2p/Kq33p8JGKUa
 R8BC17MtmKjNgJ7g0Zo870meRWDcsLOfr60Wu4MIhzSJKSVDp6oq0ZqYay10/ZuF
 iMv49Mcpbgl4d0D6DgJztMPYwQZrMOkTLByGo+s/UxB+gY2XtvUO/6mPchYfhYUX
 M7y28Im4j5pmTKw5WhulfDWTBUPul8tvqGLdB4i9zKOA0iszby7pnGzjKfZd4RYg
 FD5Byzd225X92R/kKxWPTv4SQBM7flVkfvJLbOV2SiedoCHcyLXJjtSgaFlE3XYY
 gUt9uqM5cwiw6hwPVzP1su02419L6cZYkCWOlVMNlMZ3fjd6js6NUtNjxH30tU7H
 TrwJ4tAYaIkuTw0jBnFE
 =WIPU
 -----END PGP SIGNATURE-----

Merge tag 'tegra-clk-3.18' of git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-next

Tegra clk updates for 3.18
2014-09-26 16:09:39 -07:00
Chris Zhong a53b9a97ac mfd: dt-bindings: Add RK808 device tree bindings document
Add device tree bindings documentation and a header file
for rockchip's RK808 pmic.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Zhang Qing <zhangqing@rock-chips.com>
Tested-by: Heiko <heiko@sntech.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2014-09-26 08:15:55 +01:00
Mike Turquette fa531042ac Merge branch 'clk-next-rockchip' into clk-next 2014-09-25 15:48:04 -07:00
Kever Yang 5e9a3d7071 clk: rockchip: add some needed clock binding id for rk3288
This patch add some clock binding id for different modules
that under development and going to send upstream.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-25 14:54:04 -07:00
Mark yao 4b47c3f5f7 clk: rockchip: rk3288: add reset indices for SOFTRST9-11
The patch add the rest of the indices of the additional reset
registers from the updated TRM.

Signed-off-by: Mark yao <mark.yao@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-25 14:44:52 -07:00
Olof Johansson 9cd701648d The i.MX device tree changes for 3.18:
- Device tree support for i.MX ADS and Armadeus APF9328 boards
  - Enable thermal sensor support for i.MX6SL
  - Add LCD support for i.MX6SL EVK board
  - Fix display duplicate name for a bunch of board dts files
  - Configure imx6qdl-sabresd board pins locally to remove the dependency
    on bootloader
  - A set of imx28-tx28 board dts updates from Lothar
  - Add pci config space as platform resource
  - Enable devices RTC, I2C and HDMI for nitrogen6x board
  - Split HummingBoard DT to support s/dl and d/q
  - mSATA and IR input support for HummingBoard
  - Add SSI baud clock for i.MX6 device trees
  - Add USB support for vf610-colibri and vf610-twr boards
  - A set of cleanup and updates on Gateworks boards
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJUF7RZAAoJEFBXWFqHsHzOFUgH/i/9xApJoCS4X5HcnS3p0uYO
 XLu9qkl4BgvlWTehOQlBBn4Nitv9A2b23BFkZ73+FMiM43NgEXTpitt1oTdO57tA
 lmOrtlIeKFGjLLwqBu0WL01VKaH7O6B4Qe09xv/Zx3wz4yYC9l/T23yQ/Z/UFJQT
 afqyzMrfzKd0WyE4RsuL/Ir94K9Y0FzWV1u8mhupYlqDdMop27XZRMD2CHs3W9PI
 v3c7hjXT4RtLdmvHWUSVg5xwBE7ntYysv7KlEsBebSQ6dkl5vIWDO37yuGQjUAB5
 v/Ro63UwM/wPqzq50VESG5c4/OWqz+xLN0r9z+csapDcezO86dCceeek0+qyjvY=
 =svCp
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Merge "ARM: imx: device tree changes for 3.18" from Shawn Guo:

The i.MX device tree changes for 3.18:
 - Device tree support for i.MX ADS and Armadeus APF9328 boards
 - Enable thermal sensor support for i.MX6SL
 - Add LCD support for i.MX6SL EVK board
 - Fix display duplicate name for a bunch of board dts files
 - Configure imx6qdl-sabresd board pins locally to remove the dependency
   on bootloader
 - A set of imx28-tx28 board dts updates from Lothar
 - Add pci config space as platform resource
 - Enable devices RTC, I2C and HDMI for nitrogen6x board
 - Split HummingBoard DT to support s/dl and d/q
 - mSATA and IR input support for HummingBoard
 - Add SSI baud clock for i.MX6 device trees
 - Add USB support for vf610-colibri and vf610-twr boards
 - A set of cleanup and updates on Gateworks boards

* tag 'imx-dt-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (86 commits)
  ARM: dts: imx6: make gpt per clock can be from OSC
  ARM: dts: imx: ventana: add canbus support for GW52xx
  ARM: dts: imx: ventana: cleanup pinctrl groups
  ARM: dts: imx: ventana: configure padconf for all pins
  ARM: dts: imx: ventana: use gpio constants
  ARM: dts: imx: ventana: remove unused aliases
  ARM: dts: imx: ventana: remove unsupported dt nodes
  ARM: dts: imx28-tx28: add alias for CAN XCVR regulator
  ARM: dts: imx28-tx28: add spi-gpio as alternative for spi-mxs
  ARM: dts: imx28-tx28: use GPIO flags
  ARM: dts: imx28-tx28: remove spidev labels and add third instance of spidev
  ARM: dts: imx6sl: add baud clock and clock-names for ssi
  ARM: dts: imx6qdl: add baud clock and clock-names for ssi
  ARM: dts: imx6qdl-sabresd: Configure the pins locally
  ARM: dts: imx28-m28evk: Fix display duplicate name warning
  ARM: dts: imx28-tx28: Fix display duplicate name warning
  ARM: dts: imx28-m28cu: Fix display duplicate name warning
  ARM: dts: imx28-cfa100: Fix display duplicate name warning
  ARM: dts: imx28-apf28dev: Fix display duplicate name warning
  ARM: dts: imx28-apx4devkit: Fix display duplicate name warning
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-24 11:29:50 -07:00
Marek Szyprowski 4676f0aab9 clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
This patch adds support for exporting mout_hdmi and mout_mixer to device
tree. Access to those clocks is required to correctly setup HDMI module
on Exynos 4210 and 4x12 SoCs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: Mike Turquette <mturquette@linaro.org>
CC: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
2014-09-22 14:31:14 +02:00
Marek Szyprowski c142543001 clk: samsung: exynos4: add missing smmu_g2d clock and update comments
This patch adds missing smmu_g2d clock implementation and updates
comment about Exynos4 clocks from 278-282 range. Those clocks are
available on all Exynos4 SoC series, so the misleading comment has been
removed.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
2014-09-22 14:31:06 +02:00
Krzysztof Kozlowski e3c3f19bc6 clk: samsung: exynos3250: Register DMC clk provider
Add clock provider for clocks in DMC domain including EPLL and BPLL. The
DMC clocks are necessary for Exynos3 devfreq driver.

The DMC clock domain uses different address space (0x105C0000) than
standard clock domain (0x10030000 - 0x10050000). The difference is huge
enough to add new DT node for the clock provider, rather than extending
existing address space.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
2014-09-22 14:28:49 +02:00
Mikko Perttunen d364a77d02 ARM: tegra: Add PLL_M_UD and PLL_C_UD to tegra124-car binding header
Add these clocks to the binding header so that EMC timings that have
them as parent can refer to the clocks.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
2014-09-18 13:57:06 +03:00
Anson Huang 6f11c69d35 ARM: imx: add gpt_3m clk for i.mx6qdl
Add gpt_3m clock for i.mx6qdl, as gpt can source clock
from OSC, some i.MX6 series SOCs has fixed divider of
8 for gpt clock, so here add a fix clk of gpt_3m.

i.MX6Q TO1.0 has no gpt_3m option, so force it to be
from ipg_per.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:09:40 +08:00
Shengjiu Wang dbaf381ffb ARM: clk-imx6sl: refine clock tree for SSI
Each SSI has "ssi", "ssi_ipg" clocks, and they share same gate bits.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:09:39 +08:00
Shawn Guo db7c065945 ARM: imx6sx: add BYPASS support for PLL clocks
This is the same change for imx6sx clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q.  The difference is that only anaclk1
is available on imx6sx.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:49 +08:00
Shawn Guo e90f41990d ARM: imx6sl: add BYPASS support for PLL clocks
This is the same change for imx6sl clock driver as "ARM: imx6q: add BYPASS
support for PLL clocks" for imx6q.  The difference is that only anaclk1
is available on imx6sl.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:48 +08:00
Shawn Guo b1f156db47 ARM: imx6q: add BYPASS support for PLL clocks
The imx6q clock driver currently hard-codes all PLL clocks to source
from OSC24M without BYPASS support.  The patch adds the missing lvds_in
clock which is mutually exclusive with lvds_gate, and implements BYPASS
and BYPASS_CLK_SRC selection for PLL clocks as per Figure 10-3. Primary
Clock Generation in IMX6DQRM, i.e. both BYPASS_CLK_SRC and BYPASS bits
are implemented as mux clocks, and ENABLE bit of PLL clocks is
implemented as a gate clock after BYPASS mux.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:48 +08:00
Shengjiu Wang aec247d4ac ARM: clk-imx6q: refine clock tree for ASRC
ASRC has "asrc", "asrc_ipg", "asrc_mem" clocks, and they share
the same gate bits.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:47 +08:00
Shengjiu Wang 7bce3d23ec ARM: clk-imx6q: refine clock tree for ESAI
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Rename
'esai' to 'esai_extal', 'esai_ahb' to 'esai_mem', and add 'esai_ipg'.
Make the clock for ESAI more clear and align them with imx6sx.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:46 +08:00
Stefan Agner 21231f81f1 ARM: imx: clk-vf610: Add USBPHY clocks
This commit adds PLL7 which is required for USBPHY1. It also adds
the USB PHY and USB Controller clocks and the gates to enable them.

Acked-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-09-16 10:06:45 +08:00
Javier Martinez Canillas 83ccf16cb9 clk: Add driver for Maxim 77802 PMIC clocks
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-09 13:55:59 -07:00
Javier Martinez Canillas a8a76f563c clk: max77686: Add DT include for MAX77686 PMIC clock
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be used by both the max77686
clock driver and Device Tree source files.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-09 13:55:38 -07:00
Ulrich Hecht 0dce5454d5 ARM: shmobile: Initial r8a7794 SoC device tree
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[uli: reduced to minimum, added cmt, enabled scif2, split off board part]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-09-09 11:29:08 +09:00
Ulrich Hecht d6fb17ad7c ARM: shmobile: r8a7740: clock register bits
Contains the header file with the clock pulse generator and MSTP bits.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 11:49:38 +09:00
Mikhail Ulyanov ed48b5d6fd ARM: shmobile: r8a7791: Add JPU clock dt and CPG define.
Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 10:56:33 +09:00
Mikhail Ulyanov da076a888a ARM: shmobile: r8a7790: Add JPU clock dt and CPG define.
Signed-off-by: Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22 10:49:39 +09:00
Linus Torvalds d4e1f5a14e ARM: SoC device-tree changes for 3.17
Unlike the board branch, this keeps having large sets of changes for
 every release, but that's quite expected and is so far working well.
 
 Most of this is plumbing for various device bindings and new platforms,
 but there's also a bit of cleanup and code removal for things that
 are moved from platform code to DT contents (some OMAP clock code in
 particular).
 
 There's also a pinctrl driver for tegra here (appropriately acked),
 that's introduced this way to make it more bisectable.
 
 I'm happy to say that there were no conflicts at all with this branch
 this release, which means that changes are flowing through our tree as
 expected instead of merged through driver maintainers (or at least not
 done with conflicts).
 
 There are several new boards added, and a couple of SoCs. In no particular
 order:
 
 * Rockchip RK3288 SoC support, including DTS for a dev board that they
   have seeded with some community developers.
 * Better support for Hardkernel Exynos4-based ODROID boards.
 * CCF conversions (and dtsi contents) for several Renesas platforms.
 * Gumstix Pepper (TI AM335x) board support
 * TI eval board support for AM437x
 * Allwinner A23 SoC, very similar to existing ones which mostly has
   resulted in DT changes for support. Also includes support for an Ippo
   tablet with the chipset.
 * Allwinner A31 Hummingbird board support, not to be confused with the
   SolidRun i.MX-based Hummingboard.
 * Tegra30 Apalis board support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJT5DqvAAoJEIwa5zzehBx3tm0QAJk8zFyZuMhUPz6SoZTtO9ti
 zojZ2218oqLRDfLSYdJx/3QE7gb2ef0e2S6FrthecdAY8sqZzDddL7M/cCf1WSgy
 +D4dD1UEq+W/hOeEwIWyo3GR/71exgo/LMTIw8HOJh5c9fanQ2wNChNetCgh8b4u
 sVOEMmP1UTO2W7mH9cCRhWXFifBNi0yNl1QBYnLPzM2CbSEa4qQRarTn/94NSEiY
 U9XgzysklvYEW/30wcEkz8ZonKbJrtP+zEjODU4wN/muhHECeTehDrkJq0WEK/3C
 3ptko2xQGURNaLM6HVvQS9qkXxyhCeZxqkELpjkjjM+YPFN8wdHu7gDctGZlDr39
 LQ2pZF6K8vaFvxp3UM2wzdDeoNi3rxguzpFoBmfRP5NWguDrOvjT3w8W4hO9q04J
 8SqMGca0av9myHmeSjtRRg5rmcC3kBbOgSN6siVJ8W80rHT7tnFjl6eCawDreQzn
 szFzGaOOUnf/kJ/00vzm1dCuluowFPdSYgW3aamZhfkqu2qYJ8Ztuooz5eZGKtex
 zlUfKtpL26gnamoUT42K7E8J968AjHjUc/zimwYzIgHCzTTApYGJQcbD/Y28b8QH
 gTvhRxP+0kFb+NNq4IHStVMvJrFOPvzOHXcL8x07HqTxrl7W4XoW+KJxCJOk433W
 5NJ9s4tEmiTRMtFL1kv6
 =xxlY
 -----END PGP SIGNATURE-----

Merge tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree changes from Olof Johansson:
 "Unlike the board branch, this keeps having large sets of changes for
  every release, but that's quite expected and is so far working well.

  Most of this is plumbing for various device bindings and new
  platforms, but there's also a bit of cleanup and code removal for
  things that are moved from platform code to DT contents (some OMAP
  clock code in particular).

  There's also a pinctrl driver for tegra here (appropriately acked),
  that's introduced this way to make it more bisectable.

  I'm happy to say that there were no conflicts at all with this branch
  this release, which means that changes are flowing through our tree as
  expected instead of merged through driver maintainers (or at least not
  done with conflicts).

  There are several new boards added, and a couple of SoCs.  In no
  particular order:

   - Rockchip RK3288 SoC support, including DTS for a dev board that
     they have seeded with some community developers.
   - Better support for Hardkernel Exynos4-based ODROID boards.
   - CCF conversions (and dtsi contents) for several Renesas platforms.
   - Gumstix Pepper (TI AM335x) board support
   - TI eval board support for AM437x
   - Allwinner A23 SoC, very similar to existing ones which mostly has
     resulted in DT changes for support.  Also includes support for an
     Ippo tablet with the chipset.
   - Allwinner A31 Hummingbird board support, not to be confused with
     the SolidRun i.MX-based Hummingboard.
   - Tegra30 Apalis board support"

* tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits)
  ARM: dts: Enable USB host0 (EHCI) on rk3288-evb
  ARM: dts: add rk3288 ehci usb devices
  ARM: dts: Turn on USB host vbus on rk3288-evb
  ARM: tegra: apalis t30: fix device tree compatible node
  ARM: tegra: paz00: Fix some indentation inconsistencies
  ARM: zynq: DT: Clarify Xilinx Zynq platform
  ARM: dts: rockchip: add watchdog node
  ARM: dts: rockchip: remove pinctrl setting from radxarock uart2
  ARM: dts: Add missing pinctrl for uart0/1 for exynos3250
  ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250
  ARM: dts: Add TMU dt node to monitor the temperature for exynos3250
  ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250
  ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only
  ARM: dts: max77686 is exynos5250-snow only
  ARM: zynq: DT: Remove DMA from board DTs
  ARM: zynq: DT: Add CAN node
  ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table
  ARM: dts: Add PMU DT node for exynos5260 SoC
  ARM: EXYNOS: Add support for Exynos5410 PMU
  ARM: dts: Add PMU to exynos5410
  ...
2014-08-08 11:16:58 -07:00
Linus Torvalds b3345d7c57 ARM: SoC platform changes for 3.17
This is the bulk of new SoC enablement and other platform changes for 3.17:
 
 * Samsung S5PV210 has been converted to DT and multiplatform
 * Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms
 * Kirkwood, one of the popular Marvell platforms, is folded into the
   mvebu platform code, removing mach-kirkwood.
 * Hwmod data for TI AM43xx and DRA7 platforms.
 * More additions of Renesas shmobile platform support
 * Removal of plat-samsung contents that can be removed with S5PV210 being
   multiplatform/DT-enabled and the other two old platforms being removed.
 
 New platforms (most with only basic support right now):
 
 * Hisilicon X5HD2 settop box chipset is introduced
 * Mediatek MT6589 (mobile chipset) is introduced
 * Broadcom BCM7xxx settop box chipset is introduced
 
 + as usual a lot other pieces all over the platform code.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJT5Dp+AAoJEIwa5zzehBx3w1sP/0vjT/LQOmC8Lv8RW2Ley2ua
 hNu3HcNPnT/N40JEdU9YNv3q0fdxGgcfKj011CNN+49zPSUf1xduk2wfCAk9yV50
 8Sbt1PfDGm1YyUugGN420CzI431pPoM1OGXHZHkAmg+2J286RtUi3NckB//QDbCY
 QhEjhpYc9SXhAOCGwmB4ab7thOljOFSPzKTLMTu3+PNI5zRPRgkDkt6w9XlsAYmB
 nuR271BnzsROkMzAjycwaJ3kdim7wqrMRfk8g96o0jHSF5qf4zsT5uWYYAjTxdUQ
 8Ajz6zjeHe4+95TwTDcq+lCX6rDLZgwkvCAc6hFbeg0uR7Dyek0h6XMEYtwdjaiU
 KNPwOENrYdENNDAGRpkFp1x4h/rY9Plfru0bBo5o6t7aPBvmNeCDzRtlTtLiUNDV
 dG8sfDMtrS/wFHVjylDSQ60Mb+wuW0XneC8D7chY/iRhIllUYi6YXXvt+/tH5C20
 oYDOWqqcDFSb0sJhE5pn4KBV82ZaHx9jMBWGLl+erg2sDX/SK8SxOkLqKYZKtKB5
 0leOGE3Y+C70xt3G9HftLz2sAvvt+C8UPsApPT+dHNE401TWJOYx6LphPkQKjeeK
 P1iwKi+It3l+FaBypgJy/LeMQRy7EyvDBK2I5WoVL/R2qq14EmP1ui3Tthjj0bhq
 tBBof6P9c8OnRVj1Lz3R
 =5TJ6
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "This is the bulk of new SoC enablement and other platform changes for
  3.17:

   - Samsung S5PV210 has been converted to DT and multiplatform
   - Clock drivers and bindings for some of the lower-end i.MX 1/2
     platforms
   - Kirkwood, one of the popular Marvell platforms, is folded into the
     mvebu platform code, removing mach-kirkwood
   - Hwmod data for TI AM43xx and DRA7 platforms
   - More additions of Renesas shmobile platform support
   - Removal of plat-samsung contents that can be removed with S5PV210
     being multiplatform/DT-enabled and the other two old platforms
     being removed

  New platforms (most with only basic support right now):

   - Hisilicon X5HD2 settop box chipset is introduced
   - Mediatek MT6589 (mobile chipset) is introduced
   - Broadcom BCM7xxx settop box chipset is introduced

  + as usual a lot other pieces all over the platform code"

* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
  ARM: hisi: remove smp from machine descriptor
  power: reset: move hisilicon reboot code
  ARM: dts: Add hix5hd2-dkb dts file.
  ARM: debug: Rename Hi3716 to HIX5HD2
  ARM: hisi: enable hix5hd2 SoC
  ARM: hisi: add ARCH_HISI
  MAINTAINERS: add entry for Broadcom ARM STB architecture
  ARM: brcmstb: select GISB arbiter and interrupt drivers
  ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
  ARM: configs: enable SMP in bcm_defconfig
  ARM: add SMP support for Broadcom mobile SoCs
  Documentation: arm: misc updates to Marvell EBU SoC status
  Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
  ARM: mvebu: fix build without platforms selected
  ARM: mvebu: add cpuidle support for Armada 38x
  ARM: mvebu: add cpuidle support for Armada 370
  cpuidle: mvebu: add Armada 38x support
  cpuidle: mvebu: add Armada 370 support
  cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
  ARM: mvebu: export the SCU address
  ...
2014-08-08 11:14:29 -07:00
Linus Torvalds e4ca4308c0 The clock framework changes for 3.17 are mostly additions of new clock
drivers and fixes/enhancements to existing clock drivers. There are also
 some non-critical fixes and improvements to the framework core.
 
 Changes to the clock framework core include:
 * improvements to printks on errors
 * flattening the previously hierarchal structure of per-clock entries
   in debugfs
 * allow per-clock debugfs entries that are specific to a particular
   clock driver
 * configure initial clock parent and/or initial clock rate from Device
   Tree
 * several feature enhancements to the composite clock type
 * misc fixes
 
 New clock drivers added include:
 * TI Palmas PMIC
 * Allwinner A23 SoC
 * Qualcomm APQ8084 and IPQ8064 SoCs
 * Rockchip rk3188, rk3066 and rk3288 SoCs
 * STMicroelectronics STiH407 SoC
 * Cirrus Logic CLPS711X SoC
 
 Many fixes, feature enhancements and further clock tree support for
 existing clock drivers also were merged, such as Samsung's "ARMCLK down"
 power saving feature for their Exynos4 & Exynos5 SoCs.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJT38lmAAoJEDqPOy9afJhJh9YQAKROq+lrKaf+YAk22E0GCF30
 Q+KZ9EcePdxWvcDPKsMIf/wAIYdtGDoI6wgyw1tcSWeLKwwyHMfVdOCExWig2gwl
 /4LU2tACKe+Xa0HJnsbNwQGj2n4qMGOUsDeRRmK4rcbuHZhTP15IscmFCbL+sUia
 z3uaYf7ty3a1tSXBl3NY4EpYAXGiE+MMVBoU08ATYOOjvGcxNNfu50JSltGXarqv
 BFBjpv0oikN3RvbVyuUUvEF8m6AeNYhbqxI0IuNmoE+mAkgB2n221CK4Qv6a3oDb
 QJebzRdeprcak8HrK76Ik6Dd9itcs03u6G1qwLc30JH5wUHYcgqA5bvqDIx+2W0J
 Z7NPi3tFTry1aeXnZPk7DbWruzXLQkXkgRM4xHXsmezRnO7zDvuoDgUT0pIrS9+v
 +BRIyfPiBL9Lp1J17R0I1K76O7YnvyQhX+0CdZx0SOJNGPl+SIwTI4q+gQoDIZqP
 0ubpuaH4v6gZiEol2HXKYN9ASWyRtX7PfiexQgmts1aewlPopWfuc7LdxhHQIv3B
 3O/7jbhdhXsf7VaTvx7xkFEMxjY7IwEF4pN0F+ulwWj/rLK3vLCnTwxgv8IrNHit
 Dkzt4kVzLW/GSWa3irTnISvsg+bHkRc7aPuW/i0km7RYUuL2dcaJLEBPYuka/AdH
 1xIMaGNpkA3HrS+8CQYf
 =48y9
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-3.17' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes for 3.17 are mostly additions of new clock
  drivers and fixes/enhancements to existing clock drivers.  There are
  also some non-critical fixes and improvements to the framework core.

  Changes to the clock framework core include:
   - improvements to printks on errors
   - flattening the previously hierarchal structure of per-clock entries
     in debugfs
   - allow per-clock debugfs entries that are specific to a particular
     clock driver
   - configure initial clock parent and/or initial clock rate from
     Device Tree
   - several feature enhancements to the composite clock type
   - misc fixes

  New clock drivers added include:
   - TI Palmas PMIC
   - Allwinner A23 SoC
   - Qualcomm APQ8084 and IPQ8064 SoCs
   - Rockchip rk3188, rk3066 and rk3288 SoCs
   - STMicroelectronics STiH407 SoC
   - Cirrus Logic CLPS711X SoC

  Many fixes, feature enhancements and further clock tree support for
  existing clock drivers also were merged, such as Samsung's "ARMCLK
  down" power saving feature for their Exynos4 & Exynos5 SoCs"

* tag 'clk-for-linus-3.17' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
  clk: Add missing of_clk_set_defaults export
  clk: checking wrong variable in __set_clk_parents()
  clk: Propagate any error return from debug_init()
  clk: clps711x: Add DT bindings documentation
  clk: Add CLPS711X clk driver
  clk: st: Use round to closest divider flag
  clk: st: Update frequency tables for fs660c32 and fs432c65
  clk: st: STiH407: Support for clockgenA9
  clk: st: STiH407: Support for clockgenD0/D2/D3
  clk: st: STiH407: Support for clockgenC0
  clk: st: Add quadfs reset handling
  clk: st: Add polarity bit indication
  clk: st: STiH407: Support for clockgenA0
  clk: st: STiH407: Support for A9 MUX Clocks
  clk: st: STiH407: Support for Flexgen Clocks
  clk: st: Adds Flexgen clock binding
  clk: st: Remove uncessary (void *) cast
  clk: st: use static const for clkgen_pll_data tables
  clk: st: use static const for stm_fs tables
  clk: st: Update ST clock binding documentation
  ...
2014-08-04 11:44:20 -07:00
Mike Turquette d7d3d26fa5 Samsung clock patches for 3.17
1) non-critical fixes (without need to push to stable):
 
 d5e136a clk: samsung: Register clk provider only after registering its all clocks
 305cfab clk: samsung: Make of_device_id array const
 e9d5295 clk: samsung: exynos5420: Setup clocks before system suspend
 f65d518 clk: samsung: trivial: Correct typo in author's name
 
 2) Exynos CLKOUT driver:
 
 800c979 clk: samsung: exynos4: Add missing CPU/DMC clock hierarchy
 01f7ec2 clk: samsung: exynos4: Add CLKOUT clock hierarchy
 1e832e5 clk: samsung: Add driver to control CLKOUT line on Exynos SoCs
 d19bb39 ARM: dts: exynos: Update PMU node with CLKOUT related data
 
 3) Clock hierarchy extensions:
 
 17d3f1d clk: exynos4: Add PPMU IP block source clocks.
 ca5b402 clk: samsung: register exynos5420 apll/kpll configuration data
 
 4) ARM CLKDOWN functionality enablement for Exynos4 and 3250:
 
 42773b2 clk: samsung: exynos4: Enable ARMCLK down feature
 45c5b0a clk: samsung: exynos3250: Enable ARMCLK down feature
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJT2kn8AAoJEIv3Hb8G/Xru1OMP/j6lh7aMyNm6E0mHFJd0Pfjy
 foe5N9RdQeRfoLySkItqJbBmgujkjjxstSpENCMp8VINlxxHfxi4Nl0bk34efy5f
 xYMVrmyZoB5dO4W/QmamGIiysD6aRhJ+kbwN+fai05/y+XUt8nUSTH7VdBabq9d3
 2O1kRjOMhcdnGQgs/V2XK3SvX2+iUycNAi3JKv1ai1OtB8JiykCeN4FOJr2xPFkv
 CS5kZj+ofor3SZ6NnmJq52Uuto+ck9NLpp6ohCNlvf6PC52oGa/l1KU693r534Rf
 nbbNeCOEeByqXPMuL/SxAQzZOqbMRADef42X6tVTK6qpTx58Iep9LRybolYCrMor
 s4p92u9gsLsURQ85f02mYecnqLMEoeZb5p7sOmjZ0QuHWXm5PVkhIzOYweXEzFtE
 MeEcVIEiaSpqrm94s7iPYNXleTfLHvoi7jSRjfJayqffNuUeBMfKG6gkmYogU/Ou
 9RrGsB+m8dyz/vqvqtRkZznOBaFblwqhSdeY2F+x9Onk/Bin3wzh/9NIge8HJk2P
 H62R1EUQePLCS9cZJS95jBmSAWRXPD6yaq4xIj2LTuN0uFhCO2FRxWW2eFu9OqE4
 DfDIDA1S77aqMzIYjSUUis1yhf4RnSnqy2il5iFMsbiA0/19rYgLiyNrpym8AS+T
 +ErdKOkHjkwEUZbzobH6
 =wCSD
 -----END PGP SIGNATURE-----

Merge tag 'for_3.17/samsung-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next-samsung

Samsung clock patches for 3.17

1) non-critical fixes (without need to push to stable):

d5e136a clk: samsung: Register clk provider only after registering its all clocks
305cfab clk: samsung: Make of_device_id array const
e9d5295 clk: samsung: exynos5420: Setup clocks before system suspend
f65d518 clk: samsung: trivial: Correct typo in author's name

2) Exynos CLKOUT driver:

800c979 clk: samsung: exynos4: Add missing CPU/DMC clock hierarchy
01f7ec2 clk: samsung: exynos4: Add CLKOUT clock hierarchy
1e832e5 clk: samsung: Add driver to control CLKOUT line on Exynos SoCs
d19bb39 ARM: dts: exynos: Update PMU node with CLKOUT related data

3) Clock hierarchy extensions:

17d3f1d clk: exynos4: Add PPMU IP block source clocks.
ca5b402 clk: samsung: register exynos5420 apll/kpll configuration data

4) ARM CLKDOWN functionality enablement for Exynos4 and 3250:

42773b2 clk: samsung: exynos4: Enable ARMCLK down feature
45c5b0a clk: samsung: exynos3250: Enable ARMCLK down feature
2014-07-31 09:32:18 -07:00