Commit graph

24 commits

Author SHA1 Message Date
Jonas Gorski 74b8ca3f31 MIPS: BCM63xx: Protect irq register accesses
Since we will have the chance of accessing the registers concurrently,
protect any accesses through a spinlock.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7321/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:29:23 +02:00
Jonas Gorski 7a9fd14d4c MIPS: BCM63xx: Add cpu argument to dispatch internal
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:29:00 +02:00
Jonas Gorski 3534b5ce05 MIPS: BCM63xx: Populate irq_{stat,mask}_addr for second cpu
Set it to zero if there is no second set.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:28:34 +02:00
Jonas Gorski cc81d7f372 MIPS: BCM63xx: Append irq line to irq_{stat,mask}*
The SMP capable irq controllers have two interrupt output pins which are
controlled through separate registers, so make the variables arrays.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7318/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:28:11 +02:00
Jonas Gorski 86ee4333ba MIPS: BCM63xx: Replace irq dispatch code with a generic version
The generic version uses a variable length of u32 registers instead of u32/u64.
This allows easier support for "wider" registers without having to rewrite
everything.

This "generic" version is as fast as the old version in the best case
(i == next set bit), and twice as fast in the worst case in 64 bits.

Using a macro was chosen over a (forced) inline version because gcc generated
more compact code with the macro.

The change from (signed) int to unsigned int for i and to_call was intentional
as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
optimise the code a bit further.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7316/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:27:47 +02:00
Jonas Gorski a6dfde817c MIPS: BCM63xx: Move bcm63xx_init_irq down
Allows up to drop the prototypes from the top.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7315/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:27:24 +02:00
Jonas Gorski a221a6b282 MIPS: BCM63xx: Add width to __dispatch_internal
Make it follow the same naming convention as the other functions.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7314/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:27:02 +02:00
Jonas Gorski 9bd9f9cba6 MIPS: BCM63xx: Remove !RUNTIME_DETECT from irq setup code
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7267/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 15:22:02 +02:00
Florian Fainelli 7b9334215f MIPS: BCM63XX: add support for BCM3368 Cable Modem
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the
existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort
in the existing code base is required to get it supported. This patch adds
support for the following on-chip peripherals:

- two UARTS
- GPIO
- Ethernet
- SPI
- PCI
- NOR Flash

The most noticeable difference with 3368 is that it has its peripheral
register at 0xfff8_0000 we check that separately in ioremap.h. Since
3368 is identical to 6358 for its clock and reset bits, we use them
verbatim.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:53 +02:00
Kevin Cernekee 937ad10425 MIPS: BCM63XX: Handle SW IRQs 0-1
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI)
on BMIPS SMP.  Make the board support code aware of them.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
[jogo@openwrt.org: move sw irqs behind timer irq]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:52 +02:00
Jonas Gorski 2c8aaf71b0 MIPS: BCM63XX: add basic BCM6362 support
Add basic support for detecting and booting the BCM6362.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5009/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Maxime Bizon 58e380afb6 MIPS: BCM63XX: use a switch for external irq config
Makes the code a bit more readable and easier to add support for
new chips.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4093/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24 20:09:01 +02:00
Maxime Bizon 64eaea4a84 MIPS: BCM63XX: add external irq support for BCM6345
Add the missing definitions for BCM6345.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4091/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24 20:09:00 +02:00
Jonas Gorski e5766aea5b MIPS: BCM63XX: Add basic BCM6328 support
This includes CPU speed, memory size detection and working UART, but
lacking the appropriate drivers, no support for attached flash.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3951/
Reviewed-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-24 16:33:12 +02:00
Maxime Bizon 04712f3ff6 MIPS: BCM63XX: Add support for bcm6368 CPU.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon 6224892c81 MIPS: BCM63XX: Add external irq support for non 6348 CPUs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon 71a43927b3 MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.
bcm6368 has larger irq registers, prepare for this.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon 37c42a741f MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation.
External irq only works for 6348, change code to prepare support of
other CPUs.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2895/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon f61cced993 MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Wu Zhangjin 5a4a4ad851 MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD
Mark interrupts with no_action handler, cascade interrupts, low level
interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them
from forced threading.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21 17:52:15 +02:00
Thomas Gleixner e4ec7989b4 MIPS: Convert the irq functions to the new names
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:07 +02:00
Thomas Gleixner 93f2936104 MIPS: bcm63xx: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2176/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25 18:45:15 +01:00
David Howells ca4d3e6746 MIPS: Add missing #inclusions of <linux/irq.h>
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should
really include it.  Note that this can replace #inclusions of <asm/irq.h>.

This is required for the patch to sort out irqflags handling function naming to
compile on MIPS.

The problem is that these files require access to things like setup_irq() -
which isn't available by #including <linux/interrupt.h>

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-07 14:08:54 +01:00
Maxime Bizon e7300d04bd MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17 20:07:52 +02:00