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4 commits

Author SHA1 Message Date
Masahiro Yamada 2752bcaa1a ARM: dts: uniphier: make 32bit SoC DTSI linear
I notice some mistakes in the SoC DTSI; wrong interrupts properties
of timer nodes, mismatch between the node name and the compatible
for sdctrl block.  Given those problems fixed, the common parts
among SoCs are less than I had first expected.  The more and more
property overrides are making the SoC DTSI unreadable.

Stretch out the SoC DTSI files and fix the following:

 - Fix the 3rd cell of the interrupts property of the timer nodes
   for Pro4, Pro5, PXs2

 - Fix the node name mioctrl to sdctrl for Pro5, PXs2

 - Fix the second region of l2 node for PXs2

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-11-05 23:18:26 +09:00
Masahiro Yamada ad0561d464 ARM: dts: uniphier: use clock/reset controllers
The UniPhier reset controller driver has been merged.  Enable it.
Also, replace the fixed-rate clocks with the dedicated clock
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-31 05:27:27 +09:00
Masahiro Yamada 3bdba5ac18 ARM: dts: uniphier: switch over to PSCI
Use PSCI for enable-method instead of SoC specific implementation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-30 21:13:13 +09:00
Masahiro Yamada 77896e4d05 ARM: dts: uniphier: match DT names to other projects and documents
All UniPhier device trees have the common prefix "uniphier-", so
"ph1-" is just making names longer.  Recent documents and other
projects are not using PH1- prefixes any more.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-30 21:12:58 +09:00
Renamed from arch/arm/boot/dts/uniphier-ph1-sld8.dtsi (Browse further)